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authorCraig Topper <craig.topper@gmail.com>2011-10-16 16:50:08 +0000
committerCraig Topper <craig.topper@gmail.com>2011-10-16 16:50:08 +0000
commitee62e4f6d192ee31d1ad9dd0ba0c41db6663d3c7 (patch)
tree39b3ad43df8c65da0e6a15beddacefe5dae31560 /utils
parent962bad70f4277841cf6278306caa93ebce304b48 (diff)
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Add X86 PEXTR and PDEP instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142141 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils')
-rw-r--r--utils/TableGen/X86RecognizableInstr.cpp45
1 files changed, 27 insertions, 18 deletions
diff --git a/utils/TableGen/X86RecognizableInstr.cpp b/utils/TableGen/X86RecognizableInstr.cpp
index b3a316d6c7..68e03738cf 100644
--- a/utils/TableGen/X86RecognizableInstr.cpp
+++ b/utils/TableGen/X86RecognizableInstr.cpp
@@ -68,7 +68,7 @@ namespace X86Local {
DC = 7, DD = 8, DE = 9, DF = 10,
XD = 11, XS = 12,
T8 = 13, P_TA = 14,
- A6 = 15, A7 = 16, TF = 17
+ A6 = 15, A7 = 16, T8XD = 17, T8XS = 18
};
}
@@ -293,21 +293,25 @@ InstructionContext RecognizableInstr::insnContext() const {
insnContext = IC_VEX_W_OPSIZE;
else if (HasOpSizePrefix)
insnContext = IC_VEX_OPSIZE;
- else if (HasVEX_LPrefix && Prefix == X86Local::XS)
+ else if (HasVEX_LPrefix &&
+ (Prefix == X86Local::XS || Prefix == X86Local::T8XS))
insnContext = IC_VEX_L_XS;
- else if (HasVEX_LPrefix && Prefix == X86Local::XD)
+ else if (HasVEX_LPrefix &&
+ (Prefix == X86Local::XD || Prefix == X86Local::T8XD))
insnContext = IC_VEX_L_XD;
- else if (HasVEX_WPrefix && Prefix == X86Local::XS)
+ else if (HasVEX_WPrefix &&
+ (Prefix == X86Local::XS || Prefix == X86Local::T8XS))
insnContext = IC_VEX_W_XS;
- else if (HasVEX_WPrefix && Prefix == X86Local::XD)
+ else if (HasVEX_WPrefix &&
+ (Prefix == X86Local::XD || Prefix == X86Local::T8XD))
insnContext = IC_VEX_W_XD;
else if (HasVEX_WPrefix)
insnContext = IC_VEX_W;
else if (HasVEX_LPrefix)
insnContext = IC_VEX_L;
- else if (Prefix == X86Local::XD)
+ else if (Prefix == X86Local::XD || Prefix == X86Local::T8XD)
insnContext = IC_VEX_XD;
- else if (Prefix == X86Local::XS)
+ else if (Prefix == X86Local::XS || Prefix == X86Local::T8XS)
insnContext = IC_VEX_XS;
else
insnContext = IC_VEX;
@@ -315,20 +319,22 @@ InstructionContext RecognizableInstr::insnContext() const {
if (HasREX_WPrefix && HasOpSizePrefix)
insnContext = IC_64BIT_REXW_OPSIZE;
else if (HasOpSizePrefix &&
- (Prefix == X86Local::XD || Prefix == X86Local::TF))
+ (Prefix == X86Local::XD || Prefix == X86Local::T8XD))
insnContext = IC_64BIT_XD_OPSIZE;
- else if (HasOpSizePrefix && Prefix == X86Local::XS)
+ else if (HasOpSizePrefix &&
+ (Prefix == X86Local::XS || Prefix == X86Local::T8XS))
insnContext = IC_64BIT_XS_OPSIZE;
else if (HasOpSizePrefix)
insnContext = IC_64BIT_OPSIZE;
- else if (HasREX_WPrefix && Prefix == X86Local::XS)
+ else if (HasREX_WPrefix &&
+ (Prefix == X86Local::XS || Prefix == X86Local::T8XS))
insnContext = IC_64BIT_REXW_XS;
else if (HasREX_WPrefix &&
- (Prefix == X86Local::XD || Prefix == X86Local::TF))
+ (Prefix == X86Local::XD || Prefix == X86Local::T8XD))
insnContext = IC_64BIT_REXW_XD;
- else if (Prefix == X86Local::XD || Prefix == X86Local::TF)
+ else if (Prefix == X86Local::XD || Prefix == X86Local::T8XD)
insnContext = IC_64BIT_XD;
- else if (Prefix == X86Local::XS)
+ else if (Prefix == X86Local::XS || Prefix == X86Local::T8XS)
insnContext = IC_64BIT_XS;
else if (HasREX_WPrefix)
insnContext = IC_64BIT_REXW;
@@ -336,15 +342,17 @@ InstructionContext RecognizableInstr::insnContext() const {
insnContext = IC_64BIT;
} else {
if (HasOpSizePrefix &&
- (Prefix == X86Local::XD || Prefix == X86Local::TF))
+ (Prefix == X86Local::XD || Prefix == X86Local::T8XD))
insnContext = IC_XD_OPSIZE;
- else if (HasOpSizePrefix && Prefix == X86Local::XS)
+ else if (HasOpSizePrefix &&
+ (Prefix == X86Local::XS || Prefix == X86Local::T8XS))
insnContext = IC_XS_OPSIZE;
else if (HasOpSizePrefix)
insnContext = IC_OPSIZE;
- else if (Prefix == X86Local::XD || Prefix == X86Local::TF)
+ else if (Prefix == X86Local::XD || Prefix == X86Local::T8XD)
insnContext = IC_XD;
- else if (Prefix == X86Local::XS || Prefix == X86Local::REP)
+ else if (Prefix == X86Local::XS || Prefix == X86Local::T8XS ||
+ Prefix == X86Local::REP)
insnContext = IC_XS;
else
insnContext = IC;
@@ -857,7 +865,8 @@ void RecognizableInstr::emitDecodePath(DisassemblerTables &tables) const {
opcodeToSet = Opcode;
break;
case X86Local::T8:
- case X86Local::TF:
+ case X86Local::T8XD:
+ case X86Local::T8XS:
opcodeType = THREEBYTE_38;
switch (Opcode) {
default: