diff options
| -rw-r--r-- | lib/CodeGen/SelectionDAG/FastISel.cpp | 4 | ||||
| -rw-r--r-- | test/CodeGen/X86/fast-isel-x86-64.ll | 10 |
2 files changed, 13 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/FastISel.cpp b/lib/CodeGen/SelectionDAG/FastISel.cpp index 0f60cbfb9b..d3a721f875 100644 --- a/lib/CodeGen/SelectionDAG/FastISel.cpp +++ b/lib/CodeGen/SelectionDAG/FastISel.cpp @@ -990,6 +990,10 @@ unsigned FastISel::FastEmit_ri_(MVT VT, unsigned Opcode, if (Opcode == ISD::MUL && isPowerOf2_64(Imm)) { Opcode = ISD::SHL; Imm = Log2_64(Imm); + } else if (Opcode == ISD::UDIV && isPowerOf2_64(Imm)) { + // div x, 8 -> srl x, 3 + Opcode = ISD::SRL; + Imm = Log2_64(Imm); } // Horrible hack (to be removed), check to make sure shift amounts are diff --git a/test/CodeGen/X86/fast-isel-x86-64.ll b/test/CodeGen/X86/fast-isel-x86-64.ll index b666e84bbc..dbf65f0b3f 100644 --- a/test/CodeGen/X86/fast-isel-x86-64.ll +++ b/test/CodeGen/X86/fast-isel-x86-64.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -fast-isel -O0 -regalloc=fast -asm-verbose=0 | FileCheck %s +; RUN: llc < %s -fast-isel -O0 -regalloc=fast -asm-verbose=0 -fast-isel-abort | FileCheck %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target triple = "x86_64-apple-darwin10.0.0" @@ -111,3 +111,11 @@ entry: ; CHECK: test9: ; CHECK: imulq $7, %rdi, %rax } + +; rdar://9297011 - Don't reject udiv by a power of 2. +define i32 @test10(i32 %X) nounwind { + %Y = udiv i32 %X, 8 + ret i32 %Y +; CHECK: test10: +; CHECK: shrl $3, +} |