diff options
| -rw-r--r-- | lib/Target/Alpha/Alpha.td | 4 | ||||
| -rw-r--r-- | lib/Target/PowerPC/PPC.td | 10 | ||||
| -rw-r--r-- | lib/Target/Sparc/Sparc.td | 6 | ||||
| -rw-r--r-- | lib/Target/SparcV8/SparcV8.td | 6 | ||||
| -rw-r--r-- | lib/Target/Target.td | 10 | ||||
| -rw-r--r-- | utils/TableGen/SubtargetEmitter.cpp | 7 |
6 files changed, 22 insertions, 21 deletions
diff --git a/lib/Target/Alpha/Alpha.td b/lib/Target/Alpha/Alpha.td index facc767c40..3c78361846 100644 --- a/lib/Target/Alpha/Alpha.td +++ b/lib/Target/Alpha/Alpha.td @@ -20,9 +20,9 @@ include "../Target.td" // Subtarget Features //===----------------------------------------------------------------------===// -def FeatureCIX : SubtargetFeature<"CIX", "bool", "HasCT", +def FeatureCIX : SubtargetFeature<"CIX", "HasCT", "true", "Enable CIX extentions">; -def FeatureFIX : SubtargetFeature<"FIX", "bool", "HasF2I", +def FeatureFIX : SubtargetFeature<"FIX", "HasF2I", "true", "Enable FIX extentions">; //===----------------------------------------------------------------------===// diff --git a/lib/Target/PowerPC/PPC.td b/lib/Target/PowerPC/PPC.td index 1de838f7aa..8b9e3a7ac1 100644 --- a/lib/Target/PowerPC/PPC.td +++ b/lib/Target/PowerPC/PPC.td @@ -19,15 +19,15 @@ include "../Target.td" // PowerPC Subtarget features. // -def Feature64Bit : SubtargetFeature<"64bit", "bool", "Is64Bit", +def Feature64Bit : SubtargetFeature<"64bit","Is64Bit", "true", "Enable 64-bit instructions">; -def Feature64BitRegs : SubtargetFeature<"64bitregs", "bool", "Has64BitRegs", +def Feature64BitRegs : SubtargetFeature<"64bitregs","Has64BitRegs", "true", "Enable 64-bit registers [beta]">; -def FeatureAltivec : SubtargetFeature<"altivec", "bool", "HasAltivec", +def FeatureAltivec : SubtargetFeature<"altivec","HasAltivec", "true", "Enable Altivec instructions">; -def FeatureGPUL : SubtargetFeature<"gpul", "bool", "IsGigaProcessor", +def FeatureGPUL : SubtargetFeature<"gpul","IsGigaProcessor", "true", "Enable GPUL instructions">; -def FeatureFSqrt : SubtargetFeature<"fsqrt", "bool", "HasFSQRT", +def FeatureFSqrt : SubtargetFeature<"fsqrt","HasFSQRT", "true", "Enable the fsqrt instruction">; //===----------------------------------------------------------------------===// diff --git a/lib/Target/Sparc/Sparc.td b/lib/Target/Sparc/Sparc.td index db9b367e88..b123930157 100644 --- a/lib/Target/Sparc/Sparc.td +++ b/lib/Target/Sparc/Sparc.td @@ -21,13 +21,13 @@ include "../Target.td" // def FeatureV9 - : SubtargetFeature<"v9", "bool", "IsV9", + : SubtargetFeature<"v9", "IsV9", "true", "Enable SPARC-V9 instructions">; def FeatureV8Deprecated - : SubtargetFeature<"deprecated-v8", "bool", "V8DeprecatedInsts", + : SubtargetFeature<"deprecated-v8", "V8DeprecatedInsts", "true", "Enable deprecated V8 instructions in V9 mode">; def FeatureVIS - : SubtargetFeature<"vis", "bool", "IsVIS", + : SubtargetFeature<"vis", "IsVIS", "true", "Enable UltraSPARC Visual Instruction Set extensions">; //===----------------------------------------------------------------------===// diff --git a/lib/Target/SparcV8/SparcV8.td b/lib/Target/SparcV8/SparcV8.td index db9b367e88..b123930157 100644 --- a/lib/Target/SparcV8/SparcV8.td +++ b/lib/Target/SparcV8/SparcV8.td @@ -21,13 +21,13 @@ include "../Target.td" // def FeatureV9 - : SubtargetFeature<"v9", "bool", "IsV9", + : SubtargetFeature<"v9", "IsV9", "true", "Enable SPARC-V9 instructions">; def FeatureV8Deprecated - : SubtargetFeature<"deprecated-v8", "bool", "V8DeprecatedInsts", + : SubtargetFeature<"deprecated-v8", "V8DeprecatedInsts", "true", "Enable deprecated V8 instructions in V9 mode">; def FeatureVIS - : SubtargetFeature<"vis", "bool", "IsVIS", + : SubtargetFeature<"vis", "IsVIS", "true", "Enable UltraSPARC Visual Instruction Set extensions">; //===----------------------------------------------------------------------===// diff --git a/lib/Target/Target.td b/lib/Target/Target.td index 407ad64059..b2dbb5b9b9 100644 --- a/lib/Target/Target.td +++ b/lib/Target/Target.td @@ -287,20 +287,20 @@ class Target { //===----------------------------------------------------------------------===// // SubtargetFeature - A characteristic of the chip set. // -class SubtargetFeature<string n, string t, string a, string d> { +class SubtargetFeature<string n, string a, string v, string d> { // Name - Feature name. Used by command line (-mattr=) to determine the // appropriate target chip. // string Name = n; - // Type - Type of attribute to be set by feature. - // - string Type = t; - // Attribute - Attribute to be set by feature. // string Attribute = a; + // Value - Value the attribute to be set to by feature. + // + string Value = v; + // Desc - Feature description. Used by command line (-mattr=) to display help // information. // diff --git a/utils/TableGen/SubtargetEmitter.cpp b/utils/TableGen/SubtargetEmitter.cpp index a6cee216da..091cbc679b 100644 --- a/utils/TableGen/SubtargetEmitter.cpp +++ b/utils/TableGen/SubtargetEmitter.cpp @@ -473,10 +473,11 @@ void SubtargetEmitter::ParseFeaturesFunction(std::ostream &OS) { Record *R = Features[i]; std::string Instance = R->getName(); std::string Name = R->getValueAsString("Name"); - std::string Type = R->getValueAsString("Type"); + std::string Value = R->getValueAsString("Value"); std::string Attribute = R->getValueAsString("Attribute"); - - OS << " " << Attribute << " = (Bits & " << Instance << ") != 0;\n"; + + OS << " if ((Bits & " << Instance << ") != 0) " + << Attribute << " = " << Value << ";\n"; } if (HasItineraries) { |