diff options
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 2 | ||||
| -rw-r--r-- | test/MC/ARM/basic-arm-instructions.s | 24 | ||||
| -rw-r--r-- | test/MC/Disassembler/ARM/basic-arm-instructions.txt | 23 |
3 files changed, 48 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 89f92a589d..eb3542c5d7 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -5233,7 +5233,7 @@ def RORi : ARMAsmPseudo<"ror${s}${p} $Rd, $Rm, $imm", cc_out:$s)>; } def RRXi : ARMAsmPseudo<"rrx${s}${p} $Rd, $Rm", - (ins GPRnopc:$Rd, GPRnopc:$Rm, pred:$p, cc_out:$s)>; + (ins GPR:$Rd, GPR:$Rm, pred:$p, cc_out:$s)>; let TwoOperandAliasConstraint = "$Rn = $Rd" in { def ASRr : ARMAsmPseudo<"asr${s}${p} $Rd, $Rn, $Rm", (ins GPRnopc:$Rd, GPRnopc:$Rn, GPRnopc:$Rm, pred:$p, diff --git a/test/MC/ARM/basic-arm-instructions.s b/test/MC/ARM/basic-arm-instructions.s index 4440ebd260..4b72c14b97 100644 --- a/test/MC/ARM/basic-arm-instructions.s +++ b/test/MC/ARM/basic-arm-instructions.s @@ -1645,6 +1645,30 @@ Lforward: @ CHECK: rsc r6, r6, r7, ror r9 @ encoding: [0x77,0x69,0xe6,0xe0] @------------------------------------------------------------------------------ +@ RRX/RRXS +@------------------------------------------------------------------------------ + + rrx r0, r1 + rrx sp, pc + rrx pc, lr + rrx lr, sp + +@ CHECK: rrx r0, r1 @ encoding: [0x61,0x00,0xa0,0xe1] +@ CHECK: rrx sp, pc @ encoding: [0x6f,0xd0,0xa0,0xe1] +@ CHECK: rrx pc, lr @ encoding: [0x6e,0xf0,0xa0,0xe1] +@ CHECK: rrx lr, sp @ encoding: [0x6d,0xe0,0xa0,0xe1] + + rrxs r0, r1 + rrxs sp, pc + rrxs pc, lr + rrxs lr, sp + +@CHECK: rrxs r0, r1 @ encoding: [0x61,0x00,0xb0,0xe1] +@CHECK: rrxs sp, pc @ encoding: [0x6f,0xd0,0xb0,0xe1] +@CHECK: rrxs pc, lr @ encoding: [0x6e,0xf0,0xb0,0xe1] +@CHECK: rrxs lr, sp @ encoding: [0x6d,0xe0,0xb0,0xe1] + +@ ------------------------------------------------------------------------------ @ SADD16/SADD8 @------------------------------------------------------------------------------ sadd16 r1, r2, r3 diff --git a/test/MC/Disassembler/ARM/basic-arm-instructions.txt b/test/MC/Disassembler/ARM/basic-arm-instructions.txt index c92322e8d7..92cfe6862e 100644 --- a/test/MC/Disassembler/ARM/basic-arm-instructions.txt +++ b/test/MC/Disassembler/ARM/basic-arm-instructions.txt @@ -1301,6 +1301,29 @@ 0x77 0x69 0xe6 0xe0 #------------------------------------------------------------------------------ +# RRX/RRXS +#------------------------------------------------------------------------------ +# CHECK: rrx r0, r1 +# CHECK: rrx sp, pc +# CHECK: rrx pc, lr +# CHECK: rrx lr, sp + +0x61 0x00 0xa0 0xe1 +0x6f 0xd0 0xa0 0xe1 +0x6e 0xf0 0xa0 0xe1 +0x6d 0xe0 0xa0 0xe1 + +# CHECK: rrxs r0, r1 +# CHECK: rrxs sp, pc +# CHECK: rrxs pc, lr +# CHECK: rrxs lr, sp + +0x61 0x00 0xb0 0xe1 +0x6f 0xd0 0xb0 0xe1 +0x6e 0xf0 0xb0 0xe1 +0x6d 0xe0 0xb0 0xe1 + +#------------------------------------------------------------------------------ # SADD16/SADD8 #------------------------------------------------------------------------------ # CHECK: sadd16 r1, r2, r3 |