diff options
| -rw-r--r-- | lib/Target/R600/SIInstrInfo.td | 5 | ||||
| -rw-r--r-- | lib/Target/R600/SIInstructions.td | 7 | ||||
| -rw-r--r-- | test/CodeGen/R600/mubuf.ll | 12 |
3 files changed, 23 insertions, 1 deletions
diff --git a/lib/Target/R600/SIInstrInfo.td b/lib/Target/R600/SIInstrInfo.td index 871509f194..988ac37af6 100644 --- a/lib/Target/R600/SIInstrInfo.td +++ b/lib/Target/R600/SIInstrInfo.td @@ -103,6 +103,11 @@ def IMM12bit : PatLeaf <(imm), [{return isUInt<12>(N->getZExtValue());}] >; +def mubuf_vaddr_offset : PatFrag< + (ops node:$ptr, node:$offset, node:$imm_offset), + (add (add node:$ptr, node:$offset), node:$imm_offset) +>; + class InlineImm <ValueType vt> : PatLeaf <(vt imm), [{ return (*(const SITargetLowering *)getTargetLowering()).analyzeImmediate(N) == 0; diff --git a/lib/Target/R600/SIInstructions.td b/lib/Target/R600/SIInstructions.td index cad41f15fe..0a05f90314 100644 --- a/lib/Target/R600/SIInstructions.td +++ b/lib/Target/R600/SIInstructions.td @@ -1960,7 +1960,7 @@ defm : SMRD_Pattern <S_LOAD_DWORDX16_IMM, S_LOAD_DWORDX16_SGPR, v16i32>; multiclass MUBUFLoad_Pattern <MUBUF Instr_ADDR64, ValueType vt, PatFrag global_ld, PatFrag constant_ld> { def : Pat < - (vt (global_ld (add (add i64:$ptr, i64:$offset), IMM12bit:$imm_offset))), + (vt (global_ld (mubuf_vaddr_offset i64:$ptr, i64:$offset, IMM12bit:$imm_offset))), (Instr_ADDR64 (SI_ADDR64_RSRC $ptr), $offset, (as_i16imm $imm_offset)) >; @@ -2007,6 +2007,11 @@ defm : MUBUFLoad_Pattern <BUFFER_LOAD_DWORDX4_ADDR64, v4i32, multiclass MUBUFStore_Pattern <MUBUF Instr, ValueType vt, PatFrag st> { def : Pat < + (st vt:$value, (mubuf_vaddr_offset i64:$ptr, i64:$offset, IMM12bit:$imm_offset)), + (Instr $value, (SI_ADDR64_RSRC $ptr), $offset, (as_i16imm $imm_offset)) + >; + + def : Pat < (st vt:$value, (add i64:$ptr, IMM12bit:$offset)), (Instr $value, (SI_ADDR64_RSRC (i64 0)), $ptr, (as_i16imm $offset)) >; diff --git a/test/CodeGen/R600/mubuf.ll b/test/CodeGen/R600/mubuf.ll index fd03961110..2d5ddeb938 100644 --- a/test/CodeGen/R600/mubuf.ll +++ b/test/CodeGen/R600/mubuf.ll @@ -84,3 +84,15 @@ entry: store i32 0, i32 addrspace(1)* %0 ret void } + +; MUBUF store with a 12-bit immediate offset and a register offset +; CHECK-LABEL: @mubuf_store3 +; CHECK-NOT: ADD +; CHECK: BUFFER_STORE_DWORD v{{[0-9]}}, s[{{[0-9]:[0-9]}}] + v[{{[0-9]:[0-9]}}] + 4 ; encoding: [0x04,0x80 +define void @mubuf_store3(i32 addrspace(1)* %out, i64 %offset) { +entry: + %0 = getelementptr i32 addrspace(1)* %out, i64 %offset + %1 = getelementptr i32 addrspace(1)* %0, i64 1 + store i32 0, i32 addrspace(1)* %1 + ret void +} |