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-rw-r--r--lib/Target/X86/X86ISelLowering.cpp2
-rw-r--r--test/CodeGen/X86/cas.ll31
2 files changed, 32 insertions, 1 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index c24d41b685..bc29df4981 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -18135,7 +18135,7 @@ X86TargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
// really want an 8-bit or 32-bit register, map to the appropriate register
// class and return the appropriate register.
if (Res.second == &X86::GR16RegClass) {
- if (VT == MVT::i8) {
+ if (VT == MVT::i8 || VT == MVT::i1) {
unsigned DestReg = 0;
switch (Res.first) {
default: break;
diff --git a/test/CodeGen/X86/cas.ll b/test/CodeGen/X86/cas.ll
index 602f433fb2..c2dd05ef73 100644
--- a/test/CodeGen/X86/cas.ll
+++ b/test/CodeGen/X86/cas.ll
@@ -36,7 +36,38 @@ entry:
ret i1 %tobool
}
+; CHECK: @cas
; Make sure we're emitting a move from eax.
; CHECK: #APP
; CHECK-NEXT: lock;{{.*}}mov %eax,{{.*}}
; CHECK-NEXT: #NO_APP
+
+define zeroext i1 @cas2(i8* %p, i8* %expected, i1 zeroext %desired) nounwind {
+entry:
+ %p.addr = alloca i8*, align 8
+ %expected.addr = alloca i8*, align 8
+ %desired.addr = alloca i8, align 1
+ %success = alloca i8, align 1
+ store i8* %p, i8** %p.addr, align 8
+ store i8* %expected, i8** %expected.addr, align 8
+ %frombool = zext i1 %desired to i8
+ store i8 %frombool, i8* %desired.addr, align 1
+ %0 = load i8** %expected.addr, align 8
+ %1 = load i8** %expected.addr, align 8
+ %2 = load i8* %1, align 1
+ %tobool = trunc i8 %2 to i1
+ %3 = load i8* %desired.addr, align 1
+ %tobool1 = trunc i8 %3 to i1
+ %4 = load i8** %p.addr, align 8
+ %5 = call i8 asm sideeffect "lock; cmpxchg $3, $4; mov $2, $1; sete $0", "={ax},=*rm,{ax},q,*m,~{memory},~{cc},~{dirflag},~{fpsr},~{flags}"(i8* %0, i1 %tobool, i1 %tobool1, i8* %4) nounwind
+ store i8 %5, i8* %success, align 1
+ %6 = load i8* %success, align 1
+ %tobool2 = trunc i8 %6 to i1
+ ret i1 %tobool2
+}
+
+; CHECK: @cas2
+; Make sure we're emitting a move from %al here.
+; CHECK: #APP
+; CHECK-NEXT: lock;{{.*}}mov %al,{{.*}}
+; CHECK-NEXT: #NO_APP