diff options
| -rw-r--r-- | lib/CodeGen/RegisterCoalescer.cpp | 6 | ||||
| -rw-r--r-- | test/CodeGen/ARM/coalesce-subregs.ll | 27 |
2 files changed, 31 insertions, 2 deletions
diff --git a/lib/CodeGen/RegisterCoalescer.cpp b/lib/CodeGen/RegisterCoalescer.cpp index f45072f1ac..ad1f5f4f12 100644 --- a/lib/CodeGen/RegisterCoalescer.cpp +++ b/lib/CodeGen/RegisterCoalescer.cpp @@ -1733,11 +1733,15 @@ void JoinVals::pruneValues(JoinVals &Other, // This value takes precedence over the value in Other.LI. LIS->pruneValue(&Other.LI, Def, &EndPoints); // Remove <def,read-undef> flags. This def is now a partial redef. - if (!Def.isBlock()) + if (!Def.isBlock()) { for (MIOperands MO(Indexes->getInstructionFromIndex(Def)); MO.isValid(); ++MO) if (MO->isReg() && MO->isDef() && MO->getReg() == LI.reg) MO->setIsUndef(false); + // This value will reach instructions below, but we need to make sure + // the live range also reaches the instruction at Def. + EndPoints.push_back(Def); + } DEBUG(dbgs() << "\t\tpruned " << PrintReg(Other.LI.reg) << " at " << Def << ": " << Other.LI << '\n'); break; diff --git a/test/CodeGen/ARM/coalesce-subregs.ll b/test/CodeGen/ARM/coalesce-subregs.ll index 8d7ded5be0..6e1f17dced 100644 --- a/test/CodeGen/ARM/coalesce-subregs.ll +++ b/test/CodeGen/ARM/coalesce-subregs.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mcpu=cortex-a9 -new-coalescer | FileCheck %s +; RUN: llc < %s -mcpu=cortex-a9 -verify-coalescing | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32" target triple = "thumbv7-apple-ios0.0.0" @@ -189,3 +189,28 @@ if.end: ; preds = %entry, %if.then declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*, i32) nounwind readonly declare void @llvm.arm.neon.vst1.v4f32(i8*, <4 x float>, i32) nounwind + +; CHECK: pr13999 +define void @pr13999() nounwind readonly { +entry: + br i1 true, label %outer_loop, label %loop.end + +outer_loop: + %d = phi double [ 0.0, %entry ], [ %add, %after_inner_loop ] + %0 = insertelement <2 x double> <double 0.0, double 0.0>, double %d, i32 0 + br i1 undef, label %after_inner_loop, label %inner_loop + +inner_loop: + br i1 true, label %after_inner_loop, label %inner_loop + +after_inner_loop: + %1 = phi <2 x double> [ %0, %outer_loop ], [ <double 0.0, double 0.0>, +%inner_loop ] + %2 = extractelement <2 x double> %1, i32 1 + %add = fadd double 1.0, %2 + br i1 false, label %loop.end, label %outer_loop + +loop.end: + %d.end = phi double [ 0.0, %entry ], [ %add, %after_inner_loop ] + ret void +} |