diff options
| -rw-r--r-- | lib/Target/NVPTX/NVPTXISelLowering.cpp | 3 | ||||
| -rw-r--r-- | test/CodeGen/NVPTX/ldu-i8.ll | 14 |
2 files changed, 16 insertions, 1 deletions
diff --git a/lib/Target/NVPTX/NVPTXISelLowering.cpp b/lib/Target/NVPTX/NVPTXISelLowering.cpp index 871bc3c9b2..b9d8d8f48c 100644 --- a/lib/Target/NVPTX/NVPTXISelLowering.cpp +++ b/lib/Target/NVPTX/NVPTXISelLowering.cpp @@ -2373,7 +2373,8 @@ static void ReplaceINTRINSIC_W_CHAIN(SDNode *N, SelectionDAG &DAG, DAG.getMemIntrinsicNode(ISD::INTRINSIC_W_CHAIN, DL, LdResVTs, &Ops[0], Ops.size(), MVT::i8, MemSD->getMemOperand()); - Results.push_back(NewLD.getValue(0)); + Results.push_back(DAG.getNode(ISD::TRUNCATE, DL, MVT::i8, + NewLD.getValue(0))); Results.push_back(NewLD.getValue(1)); } } diff --git a/test/CodeGen/NVPTX/ldu-i8.ll b/test/CodeGen/NVPTX/ldu-i8.ll new file mode 100644 index 0000000000..81a82b2c38 --- /dev/null +++ b/test/CodeGen/NVPTX/ldu-i8.ll @@ -0,0 +1,14 @@ +; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64" + +declare i8 @llvm.nvvm.ldu.global.i.i8(i8*) + +define i8 @foo(i8* %a) { +; Ensure we properly truncate off the high-order 24 bits +; CHECK: ldu.global.u8 +; CHECK: cvt.u32.u16 +; CHECK: and.b32 %r{{[0-9]+}}, %r{{[0-9]+}}, 255 + %val = tail call i8 @llvm.nvvm.ldu.global.i.i8(i8* %a) + ret i8 %val +} |