diff options
| -rw-r--r-- | include/llvm/CodeGen/FastISel.h | 2 | ||||
| -rw-r--r-- | lib/CodeGen/SelectionDAG/FastISel.cpp | 27 |
2 files changed, 11 insertions, 18 deletions
diff --git a/include/llvm/CodeGen/FastISel.h b/include/llvm/CodeGen/FastISel.h index be14f749bf..471e9bfc40 100644 --- a/include/llvm/CodeGen/FastISel.h +++ b/include/llvm/CodeGen/FastISel.h @@ -123,7 +123,7 @@ public: /// index value. std::pair<unsigned, bool> getRegForGEPIndex(const Value *V); - /// \brief We're checking to see if we can fold \p LI the \p FoldInst. + /// \brief We're checking to see if we can fold \p LI into \p FoldInst. /// Note that we could have a sequence where multiple LLVM IR instructions /// are folded into the same machineinstr. For example we could have: /// A: x = load i32 *P diff --git a/lib/CodeGen/SelectionDAG/FastISel.cpp b/lib/CodeGen/SelectionDAG/FastISel.cpp index b95535b0aa..288499ac6f 100644 --- a/lib/CodeGen/SelectionDAG/FastISel.cpp +++ b/lib/CodeGen/SelectionDAG/FastISel.cpp @@ -1507,6 +1507,8 @@ bool FastISel::HandlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB) { } bool FastISel::tryToFoldLoad(const LoadInst *LI, const Instruction *FoldInst) { + assert(LI->hasOneUse() && + "tryToFoldLoad expected a LoadInst with a single use"); // We know that the load has a single use, but don't know what it is. If it // isn't one of the folded instructions, then we can't succeed here. Handle // this by scanning the single-use users of the load until we get to FoldInst. @@ -1531,7 +1533,8 @@ bool FastISel::tryToFoldLoad(const LoadInst *LI, const Instruction *FoldInst) { // Don't try to fold volatile loads. Target has to deal with alignment // constraints. - if (LI->isVolatile()) return false; + if (LI->isVolatile()) + return false; // Figure out which vreg this is going into. If there is no assigned vreg yet // then there actually was no reference to it. Perhaps the load is referenced @@ -1540,27 +1543,17 @@ bool FastISel::tryToFoldLoad(const LoadInst *LI, const Instruction *FoldInst) { if (LoadReg == 0) return false; - // Check to see what the uses of this vreg are. If it has no uses, or more - // than one use (at the machine instr level) then we can't fold it. - MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(LoadReg); - if (RI == MRI.reg_end()) - return false; - - // See if there is exactly one use of the vreg. If there are multiple uses, - // then the instruction got lowered to multiple machine instructions or the - // use of the loaded value ended up being multiple operands of the result, in - // either case, we can't fold this. - MachineRegisterInfo::reg_iterator PostRI = RI; ++PostRI; - if (PostRI != MRI.reg_end()) + // We can't fold if this vreg has no uses or more than one use. Multiple uses + // may mean that the instruction got lowered to multiple MIs, or the use of + // the loaded value ended up being multiple operands of the result. + if (!MRI.hasOneUse(LoadReg)) return false; - assert(RI.getOperand().isUse() && - "The only use of the vreg must be a use, we haven't emitted the def!"); - + MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(LoadReg); MachineInstr *User = &*RI; // Set the insertion point properly. Folding the load can cause generation of - // other random instructions (like sign extends) for addressing modes, make + // other random instructions (like sign extends) for addressing modes; make // sure they get inserted in a logical place before the new instruction. FuncInfo.InsertPt = User; FuncInfo.MBB = User->getParent(); |