diff options
| -rw-r--r-- | lib/Bitcode/Writer/ValueEnumerator.cpp | 2 | ||||
| -rw-r--r-- | lib/CodeGen/IfConversion.cpp | 10 | ||||
| -rw-r--r-- | lib/VMCore/Module.cpp | 4 |
3 files changed, 8 insertions, 8 deletions
diff --git a/lib/Bitcode/Writer/ValueEnumerator.cpp b/lib/Bitcode/Writer/ValueEnumerator.cpp index a303fb48e2..7fa425a7d8 100644 --- a/lib/Bitcode/Writer/ValueEnumerator.cpp +++ b/lib/Bitcode/Writer/ValueEnumerator.cpp @@ -72,7 +72,7 @@ ValueEnumerator::ValueEnumerator(const Module *M) { // Enumerate types used by the type symbol table. EnumerateTypeSymbolTable(M->getTypeSymbolTable()); - // Insert constants and metadata that are named at module level into the slot + // Insert constants and metadata that are named at module level into the slot // pool so that the module symbol table can refer to them... EnumerateValueSymbolTable(M->getValueSymbolTable()); EnumerateMDSymbolTable(M->getMDSymbolTable()); diff --git a/lib/CodeGen/IfConversion.cpp b/lib/CodeGen/IfConversion.cpp index 16d324735c..0e1edc43da 100644 --- a/lib/CodeGen/IfConversion.cpp +++ b/lib/CodeGen/IfConversion.cpp @@ -994,7 +994,7 @@ bool IfConverter::IfConvertSimple(BBInfo &BBI, IfcvtKind Kind) { if (TII->ReverseBranchCondition(Cond)) assert(false && "Unable to reverse branch condition!"); - // Initialize liveins to the first BB. These are potentiall re-defined by + // Initialize liveins to the first BB. These are potentiall redefined by // predicated instructions. SmallSet<unsigned, 4> Redefs; InitPredRedefs(CvtBBI->BB, Redefs, TRI); @@ -1085,7 +1085,7 @@ bool IfConverter::IfConvertTriangle(BBInfo &BBI, IfcvtKind Kind) { } } - // Initialize liveins to the first BB. These are potentiall re-defined by + // Initialize liveins to the first BB. These are potentially redefined by // predicated instructions. SmallSet<unsigned, 4> Redefs; InitPredRedefs(CvtBBI->BB, Redefs, TRI); @@ -1205,7 +1205,7 @@ bool IfConverter::IfConvertDiamond(BBInfo &BBI, IfcvtKind Kind, // Remove the conditional branch from entry to the blocks. BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB); - // Initialize liveins to the first BB. These are potentiall re-defined by + // Initialize liveins to the first BB. These are potentiall redefined by // predicated instructions. SmallSet<unsigned, 4> Redefs; InitPredRedefs(BBI1->BB, Redefs, TRI); @@ -1307,7 +1307,7 @@ void IfConverter::PredicateBlock(BBInfo &BBI, llvm_unreachable(0); } - // If the predicated instruction now re-defines a register as the result of + // If the predicated instruction now redefines a register as the result of // if-conversion, add an implicit kill. UpdatePredRedefs(I, Redefs, TRI, true); } @@ -1348,7 +1348,7 @@ void IfConverter::CopyAndPredicateBlock(BBInfo &ToBBI, BBInfo &FromBBI, } } - // If the predicated instruction now re-defines a register as the result of + // If the predicated instruction now redefines a register as the result of // if-conversion, add an implicit kill. UpdatePredRedefs(MI, Redefs, TRI, true); } diff --git a/lib/VMCore/Module.cpp b/lib/VMCore/Module.cpp index a4c3d2e9a0..a06911f77a 100644 --- a/lib/VMCore/Module.cpp +++ b/lib/VMCore/Module.cpp @@ -312,7 +312,7 @@ GlobalAlias *Module::getNamedAlias(StringRef Name) const { /// getNamedMetadata - Return the first NamedMDNode in the module with the /// specified name. This method returns null if a NamedMDNode with the -//// specified name is not found. +/// specified name is not found. NamedMDNode *Module::getNamedMetadata(StringRef Name) const { return NamedMDSymTab->lookup(Name); } @@ -320,7 +320,7 @@ NamedMDNode *Module::getNamedMetadata(StringRef Name) const { NamedMDNode *Module::getNamedMetadataUsingTwine(Twine Name) const { SmallString<256> NameData; StringRef NameRef = Name.toStringRef(NameData); - return NamedMDSymTab->lookup(NameRef); + return NamedMDSymTab->lookup(NameRef); } /// getOrInsertNamedMetadata - Return the first named MDNode in the module |