diff options
| -rw-r--r-- | lib/Target/ARM64/ARM64ISelDAGToDAG.cpp | 2 | ||||
| -rw-r--r-- | test/CodeGen/ARM64/bitfield-extract.ll | 17 |
2 files changed, 17 insertions, 2 deletions
diff --git a/lib/Target/ARM64/ARM64ISelDAGToDAG.cpp b/lib/Target/ARM64/ARM64ISelDAGToDAG.cpp index 986c2ad049..ad1c64526c 100644 --- a/lib/Target/ARM64/ARM64ISelDAGToDAG.cpp +++ b/lib/Target/ARM64/ARM64ISelDAGToDAG.cpp @@ -1403,8 +1403,6 @@ static bool isBitfieldDstMask(uint64_t DstMask, APInt BitsToBeInserted, assert((VT == MVT::i32 || VT == MVT::i64) && "i32 or i64 mask type expected!"); unsigned BitWidth = VT.getSizeInBits() - NumberOfIgnoredHighBits; - APInt SignificantBits = - ~APInt::getHighBitsSet(BitWidth, NumberOfIgnoredHighBits); APInt SignificantDstMask = APInt(BitWidth, DstMask); APInt SignificantBitsToBeInserted = BitsToBeInserted.zextOrTrunc(BitWidth); diff --git a/test/CodeGen/ARM64/bitfield-extract.ll b/test/CodeGen/ARM64/bitfield-extract.ll index c33e57e178..143aebc577 100644 --- a/test/CodeGen/ARM64/bitfield-extract.ll +++ b/test/CodeGen/ARM64/bitfield-extract.ll @@ -500,3 +500,20 @@ end: %conv3 = phi i80 [%conv, %entry], [%conv2, %then] ret i80 %conv3 } + +define i16 @test_ignored_rightbits(i32 %dst, i32 %in) { +; CHECK-LABEL: test_ignored_rightbits: + + %positioned_field = shl i32 %in, 3 + %positioned_masked_field = and i32 %positioned_field, 120 + %masked_dst = and i32 %dst, 7 + %insertion = or i32 %masked_dst, %positioned_masked_field +; CHECK: {{bfm|bfi}} + + %shl16 = shl i32 %insertion, 8 + %or18 = or i32 %shl16, %insertion + %conv19 = trunc i32 %or18 to i16 +; CHECK: {{bfm w[0-9]+, w[0-9]+, #24, #6|bfi w[0-9]+, w[0-9]+, #8, #7}} + + ret i16 %conv19 +} |