diff options
-rw-r--r-- | lib/CodeGen/RegAllocLocal.cpp | 14 | ||||
-rw-r--r-- | test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll | 4 | ||||
-rw-r--r-- | test/CodeGen/X86/phys-reg-local-regalloc.ll | 2 |
3 files changed, 18 insertions, 2 deletions
diff --git a/lib/CodeGen/RegAllocLocal.cpp b/lib/CodeGen/RegAllocLocal.cpp index 6a09bd9816..6a698dec86 100644 --- a/lib/CodeGen/RegAllocLocal.cpp +++ b/lib/CodeGen/RegAllocLocal.cpp @@ -764,8 +764,11 @@ void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) { // Determine whether this is a copy instruction. The cases where the // source or destination are phys regs are handled specially. unsigned SrcCopyReg, DstCopyReg, SrcCopySubReg, DstCopySubReg; + unsigned SrcCopyPhysReg = 0U; bool isCopy = TII->isMoveInstr(*MI, SrcCopyReg, DstCopyReg, SrcCopySubReg, DstCopySubReg); + if (isCopy && TargetRegisterInfo::isVirtualRegister(SrcCopyReg)) + SrcCopyPhysReg = getVirt2PhysRegMapSlot(SrcCopyReg); // Loop over the implicit uses, making sure that they are at the head of the // use order list, so they don't get reallocated. @@ -977,13 +980,24 @@ void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) { // If DestVirtReg already has a value, use it. if (!(DestPhysReg = getVirt2PhysRegMapSlot(DestVirtReg))) { + // If this is a copy try to reuse the input as the output; + // that will make the copy go away. // If this is a copy, the source reg is a phys reg, and // that reg is available, use that phys reg for DestPhysReg. + // If this is a copy, the source reg is a virtual reg, and + // the phys reg that was assigned to that virtual reg is now + // available, use that phys reg for DestPhysReg. (If it's now + // available that means this was the last use of the source.) if (isCopy && TargetRegisterInfo::isPhysicalRegister(SrcCopyReg) && isPhysRegAvailable(SrcCopyReg)) { DestPhysReg = SrcCopyReg; assignVirtToPhysReg(DestVirtReg, DestPhysReg); + } else if (isCopy && + TargetRegisterInfo::isVirtualRegister(SrcCopyReg) && + SrcCopyPhysReg && isPhysRegAvailable(SrcCopyPhysReg)) { + DestPhysReg = SrcCopyPhysReg; + assignVirtToPhysReg(DestVirtReg, DestPhysReg); } else DestPhysReg = getReg(MBB, MI, DestVirtReg); } diff --git a/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll b/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll index c4ed1663a4..d1d28ae15b 100644 --- a/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll +++ b/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s | grep {subfc r3,r5,r4} ; RUN: llc < %s | grep {subfze r4,r2} -; RUN: llc < %s -regalloc=local | grep {subfc r5,r4,r3} -; RUN: llc < %s -regalloc=local | grep {subfze r2,r2} +; RUN: llc < %s -regalloc=local | grep {subfc r2,r5,r4} +; RUN: llc < %s -regalloc=local | grep {subfze r3,r3} ; The first argument of subfc must not be the same as any other register. ; PR1357 diff --git a/test/CodeGen/X86/phys-reg-local-regalloc.ll b/test/CodeGen/X86/phys-reg-local-regalloc.ll index e5e2d4bb23..045841e724 100644 --- a/test/CodeGen/X86/phys-reg-local-regalloc.ll +++ b/test/CodeGen/X86/phys-reg-local-regalloc.ll @@ -1,4 +1,6 @@ ; RUN: llc < %s -march=x86 -mtriple=i386-apple-darwin9 -regalloc=local | FileCheck %s +; RUN: llc -O0 < %s -march=x86 -mtriple=i386-apple-darwin9 -regalloc=local | FileCheck %s +; CHECKed instructions should be the same with or without -O0. @.str = private constant [12 x i8] c"x + y = %i\0A\00", align 1 ; <[12 x i8]*> [#uses=1] |