diff options
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 4 | ||||
| -rw-r--r-- | test/CodeGen/X86/avx-vbroadcast.ll | 17 |
2 files changed, 17 insertions, 4 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 32fb5ceebe..4a312f4eb5 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -5029,10 +5029,6 @@ X86TargetLowering::LowerVectorBroadcast(SDValue &Op, SelectionDAG &DAG) const { if (!ISD::isNormalLoad(Ld.getNode())) return SDValue(); - // Reject loads that have uses of the chain result - if (Ld->hasAnyUseOfValue(1)) - return SDValue(); - unsigned ScalarSize = Ld.getValueType().getSizeInBits(); if (ScalarSize == 32 || (Is256 && ScalarSize == 64)) diff --git a/test/CodeGen/X86/avx-vbroadcast.ll b/test/CodeGen/X86/avx-vbroadcast.ll index 148ae7329f..26ee1d33a1 100644 --- a/test/CodeGen/X86/avx-vbroadcast.ll +++ b/test/CodeGen/X86/avx-vbroadcast.ll @@ -112,3 +112,20 @@ entry: %vecinit2.i = insertelement <2 x double> %vecinit.i, double %q, i32 1 ret <2 x double> %vecinit2.i } + +; CHECK: _RR +; CHECK: vbroadcastss (% +; CHECK: ret +define <4 x float> @_RR(float* %ptr, i32* %k) nounwind uwtable readnone ssp { +entry: + %q = load float* %ptr, align 4 + %vecinit.i = insertelement <4 x float> undef, float %q, i32 0 + %vecinit2.i = insertelement <4 x float> %vecinit.i, float %q, i32 1 + %vecinit4.i = insertelement <4 x float> %vecinit2.i, float %q, i32 2 + %vecinit6.i = insertelement <4 x float> %vecinit4.i, float %q, i32 3 + ; force a chain + %j = load i32* %k, align 4 + store i32 %j, i32* undef + ret <4 x float> %vecinit6.i +} + |