diff options
-rw-r--r-- | lib/Target/X86/X86InstrSSE.td | 4 | ||||
-rw-r--r-- | test/CodeGen/X86/avx-cvt.ll | 2 | ||||
-rwxr-xr-x | test/CodeGen/X86/avx-fp2int.ll | 19 |
3 files changed, 22 insertions, 3 deletions
diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td index 7b710f0928..ac44473ca3 100644 --- a/lib/Target/X86/X86InstrSSE.td +++ b/lib/Target/X86/X86InstrSSE.td @@ -4693,9 +4693,9 @@ def CVTPD2DQrr : S3DI<0xE6, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), "cvtpd2dq\t{$src, $dst|$dst, $src}", []>; def : Pat<(v4i32 (fp_to_sint (v4f64 VR256:$src))), - (VCVTPD2DQYrr VR256:$src)>; + (VCVTTPD2DQYrr VR256:$src)>; def : Pat<(v4i32 (fp_to_sint (memopv4f64 addr:$src))), - (VCVTPD2DQYrm addr:$src)>; + (VCVTTPD2DQYrm addr:$src)>; // Convert Packed DW Integers to Packed Double FP let Predicates = [HasAVX] in { diff --git a/test/CodeGen/X86/avx-cvt.ll b/test/CodeGen/X86/avx-cvt.ll index 6c0bd58074..d0a7fe0100 100644 --- a/test/CodeGen/X86/avx-cvt.ll +++ b/test/CodeGen/X86/avx-cvt.ll @@ -18,7 +18,7 @@ define <4 x double> @sitofp01(<4 x i32> %a) { ret <4 x double> %b } -; CHECK: vcvtpd2dqy %ymm +; CHECK: vcvttpd2dqy %ymm define <4 x i32> @fptosi01(<4 x double> %a) { %b = fptosi <4 x double> %a to <4 x i32> ret <4 x i32> %b diff --git a/test/CodeGen/X86/avx-fp2int.ll b/test/CodeGen/X86/avx-fp2int.ll new file mode 100755 index 0000000000..9e505bd156 --- /dev/null +++ b/test/CodeGen/X86/avx-fp2int.ll @@ -0,0 +1,19 @@ +; RUN: llc < %s -mtriple=i386-apple-darwin10 -mcpu=corei7-avx -mattr=+avx | FileCheck %s
+
+;; Check that FP_TO_SINT and FP_TO_UINT generate convert with truncate
+
+; CHECK: test1:
+; CHECK: vcvttpd2dqy
+; CHECK: ret
+; CHECK: test2:
+; CHECK: vcvttpd2dqy
+; CHECK: ret
+
+define <4 x i8> @test1(<4 x double> %d) {
+ %c = fptoui <4 x double> %d to <4 x i8>
+ ret <4 x i8> %c
+}
+define <4 x i8> @test2(<4 x double> %d) {
+ %c = fptosi <4 x double> %d to <4 x i8>
+ ret <4 x i8> %c
+}
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