diff options
-rw-r--r-- | lib/Target/Mips/MipsInstrInfo.td | 11 | ||||
-rw-r--r-- | test/MC/Mips/mips-control-instructions.s | 4 |
2 files changed, 15 insertions, 0 deletions
diff --git a/lib/Target/Mips/MipsInstrInfo.td b/lib/Target/Mips/MipsInstrInfo.td index 1753207420..3d7ba007ff 100644 --- a/lib/Target/Mips/MipsInstrInfo.td +++ b/lib/Target/Mips/MipsInstrInfo.td @@ -673,6 +673,15 @@ class DEI_FT<string opstr, RegisterOperand RO> : InstSE<(outs RO:$rt), (ins), !strconcat(opstr, "\t$rt"), [], NoItinerary, FrmOther>; +// Wait +class WAIT_FT<string opstr> : + InstSE<(outs), (ins), opstr, [], NoItinerary, FrmOther> { + let Inst{31-26} = 0x10; + let Inst{25} = 1; + let Inst{24-6} = 0; + let Inst{5-0} = 0x20; +} + // Sync let hasSideEffects = 1 in class SYNC_FT : @@ -990,6 +999,8 @@ def DERET : ER_FT<"deret">, ER_FM<0x1f>; def EI : DEI_FT<"ei", GPR32Opnd>, EI_FM<1>; def DI : DEI_FT<"di", GPR32Opnd>, EI_FM<0>; +def WAIT : WAIT_FT<"wait">; + /// Load-linked, Store-conditional let Predicates = [NotN64, HasStdEnc] in { def LL : LLBase<"ll", GPR32Opnd, mem>, LW_FM<0x30>; diff --git a/test/MC/Mips/mips-control-instructions.s b/test/MC/Mips/mips-control-instructions.s index 90d479db86..825f349149 100644 --- a/test/MC/Mips/mips-control-instructions.s +++ b/test/MC/Mips/mips-control-instructions.s @@ -16,6 +16,7 @@ # CHECK32: ei # encoding: [0x41,0x60,0x60,0x20] # CHECK32: ei # encoding: [0x41,0x60,0x60,0x20] # CHECK32: ei $10 # encoding: [0x41,0x6a,0x60,0x20] +# CHECK32: wait # encoding: [0x42,0x00,0x00,0x20] # CHECK64: break # encoding: [0x00,0x00,0x00,0x0d] # CHECK64: break 7, 0 # encoding: [0x00,0x07,0x00,0x0d] @@ -30,6 +31,7 @@ # CHECK64: ei # encoding: [0x41,0x60,0x60,0x20] # CHECK64: ei # encoding: [0x41,0x60,0x60,0x20] # CHECK64: ei $10 # encoding: [0x41,0x6a,0x60,0x20] +# CHECK64: wait # encoding: [0x42,0x00,0x00,0x20] break break 7 break 7,5 @@ -44,3 +46,5 @@ ei ei $0 ei $10 + + wait |