diff options
| -rw-r--r-- | lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 1 | ||||
| -rw-r--r-- | test/CodeGen/X86/dagcombine-shifts.ll | 8 |
2 files changed, 9 insertions, 0 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index a01d5636df..0179cf181c 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -3794,6 +3794,7 @@ SDValue DAGCombiner::visitSHL(SDNode *N) { EVT CountVT = NewOp0.getOperand(1).getValueType(); SDValue NewSHL = DAG.getNode(ISD::SHL, SDLoc(N), NewOp0.getValueType(), NewOp0, DAG.getConstant(c2, CountVT)); + AddToWorkList(NewSHL.getNode()); return DAG.getNode(ISD::ZERO_EXTEND, SDLoc(N0), VT, NewSHL); } } diff --git a/test/CodeGen/X86/dagcombine-shifts.ll b/test/CodeGen/X86/dagcombine-shifts.ll index e5a67d7efc..905cf052c3 100644 --- a/test/CodeGen/X86/dagcombine-shifts.ll +++ b/test/CodeGen/X86/dagcombine-shifts.ll @@ -187,6 +187,8 @@ entry: ; Once the add is removed, the number of uses becomes one and therefore the ; dags are canonicalized. After Legalization, we need to make sure that the ; valuetype for the shift count is legal. +; Verify also that we correctly fold the shl-shr sequence into an +; AND with bitmask. define void @g(i32 %a) { %b = lshr i32 %a, 2 @@ -197,5 +199,11 @@ define void @g(i32 %a) { ret void } +; CHECK-LABEL: @g +; CHECK-NOT: shr +; CHECK-NOT: shl +; CHECK: and +; CHECK-NEXT: jmp + declare void @f(i64) |