diff options
| -rw-r--r-- | include/llvm/CodeGen/LiveRegUnits.h | 2 | ||||
| -rw-r--r-- | lib/CodeGen/IfConversion.cpp | 12 | ||||
| -rw-r--r-- | lib/CodeGen/LiveRegUnits.cpp | 6 |
3 files changed, 10 insertions, 10 deletions
diff --git a/include/llvm/CodeGen/LiveRegUnits.h b/include/llvm/CodeGen/LiveRegUnits.h index 1e24e695a1..02b9c55cc6 100644 --- a/include/llvm/CodeGen/LiveRegUnits.h +++ b/include/llvm/CodeGen/LiveRegUnits.h @@ -80,7 +80,7 @@ public: void stepForward(const MachineInstr &MI, const MCRegisterInfo &MCRI); /// \brief Adds all registers in the live-in list of block @p BB. - void addLiveIns(const MachineBasicBlock &BB, const MCRegisterInfo &MCRI); + void addLiveIns(const MachineBasicBlock *MBB, const MCRegisterInfo &MCRI); }; } // namespace llvm diff --git a/lib/CodeGen/IfConversion.cpp b/lib/CodeGen/IfConversion.cpp index b7297298da..e2d0eb44da 100644 --- a/lib/CodeGen/IfConversion.cpp +++ b/lib/CodeGen/IfConversion.cpp @@ -1049,13 +1049,13 @@ bool IfConverter::IfConvertSimple(BBInfo &BBI, IfcvtKind Kind) { // Initialize liveins to the first BB. These are potentiall redefined by // predicated instructions. Redefs.init(TRI); - Redefs.addLiveIns(*(CvtBBI->BB), *TRI); - Redefs.addLiveIns(*(NextBBI->BB), *TRI); + Redefs.addLiveIns(CvtBBI->BB, *TRI); + Redefs.addLiveIns(NextBBI->BB, *TRI); // Compute a set of registers which must not be killed by instructions in // BB1: This is everything live-in to BB2. DontKill.init(TRI); - DontKill.addLiveIns(*(NextBBI->BB), *TRI); + DontKill.addLiveIns(NextBBI->BB, *TRI); if (CvtBBI->BB->pred_size() > 1) { BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB); @@ -1154,8 +1154,8 @@ bool IfConverter::IfConvertTriangle(BBInfo &BBI, IfcvtKind Kind) { // Initialize liveins to the first BB. These are potentially redefined by // predicated instructions. Redefs.init(TRI); - Redefs.addLiveIns(*(CvtBBI->BB), *TRI); - Redefs.addLiveIns(*(NextBBI->BB), *TRI); + Redefs.addLiveIns(CvtBBI->BB, *TRI); + Redefs.addLiveIns(NextBBI->BB, *TRI); DontKill.clear(); @@ -1284,7 +1284,7 @@ bool IfConverter::IfConvertDiamond(BBInfo &BBI, IfcvtKind Kind, // Initialize liveins to the first BB. These are potentially redefined by // predicated instructions. Redefs.init(TRI); - Redefs.addLiveIns(*(BBI1->BB), *TRI); + Redefs.addLiveIns(BBI1->BB, *TRI); // Remove the duplicated instructions at the beginnings of both paths. MachineBasicBlock::iterator DI1 = BBI1->BB->begin(); diff --git a/lib/CodeGen/LiveRegUnits.cpp b/lib/CodeGen/LiveRegUnits.cpp index 5ff27dd1aa..6221ca2e47 100644 --- a/lib/CodeGen/LiveRegUnits.cpp +++ b/lib/CodeGen/LiveRegUnits.cpp @@ -102,10 +102,10 @@ void LiveRegUnits::stepForward(const MachineInstr &MI, } /// Adds all registers in the live-in list of block @p BB. -void LiveRegUnits::addLiveIns(const MachineBasicBlock &BB, +void LiveRegUnits::addLiveIns(const MachineBasicBlock *MBB, const MCRegisterInfo &MCRI) { - for (MachineBasicBlock::livein_iterator L = BB.livein_begin(), - LE = BB.livein_end(); L != LE; ++L) { + for (MachineBasicBlock::livein_iterator L = MBB->livein_begin(), + LE = MBB->livein_end(); L != LE; ++L) { addReg(*L, MCRI); } } |