diff options
| -rw-r--r-- | utils/TableGen/CodeGenIntrinsics.h | 42 | ||||
| -rw-r--r-- | utils/TableGen/IntrinsicEmitter.cpp | 70 | ||||
| -rw-r--r-- | utils/TableGen/IntrinsicEmitter.h | 38 | ||||
| -rw-r--r-- | utils/TableGen/TableGen.cpp | 7 |
4 files changed, 157 insertions, 0 deletions
diff --git a/utils/TableGen/CodeGenIntrinsics.h b/utils/TableGen/CodeGenIntrinsics.h new file mode 100644 index 0000000000..71529966a4 --- /dev/null +++ b/utils/TableGen/CodeGenIntrinsics.h @@ -0,0 +1,42 @@ +//===- CodeGenIntrinsic.h - Intrinsic Class Wrapper ------------*- C++ -*--===// +// +// The LLVM Compiler Infrastructure +// +// This file was developed by the LLVM research group and is distributed under +// the University of Illinois Open Source License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file defines a wrapper class for the 'Intrinsic' TableGen class. +// +//===----------------------------------------------------------------------===// + +#ifndef CODEGEN_INTRINSIC_H +#define CODEGEN_INTRINSIC_H + +#include <string> +#include <vector> + +namespace llvm { + class Record; + class RecordKeeper; + + struct CodeGenIntrinsic { + Record *TheDef; // The actual record defining this instruction. + std::string Name; // The name of the LLVM function "llvm.bswap.i32" + std::string EnumName; // The name of the enum "bswap_i32" + + // Memory mod/ref behavior of this intrinsic. + enum { + NoMem, ReadArgMem, ReadMem, WriteArgMem, WriteMem + } ModRef; + + CodeGenIntrinsic(Record *R); + }; + + /// LoadIntrinsics - Read all of the intrinsics defined in the specified + /// .td file. + std::vector<CodeGenIntrinsic> LoadIntrinsics(const RecordKeeper &RC); +} + +#endif diff --git a/utils/TableGen/IntrinsicEmitter.cpp b/utils/TableGen/IntrinsicEmitter.cpp new file mode 100644 index 0000000000..dd4324ee11 --- /dev/null +++ b/utils/TableGen/IntrinsicEmitter.cpp @@ -0,0 +1,70 @@ +//===- IntrinsicEmitter.cpp - Generate intrinsic information --------------===// +// +// The LLVM Compiler Infrastructure +// +// This file was developed by Chris Lattner and is distributed under +// the University of Illinois Open Source License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This tablegen backend emits information about intrinsic functions. +// +//===----------------------------------------------------------------------===// + +#include "IntrinsicEmitter.h" +#include "Record.h" +using namespace llvm; + +//===----------------------------------------------------------------------===// +// CodeGenIntrinsic Implementation +//===----------------------------------------------------------------------===// + +std::vector<CodeGenIntrinsic> llvm::LoadIntrinsics(const RecordKeeper &RC) { + std::vector<Record*> I = RC.getAllDerivedDefinitions("Intrinsic"); + return std::vector<CodeGenIntrinsic>(I.begin(), I.end()); +} + +CodeGenIntrinsic::CodeGenIntrinsic(Record *R) { + std::string DefName = R->getName(); + + if (DefName.size() <= 4 || + std::string(DefName.begin(), DefName.begin()+4) != "int_") + throw "Intrinsic '" + DefName + "' does not start with 'int_'!"; + EnumName = std::string(DefName.begin()+4, DefName.end()); + + Name = R->getValueAsString("LLVMName"); + if (Name == "") { + // If an explicit name isn't specified, derive one from the DefName. + Name = "llvm."; + for (unsigned i = 0, e = EnumName.size(); i != e; ++i) + if (EnumName[i] == '_') + Name += '.'; + else + Name += EnumName[i]; + } +} + +//===----------------------------------------------------------------------===// +// IntrinsicEmitter Implementation +//===----------------------------------------------------------------------===// + +void IntrinsicEmitter::run(std::ostream &OS) { + EmitSourceFileHeader("Intrinsic Function Source Fragment", OS); + + std::vector<CodeGenIntrinsic> Ints = LoadIntrinsics(Records); + + // Emit the enum information. + EmitEnumInfo(Ints, OS); +} + +void IntrinsicEmitter::EmitEnumInfo(const std::vector<CodeGenIntrinsic> &Ints, + std::ostream &OS) { + OS << "#ifdef GET_INTRINSIC_ENUM_VALUES\n"; + for (unsigned i = 0, e = Ints.size(); i != e; ++i) { + OS << " " << Ints[i].EnumName; + OS << ((i != e-1) ? ", " : " "); + OS << std::string(40-Ints[i].EnumName.size(), ' ') + << "// " << Ints[i].Name << "\n"; + } + OS << "#endif\n\n"; +} diff --git a/utils/TableGen/IntrinsicEmitter.h b/utils/TableGen/IntrinsicEmitter.h new file mode 100644 index 0000000000..debbe4bbcc --- /dev/null +++ b/utils/TableGen/IntrinsicEmitter.h @@ -0,0 +1,38 @@ +//===- IntrinsicEmitter.h - Generate intrinsic information ------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file was developed by Chris Lattner and is distributed under +// the University of Illinois Open Source License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This tablegen backend emits information about intrinsic functions. +// +//===----------------------------------------------------------------------===// + +#ifndef INTRINSIC_EMITTER_H +#define INTRINSIC_EMITTER_H + +#include "CodeGenIntrinsics.h" +#include "TableGenBackend.h" + +namespace llvm { + class IntrinsicEmitter : public TableGenBackend { + RecordKeeper &Records; + + public: + IntrinsicEmitter(RecordKeeper &R) : Records(R) {} + + void run(std::ostream &OS); + + void EmitEnumInfo(const std::vector<CodeGenIntrinsic> &Ints, + std::ostream &OS); + }; + +} // End llvm namespace + +#endif + + + diff --git a/utils/TableGen/TableGen.cpp b/utils/TableGen/TableGen.cpp index 366af85bc6..4c8b3a0fcd 100644 --- a/utils/TableGen/TableGen.cpp +++ b/utils/TableGen/TableGen.cpp @@ -25,6 +25,7 @@ #include "AsmWriterEmitter.h" #include "DAGISelEmitter.h" #include "SubtargetEmitter.h" +#include "IntrinsicEmitter.h" #include <algorithm> #include <cstdio> #include <fstream> @@ -38,6 +39,7 @@ enum ActionType { GenInstrEnums, GenInstrs, GenAsmWriter, GenDAGISel, GenSubtarget, + GenIntrinsic, PrintEnums, Parse }; @@ -65,6 +67,8 @@ namespace { "Generate a DAG instruction selector"), clEnumValN(GenSubtarget, "gen-subtarget", "Generate subtarget enumerations"), + clEnumValN(GenIntrinsic, "gen-intrinsic", + "Generate intrinsic information"), clEnumValN(PrintEnums, "print-enums", "Print enum values for a class"), clEnumValN(Parse, "parse", @@ -474,6 +478,9 @@ int main(int argc, char **argv) { case GenSubtarget: SubtargetEmitter(Records).run(*Out); break; + case GenIntrinsic: + IntrinsicEmitter(Records).run(*Out); + break; case PrintEnums: { std::vector<Record*> Recs = Records.getAllDerivedDefinitions(Class); |