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-rw-r--r--include/llvm/CodeGen/MachineInstrBuilder.h45
-rw-r--r--lib/CodeGen/AsmPrinter/AsmPrinter.cpp4
-rw-r--r--lib/CodeGen/AsmPrinter/DwarfDebug.cpp12
-rw-r--r--lib/CodeGen/LiveDebugVariables.cpp33
-rw-r--r--lib/CodeGen/SelectionDAG/FastISel.cpp15
-rw-r--r--lib/CodeGen/SelectionDAG/InstrEmitter.cpp8
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp5
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp17
-rw-r--r--test/CodeGen/ARM/debug-info-branch-folding.ll4
-rw-r--r--test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll2
-rw-r--r--test/CodeGen/X86/dbg-value-dag-combine.ll2
-rw-r--r--test/CodeGen/X86/dbg-value-range.ll4
-rw-r--r--test/DebugInfo/X86/op_deref.ll12
-rw-r--r--test/DebugInfo/X86/vla.ll104
14 files changed, 222 insertions, 45 deletions
diff --git a/include/llvm/CodeGen/MachineInstrBuilder.h b/include/llvm/CodeGen/MachineInstrBuilder.h
index 92c8da991c..df01371a47 100644
--- a/include/llvm/CodeGen/MachineInstrBuilder.h
+++ b/include/llvm/CodeGen/MachineInstrBuilder.h
@@ -335,6 +335,51 @@ inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB,
return BuildMI(*BB, BB->end(), DL, MCID, DestReg);
}
+/// BuildMI - This version of the builder builds a DBG_VALUE intrinsic
+/// for either a value in a register or a register-indirect+offset
+/// address. The convention is that a DBG_VALUE is indirect iff the
+/// second operand is an immediate.
+///
+inline MachineInstrBuilder BuildMI(MachineFunction &MF,
+ DebugLoc DL,
+ const MCInstrDesc &MCID,
+ bool IsIndirect,
+ unsigned Reg,
+ unsigned Offset,
+ const MDNode *MD) {
+ if (IsIndirect)
+ return BuildMI(MF, DL, MCID)
+ .addReg(Reg, RegState::Debug)
+ .addImm(Offset)
+ .addMetadata(MD);
+ else {
+ assert(Offset == 0 && "A direct address cannot have an offset.");
+ return BuildMI(MF, DL, MCID)
+ .addReg(Reg, RegState::Debug)
+ .addReg(0U, RegState::Debug)
+ .addMetadata(MD);
+ }
+}
+
+/// BuildMI - This version of the builder builds a DBG_VALUE intrinsic
+/// for either a value in a register or a register-indirect+offset
+/// address and inserts it at position I.
+///
+inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
+ MachineBasicBlock::iterator I,
+ DebugLoc DL,
+ const MCInstrDesc &MCID,
+ bool IsIndirect,
+ unsigned Reg,
+ unsigned Offset,
+ const MDNode *MD) {
+ MachineFunction &MF = *BB.getParent();
+ MachineInstr *MI = BuildMI(MF, DL, MCID, IsIndirect, Reg, Offset, MD);
+ BB.insert(I, MI);
+ return MachineInstrBuilder(MF, MI);
+}
+
+
inline unsigned getDefRegState(bool B) {
return B ? RegState::Define : 0;
}
diff --git a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
index 4a71ad3337..284b6165d0 100644
--- a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+++ b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
@@ -597,7 +597,9 @@ static bool emitDebugValueComment(const MachineInstr *MI, AsmPrinter &AP) {
OS << AP.TM.getRegisterInfo()->getName(MI->getOperand(0).getReg());
}
- OS << '+' << MI->getOperand(1).getImm();
+ // It's only an offset if it's an immediate.
+ if (MI->getOperand(1).isImm())
+ OS << '+' << MI->getOperand(1).getImm();
// NOTE: Want this comment at start of line, don't emit with AddComment.
AP.OutStreamer.EmitRawText(OS.str());
return true;
diff --git a/lib/CodeGen/AsmPrinter/DwarfDebug.cpp b/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
index ee6308c466..b8959adcde 100644
--- a/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
+++ b/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
@@ -1115,7 +1115,8 @@ static bool isDbgValueInDefinedReg(const MachineInstr *MI) {
assert(MI->isDebugValue() && "Invalid DBG_VALUE machine instruction!");
return MI->getNumOperands() == 3 &&
MI->getOperand(0).isReg() && MI->getOperand(0).getReg() &&
- MI->getOperand(1).isImm() && MI->getOperand(1).getImm() == 0;
+ (MI->getOperand(1).isImm() ||
+ (MI->getOperand(1).isReg() && MI->getOperand(1).getReg() == 0U));
}
// Get .debug_loc entry for the instruction range starting at MI.
@@ -1129,12 +1130,11 @@ static DotDebugLocEntry getDebugLocEntry(AsmPrinter *Asm,
MachineLocation MLoc = Asm->getDebugValueLocation(MI);
return DotDebugLocEntry(FLabel, SLabel, MLoc, Var);
}
- if (MI->getOperand(0).isReg() && MI->getOperand(1).isImm()) {
+ if (MI->getOperand(0).isReg()) {
MachineLocation MLoc;
- // TODO: Currently an offset of 0 in a DBG_VALUE means
- // we need to generate a direct register value.
- // There is no way to specify an indirect value with offset 0.
- if (MI->getOperand(1).getImm() == 0)
+ // If the second operand is an immediate, this is a
+ // register-indirect address.
+ if (!MI->getOperand(1).isImm())
MLoc.set(MI->getOperand(0).getReg());
else
MLoc.set(MI->getOperand(0).getReg(), MI->getOperand(1).getImm());
diff --git a/lib/CodeGen/LiveDebugVariables.cpp b/lib/CodeGen/LiveDebugVariables.cpp
index 0b117ac656..d54a0133fe 100644
--- a/lib/CodeGen/LiveDebugVariables.cpp
+++ b/lib/CodeGen/LiveDebugVariables.cpp
@@ -108,6 +108,7 @@ class LDVImpl;
class UserValue {
const MDNode *variable; ///< The debug info variable we are part of.
unsigned offset; ///< Byte offset into variable.
+ bool Indirect; ///< true if this is a register-indirect+offset value.
DebugLoc dl; ///< The debug location for the variable. This is
///< used by dwarf writer to find lexical scope.
UserValue *leader; ///< Equivalence class leader.
@@ -134,9 +135,10 @@ class UserValue {
public:
/// UserValue - Create a new UserValue.
- UserValue(const MDNode *var, unsigned o, DebugLoc L,
+ UserValue(const MDNode *var, unsigned o, bool i, DebugLoc L,
LocMap::Allocator &alloc)
- : variable(var), offset(o), dl(L), leader(this), next(0), locInts(alloc)
+ : variable(var), offset(o), Indirect(i), dl(L), leader(this),
+ next(0), locInts(alloc)
{}
/// getLeader - Get the leader of this value's equivalence class.
@@ -299,7 +301,8 @@ class LDVImpl {
UVMap userVarMap;
/// getUserValue - Find or create a UserValue.
- UserValue *getUserValue(const MDNode *Var, unsigned Offset, DebugLoc DL);
+ UserValue *getUserValue(const MDNode *Var, unsigned Offset,
+ bool Indirect, DebugLoc DL);
/// lookupVirtReg - Find the EC leader for VirtReg or null.
UserValue *lookupVirtReg(unsigned VirtReg);
@@ -414,7 +417,7 @@ void UserValue::mapVirtRegs(LDVImpl *LDV) {
}
UserValue *LDVImpl::getUserValue(const MDNode *Var, unsigned Offset,
- DebugLoc DL) {
+ bool Indirect, DebugLoc DL) {
UserValue *&Leader = userVarMap[Var];
if (Leader) {
UserValue *UV = Leader->getLeader();
@@ -424,7 +427,7 @@ UserValue *LDVImpl::getUserValue(const MDNode *Var, unsigned Offset,
return UV;
}
- UserValue *UV = new UserValue(Var, Offset, DL, allocator);
+ UserValue *UV = new UserValue(Var, Offset, Indirect, DL, allocator);
userValues.push_back(UV);
Leader = UserValue::merge(Leader, UV);
return UV;
@@ -445,15 +448,17 @@ UserValue *LDVImpl::lookupVirtReg(unsigned VirtReg) {
bool LDVImpl::handleDebugValue(MachineInstr *MI, SlotIndex Idx) {
// DBG_VALUE loc, offset, variable
if (MI->getNumOperands() != 3 ||
- !MI->getOperand(1).isImm() || !MI->getOperand(2).isMetadata()) {
+ !(MI->getOperand(1).isReg() || MI->getOperand(1).isImm()) ||
+ !MI->getOperand(2).isMetadata()) {
DEBUG(dbgs() << "Can't handle " << *MI);
return false;
}
// Get or create the UserValue for (variable,offset).
- unsigned Offset = MI->getOperand(1).getImm();
+ bool Indirect = MI->getOperand(1).isImm();
+ unsigned Offset = Indirect ? MI->getOperand(1).getImm() : 0;
const MDNode *Var = MI->getOperand(2).getMetadata();
- UserValue *UV = getUserValue(Var, Offset, MI->getDebugLoc());
+ UserValue *UV = getUserValue(Var, Offset, Indirect, MI->getDebugLoc());
UV->addDef(Idx, MI->getOperand(0));
return true;
}
@@ -924,7 +929,8 @@ void UserValue::insertDebugValue(MachineBasicBlock *MBB, SlotIndex Idx,
// Frame index locations may require a target callback.
if (Loc.isFI()) {
MachineInstr *MI = TII.emitFrameIndexDebugValue(*MBB->getParent(),
- Loc.getIndex(), offset, variable,
+ Loc.getIndex(),
+ offset, variable,
findDebugLoc());
if (MI) {
MBB->insert(I, MI);
@@ -932,8 +938,13 @@ void UserValue::insertDebugValue(MachineBasicBlock *MBB, SlotIndex Idx,
}
}
// This is not a frame index, or the target is happy with a standard FI.
- BuildMI(*MBB, I, findDebugLoc(), TII.get(TargetOpcode::DBG_VALUE))
- .addOperand(Loc).addImm(offset).addMetadata(variable);
+
+ if (Loc.isReg())
+ BuildMI(*MBB, I, findDebugLoc(), TII.get(TargetOpcode::DBG_VALUE),
+ Indirect, Loc.getReg(), offset, variable);
+ else
+ BuildMI(*MBB, I, findDebugLoc(), TII.get(TargetOpcode::DBG_VALUE))
+ .addOperand(Loc).addImm(offset).addMetadata(variable);
}
void UserValue::emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS,
diff --git a/lib/CodeGen/SelectionDAG/FastISel.cpp b/lib/CodeGen/SelectionDAG/FastISel.cpp
index 288499ac6f..df2017d07e 100644
--- a/lib/CodeGen/SelectionDAG/FastISel.cpp
+++ b/lib/CodeGen/SelectionDAG/FastISel.cpp
@@ -641,11 +641,11 @@ bool FastISel::SelectCall(const User *I) {
Reg = FuncInfo.InitializeRegForValue(Address);
if (Reg)
- BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
- TII.get(TargetOpcode::DBG_VALUE))
- .addReg(Reg, RegState::Debug).addImm(Offset)
- .addMetadata(DI->getVariable());
- else
+ BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
+ TII.get(TargetOpcode::DBG_VALUE),
+ DI->getAddress()->getType()->isPointerTy(),
+ Reg, Offset, DI->getVariable());
+ else
// We can't yet handle anything else here because it would require
// generating code, thus altering codegen because of debug info.
DEBUG(dbgs() << "Dropping debug info for " << DI);
@@ -676,9 +676,8 @@ bool FastISel::SelectCall(const User *I) {
.addFPImm(CF).addImm(DI->getOffset())
.addMetadata(DI->getVariable());
} else if (unsigned Reg = lookUpRegForValue(V)) {
- BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II)
- .addReg(Reg, RegState::Debug).addImm(DI->getOffset())
- .addMetadata(DI->getVariable());
+ BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II, DI->getOffset() != 0,
+ Reg, DI->getOffset(), DI->getVariable());
} else {
// We can't yet handle anything else here because it would require
// generating code, thus altering codegen because of debug info.
diff --git a/lib/CodeGen/SelectionDAG/InstrEmitter.cpp b/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
index 3b1abd7c83..060492efed 100644
--- a/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
+++ b/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
@@ -678,7 +678,13 @@ InstrEmitter::EmitDbgValue(SDDbgValue *SD,
MIB.addReg(0U);
}
- MIB.addImm(Offset).addMetadata(MDPtr);
+ if (Offset != 0) // Indirect addressing.
+ MIB.addImm(Offset);
+ else
+ MIB.addReg(0U, RegState::Debug);
+
+ MIB.addMetadata(MDPtr);
+
return &*MIB;
}
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index 6e613d606f..eff4c21945 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -4413,8 +4413,9 @@ SelectionDAGBuilder::EmitFuncArgumentDbgValue(const Value *V, MDNode *Variable,
return false;
MachineInstrBuilder MIB = BuildMI(MF, getCurDebugLoc(),
- TII->get(TargetOpcode::DBG_VALUE))
- .addReg(Reg, RegState::Debug).addImm(Offset).addMetadata(Variable);
+ TII->get(TargetOpcode::DBG_VALUE),
+ Offset != 0,
+ Reg, Offset, Variable);
FuncInfo.ArgDbgValues.push_back(&*MIB);
return true;
}
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index e21f26e91c..806e4640bf 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -418,12 +418,14 @@ bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
MachineBasicBlock::iterator InsertPos = Def;
const MDNode *Variable =
MI->getOperand(MI->getNumOperands()-1).getMetadata();
- unsigned Offset = MI->getOperand(1).getImm();
+ unsigned Offset = 0;
+ if (MI->getOperand(1).isImm())
+ Offset = MI->getOperand(1).getImm();
// Def is never a terminator here, so it is ok to increment InsertPos.
BuildMI(*EntryMBB, ++InsertPos, MI->getDebugLoc(),
- TII.get(TargetOpcode::DBG_VALUE))
- .addReg(LDI->second, RegState::Debug)
- .addImm(Offset).addMetadata(Variable);
+ TII.get(TargetOpcode::DBG_VALUE),
+ MI->getOperand(1).isReg(),
+ LDI->second, Offset, Variable);
// If this vreg is directly copied into an exported register then
// that COPY instructions also need DBG_VALUE, if it is the only
@@ -442,9 +444,10 @@ bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
if (CopyUseMI) {
MachineInstr *NewMI =
BuildMI(*MF, CopyUseMI->getDebugLoc(),
- TII.get(TargetOpcode::DBG_VALUE))
- .addReg(CopyUseMI->getOperand(0).getReg(), RegState::Debug)
- .addImm(Offset).addMetadata(Variable);
+ TII.get(TargetOpcode::DBG_VALUE),
+ Offset!=0,
+ CopyUseMI->getOperand(0).getReg(),
+ Offset, Variable);
MachineBasicBlock::iterator Pos = CopyUseMI;
EntryMBB->insertAfter(Pos, NewMI);
}
diff --git a/test/CodeGen/ARM/debug-info-branch-folding.ll b/test/CodeGen/ARM/debug-info-branch-folding.ll
index 38945ac2ea..364519fb19 100644
--- a/test/CodeGen/ARM/debug-info-branch-folding.ll
+++ b/test/CodeGen/ARM/debug-info-branch-folding.ll
@@ -5,8 +5,8 @@ target triple = "thumbv7-apple-macosx10.6.7"
;CHECK: vadd.f32 q4, q8, q8
;CHECK-NEXT: LBB0_1
-;CHECK:@DEBUG_VALUE: x <- Q4+0
-;CHECK-NEXT:@DEBUG_VALUE: y <- Q4+0
+;CHECK:@DEBUG_VALUE: x <- Q4
+;CHECK-NEXT:@DEBUG_VALUE: y <- Q4
@.str = external constant [13 x i8]
diff --git a/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll b/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll
index b764b0b345..b07a1929f8 100644
--- a/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll
+++ b/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll
@@ -8,7 +8,7 @@ target triple = "x86_64-apple-darwin10.2"
@llvm.used = appending global [1 x i8*] [i8* bitcast (i32 (%struct.foo*, i32)* @_ZN3foo3bazEi to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
define i32 @_ZN3foo3bazEi(%struct.foo* nocapture %this, i32 %x) nounwind readnone optsize noinline ssp align 2 {
-;CHECK: DEBUG_VALUE: baz:this <- RDI+0
+;CHECK: DEBUG_VALUE: baz:this <- RDI
entry:
tail call void @llvm.dbg.value(metadata !{%struct.foo* %this}, i64 0, metadata !15)
tail call void @llvm.dbg.value(metadata !{i32 %x}, i64 0, metadata !16)
diff --git a/test/CodeGen/X86/dbg-value-dag-combine.ll b/test/CodeGen/X86/dbg-value-dag-combine.ll
index c63235e7ad..36c6fac7e6 100644
--- a/test/CodeGen/X86/dbg-value-dag-combine.ll
+++ b/test/CodeGen/X86/dbg-value-dag-combine.ll
@@ -16,7 +16,7 @@ entry:
call void @llvm.dbg.value(metadata !12, i64 0, metadata !13), !dbg !14
%tmp2 = load i32 addrspace(1)* %ip, align 4, !dbg !15
%tmp3 = add i32 0, %tmp2, !dbg !15
-; CHECK: ##DEBUG_VALUE: idx <- EAX+0
+; CHECK: ##DEBUG_VALUE: idx <- EAX
call void @llvm.dbg.value(metadata !{i32 %tmp3}, i64 0, metadata !13), !dbg
!15
%arrayidx = getelementptr i32 addrspace(1)* %ip, i32 %1, !dbg !16
diff --git a/test/CodeGen/X86/dbg-value-range.ll b/test/CodeGen/X86/dbg-value-range.ll
index b068bbbe78..83aa34e8a4 100644
--- a/test/CodeGen/X86/dbg-value-range.ll
+++ b/test/CodeGen/X86/dbg-value-range.ll
@@ -40,7 +40,7 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
!21 = metadata !{metadata !6, metadata !11}
!22 = metadata !{metadata !"bar.c", metadata !"/private/tmp"}
-; Check that variable bar:b value range is appropriately trucated in debug info.
+; Check that variable bar:b value range is appropriately truncated in debug info.
; The variable is in %rdi which is clobbered by 'movl %ebx, %edi'
; Here Ltmp7 is the end of the location range.
@@ -54,7 +54,7 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
;CHECK-NEXT: Lset{{.*}} = Ltmp{{.*}}-Ltmp{{.*}}
;CHECK-NEXT: .short Lset
;CHECK-NEXT: Ltmp
-;CHECK-NEXT: .byte 85
+;CHECK-NEXT: .byte 85 ## DW_OP_reg
;CHECK-NEXT: Ltmp
;CHECK-NEXT: .quad 0
;CHECK-NEXT: .quad 0
diff --git a/test/DebugInfo/X86/op_deref.ll b/test/DebugInfo/X86/op_deref.ll
index c3580a790c..31fd57bcb2 100644
--- a/test/DebugInfo/X86/op_deref.ll
+++ b/test/DebugInfo/X86/op_deref.ll
@@ -1,10 +1,16 @@
; RUN: llc -O0 -mtriple=x86_64-apple-darwin %s -o %t -filetype=obj
-; RUN: llvm-dwarfdump -debug-dump=info %t | FileCheck %s
+; RUN: llvm-dwarfdump -debug-dump=info %t | FileCheck %s -check-prefix=DW-CHECK
-; CHECK: DW_AT_name [DW_FORM_strp] ( .debug_str[0x00000067] = "vla")
+; DW-CHECK: DW_AT_name [DW_FORM_strp] ( .debug_str[0x00000067] = "vla")
; FIXME: The location here needs to be fixed, but llvm-dwarfdump doesn't handle
; DW_AT_location lists yet.
-; CHECK: DW_AT_location [DW_FORM_data4] (0x00000000)
+; DW-CHECK: DW_AT_location [DW_FORM_data4] (0x00000000)
+
+; Unfortunately llvm-dwarfdump can't unparse a list of DW_AT_locations
+; right now, so we check the asm output:
+; RUN: llc -O0 -mtriple=x86_64-apple-darwin %s -o - -filetype=asm | FileCheck %s -check-prefix=ASM-CHECK
+; vla should have a register-indirect address at one point.
+; ASM-CHECK: DEBUG_VALUE: vla <- RCX+0
define void @testVLAwithSize(i32 %s) nounwind uwtable ssp {
entry:
diff --git a/test/DebugInfo/X86/vla.ll b/test/DebugInfo/X86/vla.ll
new file mode 100644
index 0000000000..783c50f0c2
--- /dev/null
+++ b/test/DebugInfo/X86/vla.ll
@@ -0,0 +1,104 @@
+; RUN: llc -O0 -mtriple=x86_64-apple-darwin -filetype=asm %s -o - | FileCheck %s
+; Ensure that we generate a breg+0 location for the variable length array a.
+; CHECK: ##DEBUG_VALUE: vla:a <- RDX+0
+; rdar://problem/13658587
+;
+; generated from:
+;
+; int vla(int n) {
+; int a[n];
+; a[0] = 42;
+; return a[n-1];
+; }
+;
+; int main(int argc, char** argv) {
+; return vla(argc);
+; }
+
+; ModuleID = 'vla.c'
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
+target triple = "x86_64-apple-macosx10.8.0"
+
+; Function Attrs: nounwind ssp uwtable
+define i32 @vla(i32 %n) nounwind ssp uwtable {
+entry:
+ %n.addr = alloca i32, align 4
+ %saved_stack = alloca i8*
+ %cleanup.dest.slot = alloca i32
+ store i32 %n, i32* %n.addr, align 4
+ call void @llvm.dbg.declare(metadata !{i32* %n.addr}, metadata !15), !dbg !16
+ %0 = load i32* %n.addr, align 4, !dbg !17
+ %1 = zext i32 %0 to i64, !dbg !17
+ %2 = call i8* @llvm.stacksave(), !dbg !17
+ store i8* %2, i8** %saved_stack, !dbg !17
+ %vla = alloca i32, i64 %1, align 16, !dbg !17
+ call void @llvm.dbg.declare(metadata !{i32* %vla}, metadata !18), !dbg !17
+ %arrayidx = getelementptr inbounds i32* %vla, i64 0, !dbg !22
+ store i32 42, i32* %arrayidx, align 4, !dbg !22
+ %3 = load i32* %n.addr, align 4, !dbg !23
+ %sub = sub nsw i32 %3, 1, !dbg !23
+ %idxprom = sext i32 %sub to i64, !dbg !23
+ %arrayidx1 = getelementptr inbounds i32* %vla, i64 %idxprom, !dbg !23
+ %4 = load i32* %arrayidx1, align 4, !dbg !23
+ store i32 1, i32* %cleanup.dest.slot
+ %5 = load i8** %saved_stack, !dbg !24
+ call void @llvm.stackrestore(i8* %5), !dbg !24
+ ret i32 %4, !dbg !23
+}
+
+; Function Attrs: nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+
+; Function Attrs: nounwind
+declare i8* @llvm.stacksave() nounwind
+
+; Function Attrs: nounwind
+declare void @llvm.stackrestore(i8*) nounwind
+
+; Function Attrs: nounwind ssp uwtable
+define i32 @main(i32 %argc, i8** %argv) nounwind ssp uwtable {
+entry:
+ %retval = alloca i32, align 4
+ %argc.addr = alloca i32, align 4
+ %argv.addr = alloca i8**, align 8
+ store i32 0, i32* %retval
+ store i32 %argc, i32* %argc.addr, align 4
+ call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !25), !dbg !26
+ store i8** %argv, i8*** %argv.addr, align 8
+ call void @llvm.dbg.declare(metadata !{i8*** %argv.addr}, metadata !27), !dbg !26
+ %0 = load i32* %argc.addr, align 4, !dbg !28
+ %call = call i32 @vla(i32 %0), !dbg !28
+ ret i32 %call, !dbg !28
+}
+
+!llvm.dbg.cu = !{!0}
+
+!0 = metadata !{i32 786449, metadata !1, i32 12, metadata !"clang version 3.3 ", i1 false, metadata !"", i32 0, metadata !2, metadata !2, metadata !3, metadata !2, metadata !2, metadata !""} ; [ DW_TAG_compile_unit ] [/vla.c] [DW_LANG_C99]
+!1 = metadata !{metadata !"vla.c", metadata !""}
+!2 = metadata !{i32 0}
+!3 = metadata !{metadata !4, metadata !9}
+!4 = metadata !{i32 786478, metadata !1, metadata !5, metadata !"vla", metadata !"vla", metadata !"", i32 1, metadata !6, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 (i32)* @vla, null, null, metadata !2, i32 1} ; [ DW_TAG_subprogram ] [line 1] [def] [vla]
+!5 = metadata !{i32 786473, metadata !1} ; [ DW_TAG_file_type ] [/vla.c]
+!6 = metadata !{i32 786453, i32 0, i32 0, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !7, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ]
+!7 = metadata !{metadata !8, metadata !8}
+!8 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed]
+!9 = metadata !{i32 786478, metadata !1, metadata !5, metadata !"main", metadata !"main", metadata !"", i32 7, metadata !10, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 (i32, i8**)* @main, null, null, metadata !2, i32 7} ; [ DW_TAG_subprogram ] [line 7] [def] [main]
+!10 = metadata !{i32 786453, i32 0, i32 0, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !11, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ]
+!11 = metadata !{metadata !8, metadata !8, metadata !12}
+!12 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !13} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from ]
+!13 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !14} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from char]
+!14 = metadata !{i32 786468, null, null, metadata !"char", i32 0, i64 8, i64 8, i64 0, i32 0, i32 6} ; [ DW_TAG_base_type ] [char] [line 0, size 8, align 8, offset 0, enc DW_ATE_signed_char]
+!15 = metadata !{i32 786689, metadata !4, metadata !"n", metadata !5, i32 16777217, metadata !8, i32 0, i32 0} ; [ DW_TAG_arg_variable ] [n] [line 1]
+!16 = metadata !{i32 1, i32 0, metadata !4, null}
+!17 = metadata !{i32 2, i32 0, metadata !4, null}
+!18 = metadata !{i32 786688, metadata !4, metadata !"a", metadata !5, i32 2, metadata !19, i32 0, i32 0} ; [ DW_TAG_auto_variable ] [a] [line 2]
+!19 = metadata !{i32 786433, null, null, metadata !"", i32 0, i64 0, i64 32, i32 0, i32 0, metadata !8, metadata !20, i32 0, i32 0} ; [ DW_TAG_array_type ] [line 0, size 0, align 32, offset 0] [from int]
+!20 = metadata !{metadata !21}
+!21 = metadata !{i32 786465, i64 0, i64 -1} ; [ DW_TAG_subrange_type ] [unbounded]
+!22 = metadata !{i32 3, i32 0, metadata !4, null}
+!23 = metadata !{i32 4, i32 0, metadata !4, null}
+!24 = metadata !{i32 5, i32 0, metadata !4, null}
+!25 = metadata !{i32 786689, metadata !9, metadata !"argc", metadata !5, i32 16777223, metadata !8, i32 0, i32 0} ; [ DW_TAG_arg_variable ] [argc] [line 7]
+!26 = metadata !{i32 7, i32 0, metadata !9, null}
+!27 = metadata !{i32 786689, metadata !9, metadata !"argv", metadata !5, i32 33554439, metadata !12, i32 0, i32 0} ; [ DW_TAG_arg_variable ] [argv] [line 7]
+!28 = metadata !{i32 8, i32 0, metadata !9, null}
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-13 03:48:51 +0000