diff options
| -rw-r--r-- | lib/Target/X86/X86Instr64bit.td | 2 | ||||
| -rw-r--r-- | lib/Target/X86/X86InstrFormats.td | 12 | ||||
| -rw-r--r-- | lib/Target/X86/X86InstrInfo.h | 12 | ||||
| -rw-r--r-- | lib/Target/X86/X86InstrInfo.td | 6 | ||||
| -rw-r--r-- | lib/Target/X86/X86MCCodeEmitter.cpp | 16 | ||||
| -rw-r--r-- | test/MC/AsmParser/X86/x86_32-new-encoder.s | 18 | ||||
| -rw-r--r-- | test/MC/Disassembler/simple-tests.txt | 12 | ||||
| -rw-r--r-- | utils/TableGen/X86RecognizableInstr.cpp | 16 |
8 files changed, 73 insertions, 21 deletions
diff --git a/lib/Target/X86/X86Instr64bit.td b/lib/Target/X86/X86Instr64bit.td index 0d7bfeb81b..4ea3739629 100644 --- a/lib/Target/X86/X86Instr64bit.td +++ b/lib/Target/X86/X86Instr64bit.td @@ -1774,7 +1774,7 @@ def LSL64rm : RI<0x03, MRMSrcMem, (outs GR64:$dst), (ins i64mem:$src), def LSL64rr : RI<0x03, MRMSrcReg, (outs GR64:$dst), (ins GR64:$src), "lsl{q}\t{$src, $dst|$dst, $src}", []>, TB; -def SWPGS : I<0x01, RawFrm, (outs), (ins), "swpgs", []>, TB; +def SWAPGS : I<0x01, MRM_F8, (outs), (ins), "swapgs", []>, TB; def PUSHFS64 : I<0xa0, RawFrm, (outs), (ins), "push{q}\t%fs", []>, TB; diff --git a/lib/Target/X86/X86InstrFormats.td b/lib/Target/X86/X86InstrFormats.td index 8e3e514d58..8b934e0f86 100644 --- a/lib/Target/X86/X86InstrFormats.td +++ b/lib/Target/X86/X86InstrFormats.td @@ -30,10 +30,14 @@ def MRM3m : Format<27>; def MRM4m : Format<28>; def MRM5m : Format<29>; def MRM6m : Format<30>; def MRM7m : Format<31>; def MRMInitReg : Format<32>; def MRM_C1 : Format<33>; -def MRM_C8 : Format<34>; -def MRM_C9 : Format<35>; -def MRM_E8 : Format<36>; -def MRM_F0 : Format<37>; +def MRM_C2 : Format<34>; +def MRM_C3 : Format<35>; +def MRM_C4 : Format<36>; +def MRM_C8 : Format<37>; +def MRM_C9 : Format<38>; +def MRM_E8 : Format<39>; +def MRM_F0 : Format<40>; +def MRM_F8 : Format<41>; // ImmType - This specifies the immediate type used by an instruction. This is diff --git a/lib/Target/X86/X86InstrInfo.h b/lib/Target/X86/X86InstrInfo.h index 3872160942..9f50178fe6 100644 --- a/lib/Target/X86/X86InstrInfo.h +++ b/lib/Target/X86/X86InstrInfo.h @@ -271,10 +271,14 @@ namespace X86II { //// MRM_C1 - A mod/rm byte of exactly 0xC1. MRM_C1 = 33, - MRM_C8 = 34, - MRM_C9 = 35, - MRM_E8 = 36, - MRM_F0 = 37, + MRM_C2 = 34, + MRM_C3 = 35, + MRM_C4 = 36, + MRM_C8 = 37, + MRM_C9 = 38, + MRM_E8 = 39, + MRM_F0 = 40, + MRM_F8 = 41, FormMask = 63, diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index 7ef495711f..47ddf02421 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -4247,9 +4247,9 @@ def VMCALL : I<0x01, MRM_C1, (outs), (ins), "vmcall", []>, TB; def VMCLEARm : I<0xC7, MRM6m, (outs), (ins i64mem:$vmcs), "vmclear\t$vmcs", []>, OpSize, TB; // 0F 01 C2 -def VMLAUNCH : I<0x01, RawFrm, (outs), (ins), "vmlaunch", []>, TB; +def VMLAUNCH : I<0x01, MRM_C2, (outs), (ins), "vmlaunch", []>, TB; // 0F 01 C3 -def VMRESUME : I<0x01, RawFrm, (outs), (ins), "vmresume", []>, TB; +def VMRESUME : I<0x01, MRM_C3, (outs), (ins), "vmresume", []>, TB; def VMPTRLDm : I<0xC7, MRM6m, (outs), (ins i64mem:$vmcs), "vmptrld\t$vmcs", []>, TB; def VMPTRSTm : I<0xC7, MRM7m, (outs i64mem:$vmcs), (ins), @@ -4271,7 +4271,7 @@ def VMWRITE32rm : I<0x79, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src), def VMWRITE32rr : I<0x79, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src), "vmwrite{l}\t{$src, $dst|$dst, $src}", []>, TB; // 0F 01 C4 -def VMXOFF : I<0x01, RawFrm, (outs), (ins), "vmxoff", []>, OpSize; +def VMXOFF : I<0x01, MRM_C4, (outs), (ins), "vmxoff", []>, TB; def VMXON : I<0xC7, MRM6m, (outs), (ins i64mem:$vmxon), "vmxon\t{$vmxon}", []>, XD; diff --git a/lib/Target/X86/X86MCCodeEmitter.cpp b/lib/Target/X86/X86MCCodeEmitter.cpp index c06e50a9eb..1dc592ce7c 100644 --- a/lib/Target/X86/X86MCCodeEmitter.cpp +++ b/lib/Target/X86/X86MCCodeEmitter.cpp @@ -585,6 +585,18 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS, EmitByte(BaseOpcode, CurByte, OS); EmitByte(0xC1, CurByte, OS); break; + case X86II::MRM_C2: + EmitByte(BaseOpcode, CurByte, OS); + EmitByte(0xC2, CurByte, OS); + break; + case X86II::MRM_C3: + EmitByte(BaseOpcode, CurByte, OS); + EmitByte(0xC3, CurByte, OS); + break; + case X86II::MRM_C4: + EmitByte(BaseOpcode, CurByte, OS); + EmitByte(0xC4, CurByte, OS); + break; case X86II::MRM_C8: EmitByte(BaseOpcode, CurByte, OS); EmitByte(0xC8, CurByte, OS); @@ -601,6 +613,10 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS, EmitByte(BaseOpcode, CurByte, OS); EmitByte(0xF0, CurByte, OS); break; + case X86II::MRM_F8: + EmitByte(BaseOpcode, CurByte, OS); + EmitByte(0xF8, CurByte, OS); + break; } // If there is a remaining operand, it must be a trailing immediate. Emit it diff --git a/test/MC/AsmParser/X86/x86_32-new-encoder.s b/test/MC/AsmParser/X86/x86_32-new-encoder.s index 5c47885cf6..771fc93521 100644 --- a/test/MC/AsmParser/X86/x86_32-new-encoder.s +++ b/test/MC/AsmParser/X86/x86_32-new-encoder.s @@ -11,4 +11,20 @@ // CHECK: encoding: [0x0f,0x01,0xc8] mwait // CHECK: mwait -// CHECK: encoding: [0x0f,0x01,0xc9]
\ No newline at end of file +// CHECK: encoding: [0x0f,0x01,0xc9] + + vmcall +// CHECK: vmcall +// CHECK: encoding: [0x0f,0x01,0xc1] + vmlaunch +// CHECK: vmlaunch +// CHECK: encoding: [0x0f,0x01,0xc2] + vmresume +// CHECK: vmresume +// CHECK: encoding: [0x0f,0x01,0xc3] + vmxoff +// CHECK: vmxoff +// CHECK: encoding: [0x0f,0x01,0xc4] + swapgs +// CHECK: swapgs +// CHECK: encoding: [0x0f,0x01,0xf8] diff --git a/test/MC/Disassembler/simple-tests.txt b/test/MC/Disassembler/simple-tests.txt index 376748a1db..c260945ff7 100644 --- a/test/MC/Disassembler/simple-tests.txt +++ b/test/MC/Disassembler/simple-tests.txt @@ -27,3 +27,15 @@ # CHECK: vmcall 0x0f 0x01 0xc1 + +# CHECK: vmlaunch +0x0f 0x01 0xc2 + +# CHECK: vmresume +0x0f 0x01 0xc3 + +# CHECK: vmxoff +0x0f 0x01 0xc4 + +# CHECK: swapgs +0x0f 0x01 0xf8
\ No newline at end of file diff --git a/utils/TableGen/X86RecognizableInstr.cpp b/utils/TableGen/X86RecognizableInstr.cpp index f53927ded7..5c2bf772b7 100644 --- a/utils/TableGen/X86RecognizableInstr.cpp +++ b/utils/TableGen/X86RecognizableInstr.cpp @@ -26,10 +26,14 @@ using namespace llvm; #define MRM_MAPPING \ MAP(C1, 33) \ - MAP(C8, 34) \ - MAP(C9, 35) \ - MAP(E8, 36) \ - MAP(F0, 37) + MAP(C2, 34) \ + MAP(C3, 35) \ + MAP(C4, 36) \ + MAP(C8, 37) \ + MAP(C9, 38) \ + MAP(E8, 39) \ + MAP(F0, 40) \ + MAP(F8, 41) // A clone of X86 since we can't depend on something that is generated. namespace X86Local { @@ -591,12 +595,8 @@ void RecognizableInstr::emitDecodePath(DisassemblerTables &tables) const { return; \ } - EXACTCASE(TWOBYTE, "SWPGS", 0xf8) EXACTCASE(TWOBYTE, "INVEPT", 0x80) EXACTCASE(TWOBYTE, "INVVPID", 0x81) - EXACTCASE(TWOBYTE, "VMLAUNCH", 0xc2) - EXACTCASE(TWOBYTE, "VMRESUME", 0xc3) - EXACTCASE(TWOBYTE, "VMXOFF", 0xc4) if (Name == "INVLPG") { tables.setTableFields(TWOBYTE, |