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-rw-r--r--lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp2
-rw-r--r--lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h9
-rw-r--r--lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp2
-rw-r--r--lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp5
-rw-r--r--lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h25
-rw-r--r--lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp3
-rw-r--r--lib/Target/PowerPC/PPC.h2
-rw-r--r--lib/Target/PowerPC/PPCAsmPrinter.cpp23
-rw-r--r--lib/Target/PowerPC/PPCMCInstLower.cpp18
-rw-r--r--test/CodeGen/PowerPC/asm-dialect.ll18
10 files changed, 65 insertions, 42 deletions
diff --git a/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp b/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
index 790a98e06d..af91ffbd23 100644
--- a/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
+++ b/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
@@ -1015,7 +1015,7 @@ ParseExpression(const MCExpr *&EVal) {
PPCMCExpr::VariantKind Variant;
const MCExpr *E = ExtractModifierFromExpr(EVal, Variant);
if (E)
- EVal = PPCMCExpr::Create(Variant, E, getParser().getContext());
+ EVal = PPCMCExpr::Create(Variant, E, false, getParser().getContext());
return false;
}
diff --git a/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h b/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h
index 270c24104e..8a4c03d645 100644
--- a/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h
+++ b/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h
@@ -21,15 +21,14 @@ namespace llvm {
class MCOperand;
class PPCInstPrinter : public MCInstPrinter {
- // 0 -> AIX, 1 -> Darwin.
- unsigned SyntaxVariant;
+ bool IsDarwin;
public:
PPCInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
- const MCRegisterInfo &MRI, unsigned syntaxVariant)
- : MCInstPrinter(MAI, MII, MRI), SyntaxVariant(syntaxVariant) {}
+ const MCRegisterInfo &MRI, bool isDarwin)
+ : MCInstPrinter(MAI, MII, MRI), IsDarwin(isDarwin) {}
bool isDarwinSyntax() const {
- return SyntaxVariant == 1;
+ return IsDarwin;
}
virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
diff --git a/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp b/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
index bb7ce6f23c..682250774d 100644
--- a/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
+++ b/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
@@ -66,6 +66,6 @@ PPCLinuxMCAsmInfo::PPCLinuxMCAsmInfo(bool is64Bit) {
ZeroDirective = "\t.space\t";
Data64bitsDirective = is64Bit ? "\t.quad\t" : 0;
- AssemblerDialect = 0; // Old-Style mnemonics.
+ AssemblerDialect = 1; // New-Style mnemonics.
}
diff --git a/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp b/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp
index db0f57dfb3..95292679bb 100644
--- a/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp
+++ b/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp
@@ -17,9 +17,8 @@ using namespace llvm;
const PPCMCExpr*
PPCMCExpr::Create(VariantKind Kind, const MCExpr *Expr,
- MCContext &Ctx) {
- int AssemblerDialect = Ctx.getAsmInfo()->getAssemblerDialect();
- return new (Ctx) PPCMCExpr(Kind, Expr, AssemblerDialect);
+ bool isDarwin, MCContext &Ctx) {
+ return new (Ctx) PPCMCExpr(Kind, Expr, isDarwin);
}
void PPCMCExpr::PrintImpl(raw_ostream &OS) const {
diff --git a/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h b/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h
index 3cbb493bc6..e44c7c1adc 100644
--- a/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h
+++ b/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h
@@ -32,29 +32,32 @@ public:
private:
const VariantKind Kind;
const MCExpr *Expr;
- const int AssemblerDialect;
+ bool IsDarwin;
explicit PPCMCExpr(VariantKind _Kind, const MCExpr *_Expr,
- int _AssemblerDialect)
- : Kind(_Kind), Expr(_Expr), AssemblerDialect(_AssemblerDialect) {}
+ bool _IsDarwin)
+ : Kind(_Kind), Expr(_Expr), IsDarwin(_IsDarwin) {}
public:
/// @name Construction
/// @{
static const PPCMCExpr *Create(VariantKind Kind, const MCExpr *Expr,
- MCContext &Ctx);
+ bool isDarwin, MCContext &Ctx);
- static const PPCMCExpr *CreateLo(const MCExpr *Expr, MCContext &Ctx) {
- return Create(VK_PPC_LO, Expr, Ctx);
+ static const PPCMCExpr *CreateLo(const MCExpr *Expr,
+ bool isDarwin, MCContext &Ctx) {
+ return Create(VK_PPC_LO, Expr, isDarwin, Ctx);
}
- static const PPCMCExpr *CreateHi(const MCExpr *Expr, MCContext &Ctx) {
- return Create(VK_PPC_HI, Expr, Ctx);
+ static const PPCMCExpr *CreateHi(const MCExpr *Expr,
+ bool isDarwin, MCContext &Ctx) {
+ return Create(VK_PPC_HI, Expr, isDarwin, Ctx);
}
- static const PPCMCExpr *CreateHa(const MCExpr *Expr, MCContext &Ctx) {
- return Create(VK_PPC_HA, Expr, Ctx);
+ static const PPCMCExpr *CreateHa(const MCExpr *Expr,
+ bool isDarwin, MCContext &Ctx) {
+ return Create(VK_PPC_HA, Expr, isDarwin, Ctx);
}
/// @}
@@ -68,7 +71,7 @@ public:
const MCExpr *getSubExpr() const { return Expr; }
/// isDarwinSyntax - True if expression is to be printed using Darwin syntax.
- bool isDarwinSyntax() const { return AssemblerDialect == 1; }
+ bool isDarwinSyntax() const { return IsDarwin; }
/// @}
diff --git a/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp b/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
index 2da30f9038..29c49a5e97 100644
--- a/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
+++ b/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
@@ -117,7 +117,8 @@ static MCInstPrinter *createPPCMCInstPrinter(const Target &T,
const MCInstrInfo &MII,
const MCRegisterInfo &MRI,
const MCSubtargetInfo &STI) {
- return new PPCInstPrinter(MAI, MII, MRI, SyntaxVariant);
+ bool isDarwin = Triple(STI.getTargetTriple()).isOSDarwin();
+ return new PPCInstPrinter(MAI, MII, MRI, isDarwin);
}
extern "C" void LLVMInitializePowerPCTargetMC() {
diff --git a/lib/Target/PowerPC/PPC.h b/lib/Target/PowerPC/PPC.h
index 96b882aef1..f0d5af2446 100644
--- a/lib/Target/PowerPC/PPC.h
+++ b/lib/Target/PowerPC/PPC.h
@@ -40,7 +40,7 @@ namespace llvm {
FunctionPass *createPPCJITCodeEmitterPass(PPCTargetMachine &TM,
JITCodeEmitter &MCE);
void LowerPPCMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
- AsmPrinter &AP);
+ AsmPrinter &AP, bool isDarwin);
/// \brief Creates an PPC-specific Target Transformation Info pass.
ImmutablePass *createPPCTargetTransformInfoPass(const PPCTargetMachine *TM);
diff --git a/lib/Target/PowerPC/PPCAsmPrinter.cpp b/lib/Target/PowerPC/PPCAsmPrinter.cpp
index 8f41b2e7f7..8a6c514264 100644
--- a/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -352,7 +352,7 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
case PPC::LDtocCPT:
case PPC::LDtoc: {
// Transform %X3 = LDtoc <ga:@min1>, %X2
- LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
+ LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, Subtarget.isDarwin());
// Change the opcode to LD, and the global address operand to be a
// reference to the TOC entry we will synthesize later.
@@ -381,7 +381,7 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
case PPC::ADDIStocHA: {
// Transform %Xd = ADDIStocHA %X2, <ga:@sym>
- LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
+ LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, Subtarget.isDarwin());
// Change the opcode to ADDIS8. If the global address is external,
// has common linkage, is a function address, or is a jump table
@@ -425,7 +425,7 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
}
case PPC::LDtocL: {
// Transform %Xd = LDtocL <ga:@sym>, %Xs
- LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
+ LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, Subtarget.isDarwin());
// Change the opcode to LD. If the global address is external, has
// common linkage, or is a jump table address, then reference the
@@ -462,7 +462,7 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
}
case PPC::ADDItocL: {
// Transform %Xd = ADDItocL %Xs, <ga:@sym>
- LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
+ LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, Subtarget.isDarwin());
// Change the opcode to ADDI8. If the global address is external, then
// generate a TOC entry and reference that. Otherwise reference the
@@ -514,7 +514,7 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
}
case PPC::LDgotTprelL: {
// Transform %Xd = LDgotTprelL <ga:@sym>, %Xs
- LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
+ LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, Subtarget.isDarwin());
// Change the opcode to LD.
TmpInst.setOpcode(PPC::LD);
@@ -720,7 +720,7 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
}
}
- LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
+ LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, Subtarget.isDarwin());
OutStreamer.EmitInstruction(TmpInst);
}
@@ -891,6 +891,7 @@ static MCSymbol *GetAnonSym(MCSymbol *Sym, MCContext &Ctx) {
void PPCDarwinAsmPrinter::
EmitFunctionStubs(const MachineModuleInfoMachO::SymbolListTy &Stubs) {
bool isPPC64 = TM.getDataLayout()->getPointerSizeInBits() == 64;
+ bool isDarwin = Subtarget.isDarwin();
const TargetLoweringObjectFileMachO &TLOFMacho =
static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering());
@@ -930,7 +931,7 @@ EmitFunctionStubs(const MachineModuleInfoMachO::SymbolListTy &Stubs) {
// mflr r11
OutStreamer.EmitInstruction(MCInstBuilder(PPC::MFLR).addReg(PPC::R11));
// addis r11, r11, ha16(LazyPtr - AnonSymbol)
- const MCExpr *SubHa16 = PPCMCExpr::CreateHa(Sub, OutContext);
+ const MCExpr *SubHa16 = PPCMCExpr::CreateHa(Sub, isDarwin, OutContext);
OutStreamer.EmitInstruction(MCInstBuilder(PPC::ADDIS)
.addReg(PPC::R11)
.addReg(PPC::R11)
@@ -940,7 +941,7 @@ EmitFunctionStubs(const MachineModuleInfoMachO::SymbolListTy &Stubs) {
// ldu r12, lo16(LazyPtr - AnonSymbol)(r11)
// lwzu r12, lo16(LazyPtr - AnonSymbol)(r11)
- const MCExpr *SubLo16 = PPCMCExpr::CreateLo(Sub, OutContext);
+ const MCExpr *SubLo16 = PPCMCExpr::CreateLo(Sub, isDarwin, OutContext);
OutStreamer.EmitInstruction(MCInstBuilder(isPPC64 ? PPC::LDU : PPC::LWZU)
.addReg(PPC::R12)
.addExpr(SubLo16).addExpr(SubLo16)
@@ -985,14 +986,16 @@ EmitFunctionStubs(const MachineModuleInfoMachO::SymbolListTy &Stubs) {
OutStreamer.EmitSymbolAttribute(RawSym, MCSA_IndirectSymbol);
// lis r11, ha16(LazyPtr)
- const MCExpr *LazyPtrHa16 = PPCMCExpr::CreateHa(LazyPtrExpr, OutContext);
+ const MCExpr *LazyPtrHa16 =
+ PPCMCExpr::CreateHa(LazyPtrExpr, isDarwin, OutContext);
OutStreamer.EmitInstruction(MCInstBuilder(PPC::LIS)
.addReg(PPC::R11)
.addExpr(LazyPtrHa16));
// ldu r12, lo16(LazyPtr)(r11)
// lwzu r12, lo16(LazyPtr)(r11)
- const MCExpr *LazyPtrLo16 = PPCMCExpr::CreateLo(LazyPtrExpr, OutContext);
+ const MCExpr *LazyPtrLo16 =
+ PPCMCExpr::CreateLo(LazyPtrExpr, isDarwin, OutContext);
OutStreamer.EmitInstruction(MCInstBuilder(isPPC64 ? PPC::LDU : PPC::LWZU)
.addReg(PPC::R12)
.addExpr(LazyPtrLo16).addExpr(LazyPtrLo16)
diff --git a/lib/Target/PowerPC/PPCMCInstLower.cpp b/lib/Target/PowerPC/PPCMCInstLower.cpp
index b7e88d452c..d69aa4a0fb 100644
--- a/lib/Target/PowerPC/PPCMCInstLower.cpp
+++ b/lib/Target/PowerPC/PPCMCInstLower.cpp
@@ -105,7 +105,7 @@ static MCSymbol *GetSymbolFromOperand(const MachineOperand &MO, AsmPrinter &AP){
}
static MCOperand GetSymbolRef(const MachineOperand &MO, const MCSymbol *Symbol,
- AsmPrinter &Printer) {
+ AsmPrinter &Printer, bool isDarwin) {
MCContext &Ctx = Printer.OutContext;
MCSymbolRefExpr::VariantKind RefKind = MCSymbolRefExpr::VK_None;
@@ -150,10 +150,10 @@ static MCOperand GetSymbolRef(const MachineOperand &MO, const MCSymbol *Symbol,
// Add ha16() / lo16() markers if required.
switch (access) {
case PPCII::MO_LO:
- Expr = PPCMCExpr::CreateLo(Expr, Ctx);
+ Expr = PPCMCExpr::CreateLo(Expr, isDarwin, Ctx);
break;
case PPCII::MO_HA:
- Expr = PPCMCExpr::CreateHa(Expr, Ctx);
+ Expr = PPCMCExpr::CreateHa(Expr, isDarwin, Ctx);
break;
}
@@ -161,7 +161,7 @@ static MCOperand GetSymbolRef(const MachineOperand &MO, const MCSymbol *Symbol,
}
void llvm::LowerPPCMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
- AsmPrinter &AP) {
+ AsmPrinter &AP, bool isDarwin) {
OutMI.setOpcode(MI->getOpcode());
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
@@ -185,17 +185,17 @@ void llvm::LowerPPCMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
break;
case MachineOperand::MO_GlobalAddress:
case MachineOperand::MO_ExternalSymbol:
- MCOp = GetSymbolRef(MO, GetSymbolFromOperand(MO, AP), AP);
+ MCOp = GetSymbolRef(MO, GetSymbolFromOperand(MO, AP), AP, isDarwin);
break;
case MachineOperand::MO_JumpTableIndex:
- MCOp = GetSymbolRef(MO, AP.GetJTISymbol(MO.getIndex()), AP);
+ MCOp = GetSymbolRef(MO, AP.GetJTISymbol(MO.getIndex()), AP, isDarwin);
break;
case MachineOperand::MO_ConstantPoolIndex:
- MCOp = GetSymbolRef(MO, AP.GetCPISymbol(MO.getIndex()), AP);
+ MCOp = GetSymbolRef(MO, AP.GetCPISymbol(MO.getIndex()), AP, isDarwin);
break;
case MachineOperand::MO_BlockAddress:
- MCOp = GetSymbolRef(MO, AP.GetBlockAddressSymbol(MO.getBlockAddress()),
- AP);
+ MCOp = GetSymbolRef(MO,AP.GetBlockAddressSymbol(MO.getBlockAddress()),AP,
+ isDarwin);
break;
case MachineOperand::MO_RegisterMask:
continue;
diff --git a/test/CodeGen/PowerPC/asm-dialect.ll b/test/CodeGen/PowerPC/asm-dialect.ll
new file mode 100644
index 0000000000..e8fd2516b5
--- /dev/null
+++ b/test/CodeGen/PowerPC/asm-dialect.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu | FileCheck %s
+; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu | FileCheck %s
+; RUN: llc < %s -mtriple=powerpc-apple-darwin | FileCheck %s
+; RUN: llc < %s -mtriple=powerpc64-apple-darwin | FileCheck %s
+
+; This test verifies that we choose "assembler variant 1" (which GCC
+; uses for "new-style mnemonics" as opposed to POWER mnemonics) when
+; processing multi-variant inline asm statements, on all subtargets.
+
+; CHECK: subfe
+; CHECK-NOT: sfe
+
+define i32 @test(i32 %in1, i32 %in2) {
+entry:
+ %0 = tail call i32 asm "$(sfe$|subfe$) $0,$1,$2", "=r,r,r"(i32 %in1, i32 %in2)
+ ret i32 %0
+}
+