diff options
-rw-r--r-- | include/llvm/CodeGen/MachineInstr.h | 16 | ||||
-rw-r--r-- | lib/Target/ARM64/ARM64DeadRegisterDefinitionsPass.cpp | 5 | ||||
-rw-r--r-- | lib/Target/R600/AMDGPUMCInstLower.cpp | 4 |
3 files changed, 18 insertions, 7 deletions
diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h index 440d3a1302..217d2b1666 100644 --- a/include/llvm/CodeGen/MachineInstr.h +++ b/include/llvm/CodeGen/MachineInstr.h @@ -293,6 +293,22 @@ public: iterator_range<const_mop_iterator> operands() const { return iterator_range<const_mop_iterator>(operands_begin(), operands_end()); } + iterator_range<mop_iterator> explicit_operands() { + return iterator_range<mop_iterator>( + operands_begin(), operands_begin() + getNumExplicitOperands()); + } + iterator_range<const_mop_iterator> explicit_operands() const { + return iterator_range<const_mop_iterator>( + operands_begin(), operands_begin() + getNumExplicitOperands()); + } + iterator_range<mop_iterator> implicit_operands() { + return iterator_range<mop_iterator>(explicit_operands().end(), + operands_end()); + } + iterator_range<const_mop_iterator> implicit_operands() const { + return iterator_range<const_mop_iterator>(explicit_operands().end(), + operands_end()); + } /// Access to memory operands of the instruction mmo_iterator memoperands_begin() const { return MemRefs; } diff --git a/lib/Target/ARM64/ARM64DeadRegisterDefinitionsPass.cpp b/lib/Target/ARM64/ARM64DeadRegisterDefinitionsPass.cpp index f85dbaa806..f6034dcf4d 100644 --- a/lib/Target/ARM64/ARM64DeadRegisterDefinitionsPass.cpp +++ b/lib/Target/ARM64/ARM64DeadRegisterDefinitionsPass.cpp @@ -50,13 +50,10 @@ char ARM64DeadRegisterDefinitions::ID = 0; bool ARM64DeadRegisterDefinitions::implicitlyDefinesSubReg( unsigned Reg, const MachineInstr *MI) { - for (unsigned i = MI->getNumExplicitOperands(), e = MI->getNumOperands(); - i != e; ++i) { - const MachineOperand &MO = MI->getOperand(i); + for (const MachineOperand &MO : MI->implicit_operands()) if (MO.isReg() && MO.isDef()) if (TRI->isSubRegister(Reg, MO.getReg())) return true; - } return false; } diff --git a/lib/Target/R600/AMDGPUMCInstLower.cpp b/lib/Target/R600/AMDGPUMCInstLower.cpp index 2c9909ff9d..d65b00f018 100644 --- a/lib/Target/R600/AMDGPUMCInstLower.cpp +++ b/lib/Target/R600/AMDGPUMCInstLower.cpp @@ -38,9 +38,7 @@ AMDGPUMCInstLower::AMDGPUMCInstLower(MCContext &ctx): void AMDGPUMCInstLower::lower(const MachineInstr *MI, MCInst &OutMI) const { OutMI.setOpcode(MI->getOpcode()); - for (unsigned i = 0, e = MI->getNumExplicitOperands(); i != e; ++i) { - const MachineOperand &MO = MI->getOperand(i); - + for (const MachineOperand &MO : MI->explicit_operands()) { MCOperand MCOp; switch (MO.getType()) { default: |