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-rw-r--r--lib/Target/Mips/AsmParser/MipsAsmParser.cpp3
-rw-r--r--test/MC/Mips/mips-fpu-instructions.s4
2 files changed, 7 insertions, 0 deletions
diff --git a/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
index c403f216b0..e8319f100f 100644
--- a/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+++ b/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -778,6 +778,9 @@ int MipsAsmParser::matchCPURegisterName(StringRef Name) {
}
int MipsAsmParser::matchRegisterName(StringRef Name, bool is64BitReg) {
+ if (Name.equals("fcc0"))
+ return Mips::FCC0;
+
int CC;
CC = matchCPURegisterName(Name);
if (CC != -1)
diff --git a/test/MC/Mips/mips-fpu-instructions.s b/test/MC/Mips/mips-fpu-instructions.s
index 29dc471db1..e515872f26 100644
--- a/test/MC/Mips/mips-fpu-instructions.s
+++ b/test/MC/Mips/mips-fpu-instructions.s
@@ -156,6 +156,8 @@
# CHECK: mtc0 $9, $8, 3 # encoding: [0x03,0x40,0x89,0x40]
# CHECK: mfc2 $5, $7, 4 # encoding: [0x04,0x38,0x05,0x48]
# CHECK: mtc2 $9, $4, 5 # encoding: [0x05,0x20,0x89,0x48]
+# CHECK: movf $2, $1, $fcc0 # encoding: [0x01,0x10,0x20,0x00]
+# CHECK: movt $2, $1, $fcc0 # encoding: [0x01,0x10,0x21,0x00]
cfc1 $a2,$0
mfc1 $a2,$f7
@@ -175,3 +177,5 @@
mtc0 $9, $8, 3
mfc2 $5, $7, 4
mtc2 $9, $4, 5
+ movf $2, $1, $fcc0
+ movt $2, $1, $fcc0