diff options
124 files changed, 350 insertions, 341 deletions
diff --git a/include/llvm/ADT/EquivalenceClasses.h b/include/llvm/ADT/EquivalenceClasses.h index f50992ee60..e0396c7e79 100644 --- a/include/llvm/ADT/EquivalenceClasses.h +++ b/include/llvm/ADT/EquivalenceClasses.h @@ -86,14 +86,14 @@ class EquivalenceClasses { } void setNext(const ECValue *NewNext) const { - assert(getNext() == 0 && "Already has a next pointer!"); + assert(getNext() == nullptr && "Already has a next pointer!"); Next = (const ECValue*)((intptr_t)NewNext | (intptr_t)isLeader()); } public: ECValue(const ECValue &RHS) : Leader(this), Next((ECValue*)(intptr_t)1), Data(RHS.Data) { // Only support copying of singleton nodes. - assert(RHS.isLeader() && RHS.getNext() == 0 && "Not a singleton!"); + assert(RHS.isLeader() && RHS.getNext() == nullptr && "Not a singleton!"); } bool operator<(const ECValue &UFN) const { return Data < UFN.Data; } @@ -251,13 +251,13 @@ public: explicit member_iterator(const ECValue *N) : Node(N) {} reference operator*() const { - assert(Node != 0 && "Dereferencing end()!"); + assert(Node != nullptr && "Dereferencing end()!"); return Node->getData(); } reference operator->() const { return operator*(); } member_iterator &operator++() { - assert(Node != 0 && "++'d off the end of the list!"); + assert(Node != nullptr && "++'d off the end of the list!"); Node = Node->getNext(); return *this; } diff --git a/include/llvm/Analysis/BlockFrequencyInfoImpl.h b/include/llvm/Analysis/BlockFrequencyInfoImpl.h index e5e9b47952..1b8ba91593 100644 --- a/include/llvm/Analysis/BlockFrequencyInfoImpl.h +++ b/include/llvm/Analysis/BlockFrequencyInfoImpl.h @@ -1395,7 +1395,7 @@ public: void doFunction(const FunctionT *F, const BranchProbabilityInfoT *BPI, const LoopInfoT *LI); - BlockFrequencyInfoImpl() : BPI(0), LI(0), F(0) {} + BlockFrequencyInfoImpl() : BPI(nullptr), LI(nullptr), F(nullptr) {} using BlockFrequencyInfoImplBase::getEntryFreq; BlockFrequency getBlockFreq(const BlockT *BB) const { diff --git a/lib/Analysis/IPA/CallGraph.cpp b/lib/Analysis/IPA/CallGraph.cpp index 1d29d64a13..caec253469 100644 --- a/lib/Analysis/IPA/CallGraph.cpp +++ b/lib/Analysis/IPA/CallGraph.cpp @@ -280,7 +280,7 @@ void CallGraphWrapperPass::print(raw_ostream &OS, const Module *) const { } #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) -void CallGraphWrapperPass::dump() const { print(dbgs(), 0); } +void CallGraphWrapperPass::dump() const { print(dbgs(), nullptr); } #endif // Enuse that users of CallGraph.h also link with this file diff --git a/lib/Bitcode/Reader/BitcodeReader.h b/lib/Bitcode/Reader/BitcodeReader.h index 15be31f039..593d8f93cc 100644 --- a/lib/Bitcode/Reader/BitcodeReader.h +++ b/lib/Bitcode/Reader/BitcodeReader.h @@ -224,13 +224,13 @@ public: } explicit BitcodeReader(MemoryBuffer *buffer, LLVMContext &C) - : Context(C), TheModule(0), Buffer(buffer), BufferOwned(false), - LazyStreamer(0), NextUnreadBit(0), SeenValueSymbolTable(false), + : Context(C), TheModule(nullptr), Buffer(buffer), BufferOwned(false), + LazyStreamer(nullptr), NextUnreadBit(0), SeenValueSymbolTable(false), ValueList(C), MDValueList(C), SeenFirstFunctionBody(false), UseRelativeIDs(false) { } explicit BitcodeReader(DataStreamer *streamer, LLVMContext &C) - : Context(C), TheModule(0), Buffer(0), BufferOwned(false), + : Context(C), TheModule(nullptr), Buffer(nullptr), BufferOwned(false), LazyStreamer(streamer), NextUnreadBit(0), SeenValueSymbolTable(false), ValueList(C), MDValueList(C), SeenFirstFunctionBody(false), UseRelativeIDs(false) { @@ -271,7 +271,7 @@ private: return ValueList.getValueFwdRef(ID, Ty); } BasicBlock *getBasicBlock(unsigned ID) const { - if (ID >= FunctionBBs.size()) return 0; // Invalid ID + if (ID >= FunctionBBs.size()) return nullptr; // Invalid ID return FunctionBBs[ID]; } AttributeSet getAttributes(unsigned i) const { @@ -293,15 +293,15 @@ private: if (ValNo < InstNum) { // If this is not a forward reference, just return the value we already // have. - ResVal = getFnValueByID(ValNo, 0); - return ResVal == 0; + ResVal = getFnValueByID(ValNo, nullptr); + return ResVal == nullptr; } else if (Slot == Record.size()) { return true; } unsigned TypeNo = (unsigned)Record[Slot++]; ResVal = getFnValueByID(ValNo, getTypeByID(TypeNo)); - return ResVal == 0; + return ResVal == nullptr; } /// popValue - Read a value out of the specified record from slot 'Slot'. @@ -320,14 +320,14 @@ private: bool getValue(SmallVectorImpl<uint64_t> &Record, unsigned Slot, unsigned InstNum, Type *Ty, Value *&ResVal) { ResVal = getValue(Record, Slot, InstNum, Ty); - return ResVal == 0; + return ResVal == nullptr; } /// getValue -- Version of getValue that returns ResVal directly, /// or 0 if there is an error. Value *getValue(SmallVectorImpl<uint64_t> &Record, unsigned Slot, unsigned InstNum, Type *Ty) { - if (Slot == Record.size()) return 0; + if (Slot == Record.size()) return nullptr; unsigned ValNo = (unsigned)Record[Slot]; // Adjust the ValNo, if it was encoded relative to the InstNum. if (UseRelativeIDs) @@ -338,7 +338,7 @@ private: /// getValueSigned -- Like getValue, but decodes signed VBRs. Value *getValueSigned(SmallVectorImpl<uint64_t> &Record, unsigned Slot, unsigned InstNum, Type *Ty) { - if (Slot == Record.size()) return 0; + if (Slot == Record.size()) return nullptr; unsigned ValNo = (unsigned)decodeSignRotatedValue(Record[Slot]); // Adjust the ValNo, if it was encoded relative to the InstNum. if (UseRelativeIDs) diff --git a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp index b67e3e84e6..331381b027 100644 --- a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp +++ b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp @@ -110,7 +110,7 @@ AsmPrinter::AsmPrinter(TargetMachine &tm, MCStreamer &Streamer) } AsmPrinter::~AsmPrinter() { - assert(DD == 0 && Handlers.empty() && "Debug/EH info didn't get finalized"); + assert(!DD && Handlers.empty() && "Debug/EH info didn't get finalized"); if (GCMetadataPrinters) { gcp_map_type &GCMap = getGCMap(GCMetadataPrinters); diff --git a/lib/CodeGen/AsmPrinter/DebugLocEntry.h b/lib/CodeGen/AsmPrinter/DebugLocEntry.h index 6937b0fa94..3beb799203 100644 --- a/lib/CodeGen/AsmPrinter/DebugLocEntry.h +++ b/lib/CodeGen/AsmPrinter/DebugLocEntry.h @@ -94,7 +94,7 @@ private: const DwarfCompileUnit *Unit; public: - DebugLocEntry() : Begin(0), End(0), Unit(0) {} + DebugLocEntry() : Begin(nullptr), End(nullptr), Unit(nullptr) {} DebugLocEntry(const MCSymbol *B, const MCSymbol *E, Value Val, const DwarfCompileUnit *U) : Begin(B), End(E), Unit(U) { diff --git a/lib/CodeGen/AsmPrinter/DwarfDebug.cpp b/lib/CodeGen/AsmPrinter/DwarfDebug.cpp index a588c46718..948d7fd380 100644 --- a/lib/CodeGen/AsmPrinter/DwarfDebug.cpp +++ b/lib/CodeGen/AsmPrinter/DwarfDebug.cpp @@ -994,8 +994,8 @@ void DwarfDebug::endSections() { // Emit all Dwarf sections that should come after the content. void DwarfDebug::endModule() { - assert(CurFn == 0); - assert(CurMI == 0); + assert(CurFn == nullptr); + assert(CurMI == nullptr); if (!FirstCU) return; @@ -1279,7 +1279,7 @@ MCSymbol *DwarfDebug::getLabelAfterInsn(const MachineInstr *MI) { // Process beginning of an instruction. void DwarfDebug::beginInstruction(const MachineInstr *MI) { - assert(CurMI == 0); + assert(CurMI == nullptr); CurMI = MI; // Check if source location changes, but ignore DBG_VALUE locations. if (!MI->isDebugValue()) { @@ -1323,7 +1323,7 @@ void DwarfDebug::beginInstruction(const MachineInstr *MI) { // Process end of an instruction. void DwarfDebug::endInstruction() { - assert(CurMI != 0); + assert(CurMI != nullptr); // Don't create a new label after DBG_VALUE instructions. // They don't generate code. if (!CurMI->isDebugValue()) @@ -1608,7 +1608,7 @@ void DwarfDebug::endFunction(const MachineFunction *MF) { CurFn = MF; else assert(CurFn == MF); - assert(CurFn != 0); + assert(CurFn != nullptr); if (!MMI->hasDebugInfo() || LScopes.empty()) { // If we don't have a lexical scope for this function then there will diff --git a/lib/CodeGen/AsmPrinter/DwarfDebug.h b/lib/CodeGen/AsmPrinter/DwarfDebug.h index a5bbb25122..1c4903c948 100644 --- a/lib/CodeGen/AsmPrinter/DwarfDebug.h +++ b/lib/CodeGen/AsmPrinter/DwarfDebug.h @@ -78,8 +78,8 @@ class DbgVariable { public: // AbsVar may be NULL. DbgVariable(DIVariable V, DbgVariable *AV, DwarfDebug *DD) - : Var(V), TheDIE(0), DotDebugLocOffset(~0U), AbsVar(AV), MInsn(0), - FrameIndex(~0), DD(DD) {} + : Var(V), TheDIE(nullptr), DotDebugLocOffset(~0U), AbsVar(AV), + MInsn(nullptr), FrameIndex(~0), DD(DD) {} // Accessors. DIVariable getVariable() const { return Var; } @@ -523,7 +523,7 @@ class DwarfDebug : public AsmPrinterHandler { /// \brief Ensure that a label will be emitted before MI. void requestLabelBeforeInsn(const MachineInstr *MI) { - LabelsBeforeInsn.insert(std::make_pair(MI, (MCSymbol *)0)); + LabelsBeforeInsn.insert(std::make_pair(MI, nullptr)); } /// \brief Return Label preceding the instruction. @@ -531,7 +531,7 @@ class DwarfDebug : public AsmPrinterHandler { /// \brief Ensure that a label will be emitted after MI. void requestLabelAfterInsn(const MachineInstr *MI) { - LabelsAfterInsn.insert(std::make_pair(MI, (MCSymbol *)0)); + LabelsAfterInsn.insert(std::make_pair(MI, nullptr)); } /// \brief Return Label immediately following the instruction. diff --git a/lib/CodeGen/AsmPrinter/WinCodeViewLineTables.cpp b/lib/CodeGen/AsmPrinter/WinCodeViewLineTables.cpp index abf0c4b12c..1dbfb9b599 100644 --- a/lib/CodeGen/AsmPrinter/WinCodeViewLineTables.cpp +++ b/lib/CodeGen/AsmPrinter/WinCodeViewLineTables.cpp @@ -216,7 +216,7 @@ void WinCodeViewLineTables::endModule() { if (FnDebugInfo.empty()) return; - assert(Asm != 0); + assert(Asm != nullptr); Asm->OutStreamer.SwitchSection( Asm->getObjFileLowering().getCOFFDebugSymbolsSection()); Asm->EmitInt32(COFF::DEBUG_SECTION_MAGIC); diff --git a/lib/CodeGen/AsmPrinter/WinCodeViewLineTables.h b/lib/CodeGen/AsmPrinter/WinCodeViewLineTables.h index a7a62053c3..0734d97ba7 100644 --- a/lib/CodeGen/AsmPrinter/WinCodeViewLineTables.h +++ b/lib/CodeGen/AsmPrinter/WinCodeViewLineTables.h @@ -38,7 +38,7 @@ class WinCodeViewLineTables : public AsmPrinterHandler { struct FunctionInfo { SmallVector<MCSymbol *, 10> Instrs; MCSymbol *End; - FunctionInfo() : End(0) {} + FunctionInfo() : End(nullptr) {} } *CurFn; typedef DenseMap<const Function *, FunctionInfo> FnDebugInfoTy; @@ -104,7 +104,7 @@ class WinCodeViewLineTables : public AsmPrinterHandler { void maybeRecordLocation(DebugLoc DL, const MachineFunction *MF); void clear() { - assert(CurFn == 0); + assert(CurFn == nullptr); FileNameRegistry.clear(); InstrInfo.clear(); } diff --git a/lib/DebugInfo/DWARFDebugInfoEntry.h b/lib/DebugInfo/DWARFDebugInfoEntry.h index 6b2aa1a446..2d0e953de3 100644 --- a/lib/DebugInfo/DWARFDebugInfoEntry.h +++ b/lib/DebugInfo/DWARFDebugInfoEntry.h @@ -39,7 +39,7 @@ class DWARFDebugInfoEntryMinimal { const DWARFAbbreviationDeclaration *AbbrevDecl; public: DWARFDebugInfoEntryMinimal() - : Offset(0), ParentIdx(0), SiblingIdx(0), AbbrevDecl(0) {} + : Offset(0), ParentIdx(0), SiblingIdx(0), AbbrevDecl(nullptr) {} void dump(raw_ostream &OS, const DWARFUnit *u, unsigned recurseDepth, unsigned indent = 0) const; @@ -52,7 +52,7 @@ public: bool extractFast(const DWARFUnit *U, uint32_t *OffsetPtr); uint32_t getTag() const { return AbbrevDecl ? AbbrevDecl->getTag() : 0; } - bool isNULL() const { return AbbrevDecl == 0; } + bool isNULL() const { return AbbrevDecl == nullptr; } /// Returns true if DIE represents a subprogram (not inlined). bool isSubprogramDIE() const; @@ -66,27 +66,27 @@ public: // We know we are kept in a vector of contiguous entries, so we know // our parent will be some index behind "this". DWARFDebugInfoEntryMinimal *getParent() { - return ParentIdx > 0 ? this - ParentIdx : 0; + return ParentIdx > 0 ? this - ParentIdx : nullptr; } const DWARFDebugInfoEntryMinimal *getParent() const { - return ParentIdx > 0 ? this - ParentIdx : 0; + return ParentIdx > 0 ? this - ParentIdx : nullptr; } // We know we are kept in a vector of contiguous entries, so we know // our sibling will be some index after "this". DWARFDebugInfoEntryMinimal *getSibling() { - return SiblingIdx > 0 ? this + SiblingIdx : 0; + return SiblingIdx > 0 ? this + SiblingIdx : nullptr; } const DWARFDebugInfoEntryMinimal *getSibling() const { - return SiblingIdx > 0 ? this + SiblingIdx : 0; + return SiblingIdx > 0 ? this + SiblingIdx : nullptr; } // We know we are kept in a vector of contiguous entries, so we know // we don't need to store our child pointer, if we have a child it will // be the next entry in the list... DWARFDebugInfoEntryMinimal *getFirstChild() { - return hasChildren() ? this + 1 : 0; + return hasChildren() ? this + 1 : nullptr; } const DWARFDebugInfoEntryMinimal *getFirstChild() const { - return hasChildren() ? this + 1 : 0; + return hasChildren() ? this + 1 : nullptr; } void setParent(DWARFDebugInfoEntryMinimal *parent) { @@ -168,7 +168,7 @@ public: /// (except the last DIE) in this chain is contained in address /// range for next DIE in the chain. struct DWARFDebugInfoEntryInlinedChain { - DWARFDebugInfoEntryInlinedChain() : U(0) {} + DWARFDebugInfoEntryInlinedChain() : U(nullptr) {} SmallVector<DWARFDebugInfoEntryMinimal, 4> DIEs; const DWARFUnit *U; }; diff --git a/lib/DebugInfo/DWARFDebugLine.h b/lib/DebugInfo/DWARFDebugLine.h index a336f49b29..890eb28c1e 100644 --- a/lib/DebugInfo/DWARFDebugLine.h +++ b/lib/DebugInfo/DWARFDebugLine.h @@ -24,7 +24,7 @@ class DWARFDebugLine { public: DWARFDebugLine(const RelocAddrMap* LineInfoRelocMap) : RelocMap(LineInfoRelocMap) {} struct FileNameEntry { - FileNameEntry() : Name(0), DirIdx(0), ModTime(0), Length(0) {} + FileNameEntry() : Name(nullptr), DirIdx(0), ModTime(0), Length(0) {} const char *Name; uint64_t DirIdx; diff --git a/lib/DebugInfo/DWARFUnit.h b/lib/DebugInfo/DWARFUnit.h index 374eceaed2..471da36af1 100644 --- a/lib/DebugInfo/DWARFUnit.h +++ b/lib/DebugInfo/DWARFUnit.h @@ -118,7 +118,7 @@ public: const DWARFDebugInfoEntryMinimal * getCompileUnitDIE(bool extract_cu_die_only = true) { extractDIEsIfNeeded(extract_cu_die_only); - return DieArray.empty() ? NULL : &DieArray[0]; + return DieArray.empty() ? nullptr : &DieArray[0]; } const char *getCompilationDir(); diff --git a/lib/ExecutionEngine/Interpreter/Execution.cpp b/lib/ExecutionEngine/Interpreter/Execution.cpp index 2275f57ab8..93bb2d1f43 100644 --- a/lib/ExecutionEngine/Interpreter/Execution.cpp +++ b/lib/ExecutionEngine/Interpreter/Execution.cpp @@ -58,7 +58,7 @@ static void executeFAddInst(GenericValue &Dest, GenericValue Src1, IMPLEMENT_BINARY_OPERATOR(+, Double); default: dbgs() << "Unhandled type for FAdd instruction: " << *Ty << "\n"; - llvm_unreachable(0); + llvm_unreachable(nullptr); } } @@ -69,7 +69,7 @@ static void executeFSubInst(GenericValue &Dest, GenericValue Src1, IMPLEMENT_BINARY_OPERATOR(-, Double); default: dbgs() << "Unhandled type for FSub instruction: " << *Ty << "\n"; - llvm_unreachable(0); + llvm_unreachable(nullptr); } } @@ -80,7 +80,7 @@ static void executeFMulInst(GenericValue &Dest, GenericValue Src1, IMPLEMENT_BINARY_OPERATOR(*, Double); default: dbgs() << "Unhandled type for FMul instruction: " << *Ty << "\n"; - llvm_unreachable(0); + llvm_unreachable(nullptr); } } @@ -91,7 +91,7 @@ static void executeFDivInst(GenericValue &Dest, GenericValue Src1, IMPLEMENT_BINARY_OPERATOR(/, Double); default: dbgs() << "Unhandled type for FDiv instruction: " << *Ty << "\n"; - llvm_unreachable(0); + llvm_unreachable(nullptr); } } @@ -106,7 +106,7 @@ static void executeFRemInst(GenericValue &Dest, GenericValue Src1, break; default: dbgs() << "Unhandled type for Rem instruction: " << *Ty << "\n"; - llvm_unreachable(0); + llvm_unreachable(nullptr); } } @@ -143,7 +143,7 @@ static GenericValue executeICMP_EQ(GenericValue Src1, GenericValue Src2, IMPLEMENT_POINTER_ICMP(==); default: dbgs() << "Unhandled type for ICMP_EQ predicate: " << *Ty << "\n"; - llvm_unreachable(0); + llvm_unreachable(nullptr); } return Dest; } @@ -157,7 +157,7 @@ static GenericValue executeICMP_NE(GenericValue Src1, GenericValue Src2, IMPLEMENT_POINTER_ICMP(!=); default: dbgs() << "Unhandled type for ICMP_NE predicate: " << *Ty << "\n"; - llvm_unreachable(0); + llvm_unreachable(nullptr); } return Dest; } @@ -171,7 +171,7 @@ static GenericValue executeICMP_ULT(GenericValue Src1, GenericValue Src2, IMPLEMENT_POINTER_ICMP(<); default: dbgs() << "Unhandled type for ICMP_ULT predicate: " << *Ty << "\n"; - llvm_unreachable(0); + llvm_unreachable(nullptr); } return Dest; } @@ -185,7 +185,7 @@ static GenericValue executeICMP_SLT(GenericValue Src1, GenericValue Src2, IMPLEMENT_POINTER_ICMP(<); default: dbgs() << "Unhandled type for ICMP_SLT predicate: " << *Ty << "\n"; - llvm_unreachable(0); + llvm_unreachable(nullptr); } return Dest; } @@ -199,7 +199,7 @@ static GenericValue executeICMP_UGT(GenericValue Src1, GenericValue Src2, IMPLEMENT_POINTER_ICMP(>); default: dbgs() << "Unhandled type for ICMP_UGT predicate: " << *Ty << "\n"; - llvm_unreachable(0); + llvm_unreachable(nullptr); } return Dest; } @@ -213,7 +213,7 @@ static GenericValue executeICMP_SGT(GenericValue Src1, GenericValue Src2, IMPLEMENT_POINTER_ICMP(>); default: dbgs() << "Unhandled type for ICMP_SGT predicate: " << *Ty << "\n"; - llvm_unreachable(0); + llvm_unreachable(nullptr); } return Dest; } @@ -227,7 +227,7 @@ static GenericValue executeICMP_ULE(GenericValue Src1, GenericValue Src2, IMPLEMENT_POINTER_ICMP(<=); default: dbgs() << "Unhandled type for ICMP_ULE predicate: " << *Ty << "\n"; - llvm_unreachable(0); + llvm_unreachable(nullptr); } return Dest; } @@ -241,7 +241,7 @@ static GenericValue executeICMP_SLE(GenericValue Src1, GenericValue Src2, IMPLEMENT_POINTER_ICMP(<=); default: dbgs() << "Unhandled type for ICMP_SLE predicate: " << *Ty << "\n"; - llvm_unreachable(0); + llvm_unreachable(nullptr); } return Dest; } @@ -255,7 +255,7 @@ static GenericValue executeICMP_UGE(GenericValue Src1, GenericValue Src2, IMPLEMENT_POINTER_ICMP(>=); default: dbgs() << "Unhandled type for ICMP_UGE predicate: " << *Ty << "\n"; - llvm_unreachable(0); + llvm_unreachable(nullptr); } return Dest; } @@ -269,7 +269,7 @@ static GenericValue executeICMP_SGE(GenericValue Src1, GenericValue Src2, IMPLEMENT_POINTER_ICMP(>=); default: dbgs() << "Unhandled type for ICMP_SGE predicate: " << *Ty << "\n"; - llvm_unreachable(0); + llvm_unreachable(nullptr); } return Dest; } @@ -294,7 +294,7 @@ void Interpreter::visitICmpInst(ICmpInst &I) { case ICmpInst::ICMP_SGE: R = executeICMP_SGE(Src1, Src2, Ty); break; default: dbgs() << "Don't know how to handle this ICmp predicate!\n-->" << I; - llvm_unreachable(0); + llvm_unreachable(nullptr); } SetValue(&I, R, SF); @@ -330,7 +330,7 @@ static GenericValue executeFCMP_OEQ(GenericValue Src1, GenericValue Src2, IMPLEMENT_VECTOR_FCMP(==); default: dbgs() << "Unhandled type for FCmp EQ instruction: " << *Ty << "\n"; - llvm_unreachable(0); + llvm_unreachable(nullptr); } return Dest; } @@ -386,7 +386,7 @@ static GenericValue executeFCMP_ONE(GenericValue Src1, GenericValue Src2, IMPLEMENT_VECTOR_FCMP(!=); default: dbgs() << "Unhandled type for FCmp NE instruction: " << *Ty << "\n"; - llvm_unreachable(0); + llvm_unreachable(nullptr); } // in vector case mask out NaN elements if (Ty->isVectorTy()) @@ -406,7 +406,7 @@ static GenericValue executeFCMP_OLE(GenericValue Src1, GenericValue Src2, IMPLEMENT_VECTOR_FCMP(<=); default: dbgs() << "Unhandled type for FCmp LE instruction: " << *Ty << "\n"; - llvm_unreachable(0); + llvm_unreachable(nullptr); } return Dest; } @@ -420,7 +420,7 @@ static GenericValue executeFCMP_OGE(GenericValue Src1, GenericValue Src2, IMPLEMENT_VECTOR_FCMP(>=); default: dbgs() << "Unhandled type for FCmp GE instruction: " << *Ty << "\n"; - llvm_unreachable(0); + llvm_unreachable(nullptr); } return Dest; } @@ -434,7 +434,7 @@ static GenericValue executeFCMP_OLT(GenericValue Src1, GenericValue Src2, IMPLEMENT_VECTOR_FCMP(<); default: dbgs() << "Unhandled type for FCmp LT instruction: " << *Ty << "\n"; - llvm_unreachable(0); + llvm_unreachable(nullptr); } return Dest; } @@ -448,7 +448,7 @@ static GenericValue executeFCMP_OGT(GenericValue Src1, GenericValue Src2, IMPLEMENT_VECTOR_FCMP(>); default: dbgs() << "Unhandled type for FCmp GT instruction: " << *Ty << "\n"; - llvm_unreachable(0); + llvm_unreachable(nullptr); } return Dest; } @@ -616,7 +616,7 @@ void Interpreter::visitFCmpInst(FCmpInst &I) { switch (I.getPredicate()) { default: dbgs() << "Don't know how to handle this FCmp predicate!\n-->" << I; - llvm_unreachable(0); + llvm_unreachable(nullptr); break; case FCmpInst::FCMP_FALSE: R = executeFCMP_BOOL(Src1, Src2, Ty, false); break; @@ -673,7 +673,7 @@ static GenericValue executeCmpInst(unsigned predicate, GenericValue Src1, case FCmpInst::FCMP_TRUE: return executeFCMP_BOOL(Src1, Src2, Ty, true); default: dbgs() << "Unhandled Cmp predicate\n"; - llvm_unreachable(0); + llvm_unreachable(nullptr); } } @@ -727,7 +727,7 @@ void Interpreter::visitBinaryOperator(BinaryOperator &I) { switch(I.getOpcode()){ default: dbgs() << "Don't know how to handle this binary operator!\n-->" << I; - llvm_unreachable(0); + llvm_unreachable(nullptr); break; case Instruction::Add: INTEGER_VECTOR_OPERATION(+) break; case Instruction::Sub: INTEGER_VECTOR_OPERATION(-) break; @@ -755,7 +755,7 @@ void Interpreter::visitBinaryOperator(BinaryOperator &I) { fmod(Src1.AggregateVal[i].DoubleVal, Src2.AggregateVal[i].DoubleVal); else { dbgs() << "Unhandled type for Rem instruction: " << *Ty << "\n"; - llvm_unreachable(0); + llvm_unreachable(nullptr); } } break; @@ -764,7 +764,7 @@ void Interpreter::visitBinaryOperator(BinaryOperator &I) { switch (I.getOpcode()) { default: dbgs() << "Don't know how to handle this binary operator!\n-->" << I; - llvm_unreachable(0); + llvm_unreachable(nullptr); break; case Instruction::Add: R.IntVal = Src1.IntVal + Src2.IntVal; break; case Instruction::Sub: R.IntVal = Src1.IntVal - Src2.IntVal; break; @@ -980,7 +980,7 @@ void Interpreter::visitAllocaInst(AllocaInst &I) { << uintptr_t(Memory) << '\n'); GenericValue Result = PTOGV(Memory); - assert(Result.PointerVal != 0 && "Null pointer returned by malloc!"); + assert(Result.PointerVal && "Null pointer returned by malloc!"); SetValue(&I, Result, SF); if (I.getOpcode() == Instruction::Alloca) @@ -1733,7 +1733,7 @@ void Interpreter::visitVAArgInst(VAArgInst &I) { IMPLEMENT_VAARG(Double); default: dbgs() << "Unhandled dest type for vaarg instruction: " << *Ty << "\n"; - llvm_unreachable(0); + llvm_unreachable(nullptr); } // Set the Value of this Instruction. @@ -1757,7 +1757,7 @@ void Interpreter::visitExtractElementInst(ExtractElementInst &I) { default: dbgs() << "Unhandled destination type for extractelement instruction: " << *Ty << "\n"; - llvm_unreachable(0); + llvm_unreachable(nullptr); break; case Type::IntegerTyID: Dest.IntVal = Src1.AggregateVal[indx].IntVal; @@ -2074,7 +2074,7 @@ GenericValue Interpreter::getOperandValue(Value *V, ExecutionContext &SF) { // void Interpreter::callFunction(Function *F, const std::vector<GenericValue> &ArgVals) { - assert((ECStack.empty() || ECStack.back().Caller.getInstruction() == 0 || + assert((ECStack.empty() || !ECStack.back().Caller.getInstruction() || ECStack.back().Caller.arg_size() == ArgVals.size()) && "Incorrect number of arguments passed into function call!"); // Make a new stack frame... and fill it in. diff --git a/lib/ExecutionEngine/Interpreter/Interpreter.h b/lib/ExecutionEngine/Interpreter/Interpreter.h index 2e93cae00e..2145cde05f 100644 --- a/lib/ExecutionEngine/Interpreter/Interpreter.h +++ b/lib/ExecutionEngine/Interpreter/Interpreter.h @@ -108,7 +108,7 @@ public: /// create - Create an interpreter ExecutionEngine. This can never fail. /// - static ExecutionEngine *create(Module *M, std::string *ErrorStr = 0); + static ExecutionEngine *create(Module *M, std::string *ErrorStr = nullptr); /// run - Start execution with the specified function and arguments. /// @@ -118,7 +118,7 @@ public: void *getPointerToNamedFunction(const std::string &Name, bool AbortOnFailure = true) override { // FIXME: not implemented. - return 0; + return nullptr; } /// recompileAndRelinkFunction - For the interpreter, functions are always diff --git a/lib/ExecutionEngine/JIT/JIT.h b/lib/ExecutionEngine/JIT/JIT.h index b1b0768008..d2bd5089cb 100644 --- a/lib/ExecutionEngine/JIT/JIT.h +++ b/lib/ExecutionEngine/JIT/JIT.h @@ -189,7 +189,7 @@ public: TargetMachine *TM); // Run the JIT on F and return information about the generated code - void runJITOnFunction(Function *F, MachineCodeInfo *MCI = 0) override; + void runJITOnFunction(Function *F, MachineCodeInfo *MCI = nullptr) override; void RegisterJITEventListener(JITEventListener *L) override; void UnregisterJITEventListener(JITEventListener *L) override; diff --git a/lib/ExecutionEngine/JIT/JITMemoryManager.cpp b/lib/ExecutionEngine/JIT/JITMemoryManager.cpp index d0e38137f2..584b93f815 100644 --- a/lib/ExecutionEngine/JIT/JITMemoryManager.cpp +++ b/lib/ExecutionEngine/JIT/JITMemoryManager.cpp @@ -643,7 +643,7 @@ DefaultJITMemoryManager::DefaultJITMemoryManager() } void DefaultJITMemoryManager::AllocateGOT() { - assert(GOTBase == 0 && "Cannot allocate the got multiple times"); + assert(!GOTBase && "Cannot allocate the got multiple times"); GOTBase = new uint8_t[sizeof(void*) * 8192]; HasGOT = true; } diff --git a/lib/ExecutionEngine/MCJIT/MCJIT.h b/lib/ExecutionEngine/MCJIT/MCJIT.h index 066ecebaa2..da1e975d4c 100644 --- a/lib/ExecutionEngine/MCJIT/MCJIT.h +++ b/lib/ExecutionEngine/MCJIT/MCJIT.h @@ -71,7 +71,7 @@ public: ClientMM->deregisterEHFrames(Addr, LoadAddr, Size); } - bool finalizeMemory(std::string *ErrMsg = 0) override { + bool finalizeMemory(std::string *ErrMsg = nullptr) override { return ClientMM->finalizeMemory(ErrMsg); } diff --git a/lib/ExecutionEngine/RuntimeDyld/ObjectImageCommon.h b/lib/ExecutionEngine/RuntimeDyld/ObjectImageCommon.h index 3693c6932f..f5a4ea9328 100644 --- a/lib/ExecutionEngine/RuntimeDyld/ObjectImageCommon.h +++ b/lib/ExecutionEngine/RuntimeDyld/ObjectImageCommon.h @@ -48,7 +48,7 @@ public: object::ObjectFile::createObjectFile(Buffer->getMemBuffer()).get(); } ObjectImageCommon(object::ObjectFile* Input) - : ObjectImage(NULL), ObjFile(Input) {} + : ObjectImage(nullptr), ObjFile(Input) {} virtual ~ObjectImageCommon() { delete ObjFile; } object::symbol_iterator begin_symbols() const override diff --git a/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldImpl.h b/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldImpl.h index c153ee1671..f52d22ce22 100644 --- a/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldImpl.h +++ b/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldImpl.h @@ -121,7 +121,8 @@ public: uint64_t Offset; int64_t Addend; const char *SymbolName; - RelocationValueRef() : SectionID(0), Offset(0), Addend(0), SymbolName(0) {} + RelocationValueRef() : SectionID(0), Offset(0), Addend(0), + SymbolName(nullptr) {} inline bool operator==(const RelocationValueRef &Other) const { return SectionID == Other.SectionID && Offset == Other.Offset && @@ -335,7 +336,7 @@ public: // Work in progress. SymbolTableMap::const_iterator pos = GlobalSymbolTable.find(Name); if (pos == GlobalSymbolTable.end()) - return 0; + return nullptr; SymbolLoc Loc = pos->second; return getSectionAddress(Loc.first) + Loc.second; } diff --git a/lib/IR/ConstantsContext.h b/lib/IR/ConstantsContext.h index efa132ea9e..8aae14aabf 100644 --- a/lib/IR/ConstantsContext.h +++ b/lib/IR/ConstantsContext.h @@ -586,7 +586,7 @@ public: /// necessary. ConstantClass *getOrCreate(TypeClass *Ty, ValRefType V) { MapKey Lookup(Ty, V); - ConstantClass* Result = 0; + ConstantClass* Result = nullptr; typename MapTy::iterator I = Map.find(Lookup); // Is it in the map? @@ -722,7 +722,7 @@ public: /// necessary. ConstantClass *getOrCreate(TypeClass *Ty, Operands V) { LookupKey Lookup(Ty, V); - ConstantClass* Result = 0; + ConstantClass* Result = nullptr; typename MapTy::iterator I = Map.find_as(Lookup); // Is it in the map? diff --git a/lib/IR/LLVMContextImpl.h b/lib/IR/LLVMContextImpl.h index 48b3511367..a6a65e6cac 100644 --- a/lib/IR/LLVMContextImpl.h +++ b/lib/IR/LLVMContextImpl.h @@ -56,8 +56,8 @@ struct DenseMapAPIntKeyInfo { return hash_combine(Key.type, Key.val); } }; - static inline KeyTy getEmptyKey() { return KeyTy(APInt(1,0), 0); } - static inline KeyTy getTombstoneKey() { return KeyTy(APInt(1,1), 0); } + static inline KeyTy getEmptyKey() { return KeyTy(APInt(1,0), nullptr); } + static inline KeyTy getTombstoneKey() { return KeyTy(APInt(1,1), nullptr); } static unsigned getHashValue(const KeyTy &Key) { return static_cast<unsigned>(hash_value(Key)); } diff --git a/lib/IR/LeaksContext.h b/lib/IR/LeaksContext.h index ea0d275253..52ac170459 100644 --- a/lib/IR/LeaksContext.h +++ b/lib/IR/LeaksContext.h @@ -34,10 +34,10 @@ struct PrinterTrait<Value> { template <typename T> struct LeakDetectorImpl { explicit LeakDetectorImpl(const char* const name = "") : - Cache(0), Name(name) { } + Cache(nullptr), Name(name) { } void clear() { - Cache = 0; + Cache = nullptr; Ts.clear(); } @@ -61,15 +61,15 @@ struct LeakDetectorImpl { void removeGarbage(const T* o) { if (o == Cache) - Cache = 0; // Cache hit + Cache = nullptr; // Cache hit else Ts.erase(o); } bool hasGarbage(const std::string& Message) { - addGarbage(0); // Flush the Cache + addGarbage(nullptr); // Flush the Cache - assert(Cache == 0 && "No value should be cached anymore!"); + assert(!Cache && "No value should be cached anymore!"); if (!Ts.empty()) { errs() << "Leaked " << Name << " objects found: " << Message << ":\n"; diff --git a/lib/IR/SymbolTableListTraitsImpl.h b/lib/IR/SymbolTableListTraitsImpl.h index 5a383eee56..8302597c94 100644 --- a/lib/IR/SymbolTableListTraitsImpl.h +++ b/lib/IR/SymbolTableListTraitsImpl.h @@ -65,7 +65,7 @@ void SymbolTableListTraits<ValueSubClass,ItemParentClass> template<typename ValueSubClass, typename ItemParentClass> void SymbolTableListTraits<ValueSubClass,ItemParentClass> ::addNodeToList(ValueSubClass *V) { - assert(V->getParent() == 0 && "Value already in a container!!"); + assert(!V->getParent() && "Value already in a container!!"); ItemParentClass *Owner = getListOwner(); V->setParent(Owner); if (V->hasName()) @@ -76,7 +76,7 @@ void SymbolTableListTraits<ValueSubClass,ItemParentClass> template<typename ValueSubClass, typename ItemParentClass> void SymbolTableListTraits<ValueSubClass,ItemParentClass> ::removeNodeFromList(ValueSubClass *V) { - V->setParent(0); + V->setParent(nullptr); if (V->hasName()) if (ValueSymbolTable *ST = TraitsClass::getSymTab(getListOwner())) ST->removeValueName(V->getValueName()); diff --git a/lib/Support/Unix/Memory.inc b/lib/Support/Unix/Memory.inc index 08cd34d532..23b49b75fa 100644 --- a/lib/Support/Unix/Memory.inc +++ b/lib/Support/Unix/Memory.inc @@ -121,7 +121,7 @@ Memory::allocateMappedMemory(size_t NumBytes, Protect, MMFlags, fd, 0); if (Addr == MAP_FAILED) { if (NearBlock) //Try again without a near hint - return allocateMappedMemory(NumBytes, 0, PFlags, EC); + return allocateMappedMemory(NumBytes, nullptr, PFlags, EC); EC = error_code(errno, system_category()); return MemoryBlock(); @@ -139,13 +139,13 @@ Memory::allocateMappedMemory(size_t NumBytes, error_code Memory::releaseMappedMemory(MemoryBlock &M) { - if (M.Address == 0 || M.Size == 0) + if (M.Address == nullptr || M.Size == 0) return error_code::success(); if (0 != ::munmap(M.Address, M.Size)) return error_code(errno, system_category()); - M.Address = 0; + M.Address = nullptr; M.Size = 0; return error_code::success(); @@ -153,7 +153,7 @@ Memory::releaseMappedMemory(MemoryBlock &M) { error_code Memory::protectMappedMemory(const MemoryBlock &M, unsigned Flags) { - if (M.Address == 0 || M.Size == 0) + if (M.Address == nullptr || M.Size == 0) return error_code::success(); if (!Flags) @@ -203,7 +203,7 @@ Memory::AllocateRWX(size_t NumBytes, const MemoryBlock* NearBlock, ; void* start = NearBlock ? (unsigned char*)NearBlock->base() + - NearBlock->size() : 0; + NearBlock->size() : nullptr; #if defined(__APPLE__) && (defined(__arm__) || defined(__arm64__)) void *pa = ::mmap(start, PageSize*NumPages, PROT_READ|PROT_EXEC, @@ -214,7 +214,7 @@ Memory::AllocateRWX(size_t NumBytes, const MemoryBlock* NearBlock, #endif if (pa == MAP_FAILED) { if (NearBlock) //Try again without a near hint - return AllocateRWX(NumBytes, 0); + return AllocateRWX(NumBytes, nullptr); MakeErrMsg(ErrMsg, "Can't allocate RWX Memory"); return MemoryBlock(); @@ -246,7 +246,7 @@ Memory::AllocateRWX(size_t NumBytes, const MemoryBlock* NearBlock, } bool Memory::ReleaseRWX(MemoryBlock &M, std::string *ErrMsg) { - if (M.Address == 0 || M.Size == 0) return false; + if (M.Address == nullptr || M.Size == 0) return false; if (0 != ::munmap(M.Address, M.Size)) return MakeErrMsg(ErrMsg, "Can't release RWX Memory"); return false; diff --git a/lib/Support/Unix/Path.inc b/lib/Support/Unix/Path.inc index 1c91053610..519a016a84 100644 --- a/lib/Support/Unix/Path.inc +++ b/lib/Support/Unix/Path.inc @@ -89,7 +89,7 @@ namespace { static error_code TempDir(SmallVectorImpl<char> &result) { // FIXME: Don't use TMPDIR if program is SUID or SGID enabled. - const char *dir = 0; + const char *dir = nullptr; (dir = std::getenv("TMPDIR")) || (dir = std::getenv("TMP")) || (dir = std::getenv("TEMP")) || (dir = std::getenv("TEMPDIR")) || #ifdef P_tmpdir @@ -246,7 +246,7 @@ error_code current_path(SmallVectorImpl<char> &result) { #endif while (true) { - if (::getcwd(result.data(), result.capacity()) == 0) { + if (::getcwd(result.data(), result.capacity()) == nullptr) { // See if there was a real error. if (errno != errc::not_enough_memory) return error_code(errno, system_category()); @@ -494,7 +494,7 @@ error_code mapped_file_region::init(int FD, bool CloseFD, uint64_t Offset) { #ifdef MAP_FILE flags |= MAP_FILE; #endif - Mapping = ::mmap(0, Size, prot, flags, FD, Offset); + Mapping = ::mmap(nullptr, Size, prot, flags, FD, Offset); if (Mapping == MAP_FAILED) return error_code(errno, system_category()); return error_code::success(); @@ -525,7 +525,7 @@ mapped_file_region::mapped_file_region(const Twine &path, ec = init(ofd, true, offset); if (ec) - Mapping = 0; + Mapping = nullptr; } mapped_file_region::mapped_file_region(int fd, @@ -545,7 +545,7 @@ mapped_file_region::mapped_file_region(int fd, ec = init(fd, closefd, offset); if (ec) - Mapping = 0; + Mapping = nullptr; } mapped_file_region::~mapped_file_region() { @@ -555,7 +555,7 @@ mapped_file_region::~mapped_file_region() { mapped_file_region::mapped_file_region(mapped_file_region &&other) : Mode(other.Mode), Size(other.Size), Mapping(other.Mapping) { - other.Mapping = 0; + other.Mapping = nullptr; } mapped_file_region::mapmode mapped_file_region::flags() const { @@ -587,7 +587,7 @@ error_code detail::directory_iterator_construct(detail::DirIterState &it, StringRef path){ SmallString<128> path_null(path); DIR *directory = ::opendir(path_null.c_str()); - if (directory == 0) + if (!directory) return error_code(errno, system_category()); it.IterationHandle = reinterpret_cast<intptr_t>(directory); @@ -608,9 +608,9 @@ error_code detail::directory_iterator_destruct(detail::DirIterState &it) { error_code detail::directory_iterator_increment(detail::DirIterState &it) { errno = 0; dirent *cur_dir = ::readdir(reinterpret_cast<DIR *>(it.IterationHandle)); - if (cur_dir == 0 && errno != 0) { + if (cur_dir == nullptr && errno != 0) { return error_code(errno, system_category()); - } else if (cur_dir != 0) { + } else if (cur_dir != nullptr) { StringRef name(cur_dir->d_name, NAMLEN(cur_dir)); if ((name.size() == 1 && name[0] == '.') || (name.size() == 2 && name[0] == '.' && name[1] == '.')) @@ -630,7 +630,7 @@ error_code get_magic(const Twine &path, uint32_t len, // Open path. std::FILE *file = std::fopen(Path.data(), "rb"); - if (file == 0) + if (!file) return error_code(errno, system_category()); // Reserve storage. @@ -667,7 +667,7 @@ error_code map_file_pages(const Twine &path, off_t file_offset, size_t size, #ifdef MAP_FILE flags |= MAP_FILE; #endif - result = ::mmap(0, size, prot, flags, fd, file_offset); + result = ::mmap(nullptr, size, prot, flags, fd, file_offset); if (result == MAP_FAILED) { return error_code(errno, system_category()); } diff --git a/lib/Support/Unix/Process.inc b/lib/Support/Unix/Process.inc index 9fb4356ddc..8faa638ec8 100644 --- a/lib/Support/Unix/Process.inc +++ b/lib/Support/Unix/Process.inc @@ -270,7 +270,7 @@ static bool terminalHasColors(int fd) { MutexGuard G(M); int errret = 0; - if (setupterm((char *)0, fd, &errret) != 0) + if (setupterm((char *)nullptr, fd, &errret) != 0) // Regardless of why, if we can't get terminfo, we shouldn't try to print // colors. return false; @@ -292,7 +292,7 @@ static bool terminalHasColors(int fd) { // Now extract the structure allocated by setupterm and free its memory // through a really silly dance. - struct term *termp = set_curterm((struct term *)0); + struct term *termp = set_curterm((struct term *)nullptr); (void)del_curterm(termp); // Drop any errors here. // Return true if we found a color capabilities for the current terminal. diff --git a/lib/Support/Unix/Program.inc b/lib/Support/Unix/Program.inc index b4df928489..1225a9c042 100644 --- a/lib/Support/Unix/Program.inc +++ b/lib/Support/Unix/Program.inc @@ -70,7 +70,7 @@ sys::FindProgramByName(const std::string& progName) { // Get the path. If its empty, we can't do anything to find it. const char *PathStr = getenv("PATH"); - if (PathStr == 0) + if (!PathStr) return ""; // Now we have a colon separated list of directories to search; try them. @@ -99,7 +99,7 @@ sys::FindProgramByName(const std::string& progName) { } static bool RedirectIO(const StringRef *Path, int FD, std::string* ErrMsg) { - if (Path == 0) // Noop + if (!Path) // Noop return false; std::string File; if (Path->empty()) @@ -129,7 +129,7 @@ static bool RedirectIO(const StringRef *Path, int FD, std::string* ErrMsg) { #ifdef HAVE_POSIX_SPAWN static bool RedirectIO_PS(const std::string *Path, int FD, std::string *ErrMsg, posix_spawn_file_actions_t *FileActions) { - if (Path == 0) // Noop + if (!Path) // Noop return false; const char *File; if (Path->empty()) @@ -195,7 +195,7 @@ static bool Execute(ProcessInfo &PI, StringRef Program, const char **args, #ifdef HAVE_POSIX_SPAWN if (memoryLimit == 0) { posix_spawn_file_actions_t FileActionsStore; - posix_spawn_file_actions_t *FileActions = 0; + posix_spawn_file_actions_t *FileActions = nullptr; // If we call posix_spawn_file_actions_addopen we have to make sure the // c strings we pass to it stay alive until the call to posix_spawn, @@ -203,7 +203,7 @@ static bool Execute(ProcessInfo &PI, StringRef Program, const char **args, std::string RedirectsStorage[3]; if (redirects) { - std::string *RedirectsStr[3] = {0, 0, 0}; + std::string *RedirectsStr[3] = {nullptr, nullptr, nullptr}; for (int I = 0; I < 3; ++I) { if (redirects[I]) { RedirectsStorage[I] = *redirects[I]; @@ -218,7 +218,7 @@ static bool Execute(ProcessInfo &PI, StringRef Program, const char **args, if (RedirectIO_PS(RedirectsStr[0], 0, ErrMsg, FileActions) || RedirectIO_PS(RedirectsStr[1], 1, ErrMsg, FileActions)) return false; - if (redirects[1] == 0 || redirects[2] == 0 || + if (redirects[1] == nullptr || redirects[2] == nullptr || *redirects[1] != *redirects[2]) { // Just redirect stderr if (RedirectIO_PS(RedirectsStr[2], 2, ErrMsg, FileActions)) @@ -242,8 +242,9 @@ static bool Execute(ProcessInfo &PI, StringRef Program, const char **args, // Explicitly initialized to prevent what appears to be a valgrind false // positive. pid_t PID = 0; - int Err = posix_spawn(&PID, Program.str().c_str(), FileActions, /*attrp*/0, - const_cast<char **>(args), const_cast<char **>(envp)); + int Err = posix_spawn(&PID, Program.str().c_str(), FileActions, + /*attrp*/nullptr, const_cast<char **>(args), + const_cast<char **>(envp)); if (FileActions) posix_spawn_file_actions_destroy(FileActions); @@ -294,7 +295,7 @@ static bool Execute(ProcessInfo &PI, StringRef Program, const char **args, // Execute! std::string PathStr = Program; - if (envp != 0) + if (envp != nullptr) execve(PathStr.c_str(), const_cast<char **>(args), const_cast<char **>(envp)); @@ -360,7 +361,7 @@ ProcessInfo sys::Wait(const ProcessInfo &PI, unsigned SecondsToWait, // Turn off the alarm and restore the signal handler alarm(0); - sigaction(SIGALRM, &Old, 0); + sigaction(SIGALRM, &Old, nullptr); // Wait for child to die if (wait(&status) != ChildPid) @@ -381,7 +382,7 @@ ProcessInfo sys::Wait(const ProcessInfo &PI, unsigned SecondsToWait, // We exited normally without timeout, so turn off the timer. if (SecondsToWait && !WaitUntilTerminates) { alarm(0); - sigaction(SIGALRM, &Old, 0); + sigaction(SIGALRM, &Old, nullptr); } // Return the proper exit status. Detect error conditions diff --git a/lib/Support/Unix/Signals.inc b/lib/Support/Unix/Signals.inc index ef62d52a34..1841fea25e 100644 --- a/lib/Support/Unix/Signals.inc +++ b/lib/Support/Unix/Signals.inc @@ -44,7 +44,7 @@ static RETSIGTYPE SignalHandler(int Sig); // defined below. static SmartMutex<true> SignalsMutex; /// InterruptFunction - The function to call if ctrl-c is pressed. -static void (*InterruptFunction)() = 0; +static void (*InterruptFunction)() = nullptr; static std::vector<std::string> FilesToRemove; static std::vector<std::pair<void(*)(void*), void*> > CallBacksToRun; @@ -113,7 +113,7 @@ static void UnregisterHandlers() { // Restore all of the signal handlers to how they were before we showed up. for (unsigned i = 0, e = NumRegisteredSignals; i != e; ++i) sigaction(RegisteredSignalInfo[i].SigNo, - &RegisteredSignalInfo[i].SA, 0); + &RegisteredSignalInfo[i].SA, nullptr); NumRegisteredSignals = 0; } @@ -160,7 +160,7 @@ static RETSIGTYPE SignalHandler(int Sig) { // Unmask all potentially blocked kill signals. sigset_t SigMask; sigfillset(&SigMask); - sigprocmask(SIG_UNBLOCK, &SigMask, 0); + sigprocmask(SIG_UNBLOCK, &SigMask, nullptr); SignalsMutex.acquire(); RemoveFilesToRemove(); @@ -169,7 +169,7 @@ static RETSIGTYPE SignalHandler(int Sig) { if (InterruptFunction) { void (*IF)() = InterruptFunction; SignalsMutex.release(); - InterruptFunction = 0; + InterruptFunction = nullptr; IF(); // run the interrupt function. return; } @@ -212,7 +212,7 @@ void llvm::sys::SetInterruptFunction(void (*IF)()) { bool llvm::sys::RemoveFileOnSignal(StringRef Filename, std::string* ErrMsg) { SignalsMutex.acquire(); - std::string *OldPtr = FilesToRemove.empty() ? 0 : &FilesToRemove[0]; + std::string *OldPtr = FilesToRemove.empty() ? nullptr : &FilesToRemove[0]; FilesToRemove.push_back(Filename); // We want to call 'c_str()' on every std::string in this vector so that if @@ -279,8 +279,8 @@ void llvm::sys::PrintStackTrace(FILE *FD) { const char* name = strrchr(dlinfo.dli_fname, '/'); int nwidth; - if (name == NULL) nwidth = strlen(dlinfo.dli_fname); - else nwidth = strlen(name) - 1; + if (!name) nwidth = strlen(dlinfo.dli_fname); + else nwidth = strlen(name) - 1; if (nwidth > width) width = nwidth; } @@ -292,22 +292,22 @@ void llvm::sys::PrintStackTrace(FILE *FD) { fprintf(FD, "%-2d", i); const char* name = strrchr(dlinfo.dli_fname, '/'); - if (name == NULL) fprintf(FD, " %-*s", width, dlinfo.dli_fname); - else fprintf(FD, " %-*s", width, name+1); + if (!name) fprintf(FD, " %-*s", width, dlinfo.dli_fname); + else fprintf(FD, " %-*s", width, name+1); fprintf(FD, " %#0*lx", (int)(sizeof(void*) * 2) + 2, (unsigned long)StackTrace[i]); - if (dlinfo.dli_sname != NULL) { + if (dlinfo.dli_sname != nullptr) { fputc(' ', FD); # if HAVE_CXXABI_H int res; - char* d = abi::__cxa_demangle(dlinfo.dli_sname, NULL, NULL, &res); + char* d = abi::__cxa_demangle(dlinfo.dli_sname, nullptr, nullptr, &res); # else char* d = NULL; # endif - if (d == NULL) fputs(dlinfo.dli_sname, FD); - else fputs(d, FD); + if (!d) fputs(dlinfo.dli_sname, FD); + else fputs(d, FD); free(d); // FIXME: When we move to C++11, use %t length modifier. It's not in @@ -331,7 +331,7 @@ static void PrintStackTraceSignalHandler(void *) { /// PrintStackTraceOnErrorSignal - When an error signal (such as SIGABRT or /// SIGSEGV) is delivered to the process, print a stack trace and then exit. void llvm::sys::PrintStackTraceOnErrorSignal() { - AddSignalHandler(PrintStackTraceSignalHandler, 0); + AddSignalHandler(PrintStackTraceSignalHandler, nullptr); #if defined(__APPLE__) && defined(ENABLE_CRASH_OVERRIDES) // Environment variable to disable any kind of crash dialog. diff --git a/lib/Support/Unix/TimeValue.inc b/lib/Support/Unix/TimeValue.inc index 58c7ba3094..7d4acf7bf6 100644 --- a/lib/Support/Unix/TimeValue.inc +++ b/lib/Support/Unix/TimeValue.inc @@ -36,7 +36,7 @@ std::string TimeValue::str() const { TimeValue TimeValue::now() { struct timeval the_time; timerclear(&the_time); - if (0 != ::gettimeofday(&the_time,0)) { + if (0 != ::gettimeofday(&the_time,nullptr)) { // This is *really* unlikely to occur because the only gettimeofday // errors concern the timezone parameter which we're passing in as 0. // In the unlikely case it does happen, just return MinTime, no error diff --git a/lib/TableGen/TGParser.cpp b/lib/TableGen/TGParser.cpp index f94c6f62a4..dd3a0967d1 100644 --- a/lib/TableGen/TGParser.cpp +++ b/lib/TableGen/TGParser.cpp @@ -115,7 +115,7 @@ bool TGParser::SetValue(Record *CurRec, SMLoc Loc, Init *ValName, // We should have a BitsInit type now. BitsInit *BInit = dyn_cast<BitsInit>(BI); - assert(BInit != 0); + assert(BInit != nullptr); SmallVector<Init *, 16> NewBits(CurVal->getNumBits()); diff --git a/lib/TableGen/TGParser.h b/lib/TableGen/TGParser.h index ce31f8e6ab..6fd442a7c2 100644 --- a/lib/TableGen/TGParser.h +++ b/lib/TableGen/TGParser.h @@ -85,7 +85,7 @@ class TGParser { public: TGParser(SourceMgr &SrcMgr, RecordKeeper &records) - : Lex(SrcMgr), CurMultiClass(0), Records(records), AnonCounter(0) {} + : Lex(SrcMgr), CurMultiClass(nullptr), Records(records), AnonCounter(0) {} /// ParseFile - Main entrypoint for parsing a tblgen file. These parser /// routines return true on error, or false on success. @@ -131,7 +131,7 @@ private: // Semantic analysis methods. bool ProcessForeachDefs(Record *CurRec, SMLoc Loc, IterSet &IterVals); private: // Parser methods. - bool ParseObjectList(MultiClass *MC = 0); + bool ParseObjectList(MultiClass *MC = nullptr); bool ParseObject(MultiClass *MC); bool ParseClass(); bool ParseMultiClass(); @@ -169,12 +169,12 @@ private: // Parser methods. Init *ParseIDValue(Record *CurRec, const std::string &Name, SMLoc NameLoc, IDParseMode Mode = ParseValueMode); - Init *ParseSimpleValue(Record *CurRec, RecTy *ItemType = 0, + Init *ParseSimpleValue(Record *CurRec, RecTy *ItemType = nullptr, IDParseMode Mode = ParseValueMode); - Init *ParseValue(Record *CurRec, RecTy *ItemType = 0, + Init *ParseValue(Record *CurRec, RecTy *ItemType = nullptr, IDParseMode Mode = ParseValueMode); - std::vector<Init*> ParseValueList(Record *CurRec, Record *ArgsRec = 0, - RecTy *EltTy = 0); + std::vector<Init*> ParseValueList(Record *CurRec, Record *ArgsRec = nullptr, + RecTy *EltTy = nullptr); std::vector<std::pair<llvm::Init*, std::string> > ParseDagArgList(Record *); bool ParseOptionalRangeList(std::vector<unsigned> &Ranges); bool ParseOptionalBitList(std::vector<unsigned> &Ranges); diff --git a/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp b/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp index 72bab205b7..f22da96afc 100644 --- a/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp +++ b/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp @@ -1559,7 +1559,7 @@ SDNode *AArch64DAGToDAGISel::Select(SDNode *Node) { SDNode *ResNode = SelectCode(Node); DEBUG(dbgs() << "=> "; - if (ResNode == NULL || ResNode == Node) + if (ResNode == nullptr || ResNode == Node) Node->dump(CurDAG); else ResNode->dump(CurDAG); diff --git a/lib/Target/AArch64/AArch64RegisterInfo.h b/lib/Target/AArch64/AArch64RegisterInfo.h index 5e9542a4dc..0fbef94851 100644 --- a/lib/Target/AArch64/AArch64RegisterInfo.h +++ b/lib/Target/AArch64/AArch64RegisterInfo.h @@ -27,7 +27,7 @@ class AArch64Subtarget; struct AArch64RegisterInfo : public AArch64GenRegisterInfo { AArch64RegisterInfo(); - const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF = 0) const; + const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF =nullptr) const; const uint32_t *getCallPreservedMask(CallingConv::ID) const; unsigned getCSRFirstUseCost() const { @@ -44,7 +44,7 @@ struct AArch64RegisterInfo : public AArch64GenRegisterInfo { void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, - RegScavenger *Rs = NULL) const; + RegScavenger *Rs = nullptr) const; /// getCrossCopyRegClass - Returns a legal register class to copy a register /// in the specified class to or from. Returns original class if it is diff --git a/lib/Target/ARM/ARMAsmPrinter.h b/lib/Target/ARM/ARMAsmPrinter.h index 46c2626f89..7c103c6763 100644 --- a/lib/Target/ARM/ARMAsmPrinter.h +++ b/lib/Target/ARM/ARMAsmPrinter.h @@ -47,16 +47,17 @@ class LLVM_LIBRARY_VISIBILITY ARMAsmPrinter : public AsmPrinter { bool InConstantPool; public: explicit ARMAsmPrinter(TargetMachine &TM, MCStreamer &Streamer) - : AsmPrinter(TM, Streamer), AFI(NULL), MCP(NULL), InConstantPool(false) { - Subtarget = &TM.getSubtarget<ARMSubtarget>(); - } + : AsmPrinter(TM, Streamer), AFI(nullptr), MCP(nullptr), + InConstantPool(false) { + Subtarget = &TM.getSubtarget<ARMSubtarget>(); + } const char *getPassName() const override { return "ARM Assembly / Object Emitter"; } void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O, - const char *Modifier = 0); + const char *Modifier = nullptr); bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, unsigned AsmVariant, const char *ExtraCode, diff --git a/lib/Target/ARM/ARMBaseInstrInfo.cpp b/lib/Target/ARM/ARMBaseInstrInfo.cpp index 1a91bb6fda..bc266e88b2 100644 --- a/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -624,7 +624,7 @@ unsigned ARMBaseInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const { MI->getOperand(NumOps - (MI->isPredicable() ? 3 : 2)); unsigned JTI = JTOP.getIndex(); const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo(); - assert(MJTI != 0); + assert(MJTI != nullptr); const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables(); assert(JTI < JT.size()); // Thumb instructions are 2 byte aligned, but JT entries are 4 byte diff --git a/lib/Target/ARM/ARMBaseInstrInfo.h b/lib/Target/ARM/ARMBaseInstrInfo.h index 3ddddcb637..4b3e74023a 100644 --- a/lib/Target/ARM/ARMBaseInstrInfo.h +++ b/lib/Target/ARM/ARMBaseInstrInfo.h @@ -261,7 +261,7 @@ private: unsigned getInstrLatency(const InstrItineraryData *ItinData, const MachineInstr *MI, - unsigned *PredCost = 0) const override; + unsigned *PredCost = nullptr) const override; int getInstrLatency(const InstrItineraryData *ItinData, SDNode *Node) const override; diff --git a/lib/Target/ARM/ARMBaseRegisterInfo.h b/lib/Target/ARM/ARMBaseRegisterInfo.h index a19b792a8e..91df565a27 100644 --- a/lib/Target/ARM/ARMBaseRegisterInfo.h +++ b/lib/Target/ARM/ARMBaseRegisterInfo.h @@ -101,7 +101,7 @@ protected: public: /// Code Generation virtual methods... const MCPhysReg * - getCalleeSavedRegs(const MachineFunction *MF = 0) const override; + getCalleeSavedRegs(const MachineFunction *MF = nullptr) const override; const uint32_t *getCallPreservedMask(CallingConv::ID) const override; const uint32_t *getNoPreservedMask() const; @@ -186,7 +186,7 @@ public: void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, - RegScavenger *RS = NULL) const override; + RegScavenger *RS = nullptr) const override; }; } // end namespace llvm diff --git a/lib/Target/ARM/ARMHazardRecognizer.h b/lib/Target/ARM/ARMHazardRecognizer.h index e88cd0d13c..a8198e2670 100644 --- a/lib/Target/ARM/ARMHazardRecognizer.h +++ b/lib/Target/ARM/ARMHazardRecognizer.h @@ -35,7 +35,7 @@ public: ARMHazardRecognizer(const InstrItineraryData *ItinData, const ScheduleDAG *DAG) : ScoreboardHazardRecognizer(ItinData, DAG, "post-RA-sched"), - LastMI(0) {} + LastMI(nullptr) {} HazardType getHazardType(SUnit *SU, int Stalls) override; void Reset() override; diff --git a/lib/Target/ARM/ARMTargetObjectFile.h b/lib/Target/ARM/ARMTargetObjectFile.h index 5f8d612028..c926421848 100644 --- a/lib/Target/ARM/ARMTargetObjectFile.h +++ b/lib/Target/ARM/ARMTargetObjectFile.h @@ -23,7 +23,7 @@ protected: public: ARMElfTargetObjectFile() : TargetLoweringObjectFileELF(), - AttributesSection(NULL) + AttributesSection(nullptr) {} void Initialize(MCContext &Ctx, const TargetMachine &TM) override; diff --git a/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp b/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp index e8351063c2..6d5fd6a293 100644 --- a/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp +++ b/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp @@ -1102,7 +1102,7 @@ void ARMELFStreamer::Reset() { } void ARMELFStreamer::emitFnStart() { - assert(FnStart == 0); + assert(FnStart == nullptr); FnStart = getContext().CreateTempSymbol(); EmitLabel(FnStart); } diff --git a/lib/Target/ARM/Thumb1RegisterInfo.h b/lib/Target/ARM/Thumb1RegisterInfo.h index 93e2b5a791..0c0abbe990 100644 --- a/lib/Target/ARM/Thumb1RegisterInfo.h +++ b/lib/Target/ARM/Thumb1RegisterInfo.h @@ -56,7 +56,7 @@ public: unsigned Reg) const override; void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, - RegScavenger *RS = NULL) const override; + RegScavenger *RS = nullptr) const override; }; } diff --git a/lib/Target/ARM64/ARM64ISelLowering.h b/lib/Target/ARM64/ARM64ISelLowering.h index d8710b0127..ebecedccd5 100644 --- a/lib/Target/ARM64/ARM64ISelLowering.h +++ b/lib/Target/ARM64/ARM64ISelLowering.h @@ -190,7 +190,7 @@ public: /// allowsUnalignedMemoryAccesses - Returns true if the target allows /// unaligned memory accesses. of the specified type. bool allowsUnalignedMemoryAccesses(EVT VT, unsigned AddrSpace = 0, - bool *Fast = 0) const override { + bool *Fast = nullptr) const override { if (RequireStrictAlign) return false; // FIXME: True for Cyclone, but not necessary others. diff --git a/lib/Target/ARM64/ARM64InstrInfo.h b/lib/Target/ARM64/ARM64InstrInfo.h index 7f02e94cb2..03822e1c3b 100644 --- a/lib/Target/ARM64/ARM64InstrInfo.h +++ b/lib/Target/ARM64/ARM64InstrInfo.h @@ -193,9 +193,9 @@ enum ARM64FrameOffsetStatus { /// (possibly with @p OutUnscaledOp if OutUseUnscaledOp is true) and that /// is a legal offset. int isARM64FrameOffsetLegal(const MachineInstr &MI, int &Offset, - bool *OutUseUnscaledOp = NULL, - unsigned *OutUnscaledOp = NULL, - int *EmittableOffset = NULL); + bool *OutUseUnscaledOp = nullptr, + unsigned *OutUnscaledOp = nullptr, + int *EmittableOffset = nullptr); static inline bool isUncondBranchOpcode(int Opc) { return Opc == ARM64::B; } diff --git a/lib/Target/ARM64/ARM64RegisterInfo.h b/lib/Target/ARM64/ARM64RegisterInfo.h index 290c484c2c..5743e35cfe 100644 --- a/lib/Target/ARM64/ARM64RegisterInfo.h +++ b/lib/Target/ARM64/ARM64RegisterInfo.h @@ -37,7 +37,7 @@ public: /// Code Generation virtual methods... const MCPhysReg * - getCalleeSavedRegs(const MachineFunction *MF = 0) const override; + getCalleeSavedRegs(const MachineFunction *MF = nullptr) const override; const uint32_t *getCallPreservedMask(CallingConv::ID) const override; unsigned getCSRFirstUseCost() const { @@ -82,7 +82,7 @@ public: int64_t Offset) const override; void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, - RegScavenger *RS = NULL) const override; + RegScavenger *RS = nullptr) const override; bool cannotEliminateFrame(const MachineFunction &MF) const; bool requiresVirtualBaseRegisters(const MachineFunction &MF) const override; diff --git a/lib/Target/ARM64/MCTargetDesc/ARM64AddressingModes.h b/lib/Target/ARM64/MCTargetDesc/ARM64AddressingModes.h index 553ddaed1a..00fe3ef616 100644 --- a/lib/Target/ARM64/MCTargetDesc/ARM64AddressingModes.h +++ b/lib/Target/ARM64/MCTargetDesc/ARM64AddressingModes.h @@ -48,7 +48,7 @@ static inline const char *getShiftName(ARM64_AM::ShiftType ST) { case ARM64_AM::ROR: return "ror"; case ARM64_AM::MSL: return "msl"; } - return 0; + return nullptr; } /// getShiftType - Extract the shift type. @@ -104,7 +104,7 @@ static inline const char *getExtendName(ARM64_AM::ExtendType ET) { case ARM64_AM::SXTW: return "sxtw"; case ARM64_AM::SXTX: return "sxtx"; } - return 0; + return nullptr; } /// getArithShiftValue - get the arithmetic shift value. diff --git a/lib/Target/CppBackend/CPPTargetMachine.h b/lib/Target/CppBackend/CPPTargetMachine.h index 477e788ee2..ee39f2a7cd 100644 --- a/lib/Target/CppBackend/CPPTargetMachine.h +++ b/lib/Target/CppBackend/CPPTargetMachine.h @@ -35,7 +35,7 @@ struct CPPTargetMachine : public TargetMachine { AnalysisID StartAfter, AnalysisID StopAfter); - virtual const DataLayout *getDataLayout() const { return 0; } + virtual const DataLayout *getDataLayout() const { return nullptr; } }; extern Target TheCppBackendTarget; diff --git a/lib/Target/Hexagon/HexagonCopyToCombine.cpp b/lib/Target/Hexagon/HexagonCopyToCombine.cpp index 063a932786..23de1bf77d 100644 --- a/lib/Target/Hexagon/HexagonCopyToCombine.cpp +++ b/lib/Target/Hexagon/HexagonCopyToCombine.cpp @@ -333,7 +333,7 @@ bool HexagonCopyToCombine::isSafeToMoveTogether(MachineInstr *I1, // Check for an exact kill (registers match). if (I1UseReg && I->killsRegister(I1UseReg)) { - assert(KillingInstr == 0 && "Should only see one killing instruction"); + assert(!KillingInstr && "Should only see one killing instruction"); KilledOperand = I1UseReg; KillingInstr = &*I; } diff --git a/lib/Target/Hexagon/HexagonISelLowering.cpp b/lib/Target/Hexagon/HexagonISelLowering.cpp index 30bad9a2ca..b8e5d24f4f 100644 --- a/lib/Target/Hexagon/HexagonISelLowering.cpp +++ b/lib/Target/Hexagon/HexagonISelLowering.cpp @@ -137,7 +137,7 @@ CC_Hexagon_VarArg (unsigned ValNo, MVT ValVT, State.addLoc(CCValAssign::getMem(ValNo, ValVT, ofst, LocVT, LocInfo)); return false; } - llvm_unreachable(0); + llvm_unreachable(nullptr); } diff --git a/lib/Target/Hexagon/HexagonInstrInfo.h b/lib/Target/Hexagon/HexagonInstrInfo.h index 5da23cbfbf..2a715b2d37 100644 --- a/lib/Target/Hexagon/HexagonInstrInfo.h +++ b/lib/Target/Hexagon/HexagonInstrInfo.h @@ -111,7 +111,7 @@ public: MachineInstr* MI, const SmallVectorImpl<unsigned> &Ops, MachineInstr* LoadMI) const { - return 0; + return nullptr; } unsigned createVR(MachineFunction* MF, MVT VT) const; diff --git a/lib/Target/Hexagon/HexagonMachineScheduler.h b/lib/Target/Hexagon/HexagonMachineScheduler.h index 71057aea3b..99100a141e 100644 --- a/lib/Target/Hexagon/HexagonMachineScheduler.h +++ b/lib/Target/Hexagon/HexagonMachineScheduler.h @@ -56,7 +56,7 @@ class VLIWResourceModel { public: VLIWResourceModel(const TargetMachine &TM, const TargetSchedModel *SM) : SchedModel(SM), TotalPackets(0) { - ResourcesModel = TM.getInstrInfo()->CreateTargetScheduleState(&TM,NULL); + ResourcesModel = TM.getInstrInfo()->CreateTargetScheduleState(&TM, nullptr); // This hard requirement could be relaxed, // but for now do not let it proceed. @@ -120,7 +120,7 @@ class ConvergingVLIWScheduler : public MachineSchedStrategy { // Best scheduling cost. int SCost; - SchedCandidate(): SU(NULL), SCost(0) {} + SchedCandidate(): SU(nullptr), SCost(0) {} }; /// Represent the type of SchedCandidate found within a single queue. enum CandResult { @@ -153,9 +153,9 @@ class ConvergingVLIWScheduler : public MachineSchedStrategy { /// Pending queues extend the ready queues with the same ID and the /// PendingFlag set. VLIWSchedBoundary(unsigned ID, const Twine &Name): - DAG(0), SchedModel(0), Available(ID, Name+".A"), + DAG(nullptr), SchedModel(nullptr), Available(ID, Name+".A"), Pending(ID << ConvergingVLIWScheduler::LogMaxQID, Name+".P"), - CheckPending(false), HazardRec(0), ResourceModel(0), + CheckPending(false), HazardRec(nullptr), ResourceModel(nullptr), CurrCycle(0), IssueCount(0), MinReadyCycle(UINT_MAX), MaxMinLatency(0) {} @@ -203,8 +203,9 @@ public: LogMaxQID = 2 }; - ConvergingVLIWScheduler(): - DAG(0), SchedModel(0), Top(TopQID, "TopQ"), Bot(BotQID, "BotQ") {} + ConvergingVLIWScheduler() + : DAG(nullptr), SchedModel(nullptr), Top(TopQID, "TopQ"), + Bot(BotQID, "BotQ") {} virtual void initialize(ScheduleDAGMI *dag) override; diff --git a/lib/Target/Hexagon/HexagonRegisterInfo.h b/lib/Target/Hexagon/HexagonRegisterInfo.h index 00b5068d3f..c0160d898e 100644 --- a/lib/Target/Hexagon/HexagonRegisterInfo.h +++ b/lib/Target/Hexagon/HexagonRegisterInfo.h @@ -48,16 +48,17 @@ struct HexagonRegisterInfo : public HexagonGenRegisterInfo { HexagonRegisterInfo(HexagonSubtarget &st); /// Code Generation virtual methods... - const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF = 0) const; + const MCPhysReg * + getCalleeSavedRegs(const MachineFunction *MF = nullptr) const; - const TargetRegisterClass* const* getCalleeSavedRegClasses( - const MachineFunction *MF = 0) const; + const TargetRegisterClass* const* + getCalleeSavedRegClasses(const MachineFunction *MF = nullptr) const; BitVector getReservedRegs(const MachineFunction &MF) const; void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, - RegScavenger *RS = NULL) const; + RegScavenger *RS = nullptr) const; /// determineFrameLayout - Determine the size of the frame and maximum call /// frame size. diff --git a/lib/Target/Hexagon/MCTargetDesc/HexagonMCInst.h b/lib/Target/Hexagon/MCTargetDesc/HexagonMCInst.h index 3ca71f00b2..3c52d4563f 100644 --- a/lib/Target/Hexagon/MCTargetDesc/HexagonMCInst.h +++ b/lib/Target/Hexagon/MCTargetDesc/HexagonMCInst.h @@ -31,7 +31,7 @@ namespace llvm { public: explicit HexagonMCInst(): - MCInst(), MCID(0), packetStart(0), packetEnd(0) {}; + MCInst(), MCID(nullptr), packetStart(0), packetEnd(0) {}; HexagonMCInst(const MCInstrDesc& mcid): MCInst(), MCID(&mcid), packetStart(0), packetEnd(0) {}; diff --git a/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp b/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp index 782e378687..acf1214a72 100644 --- a/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp +++ b/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.cpp @@ -45,7 +45,7 @@ void MSP430InstPrinter::printPCRelImmOperand(const MCInst *MI, unsigned OpNo, void MSP430InstPrinter::printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O, const char *Modifier) { - assert((Modifier == 0 || Modifier[0] == 0) && "No modifiers supported"); + assert((Modifier == nullptr || Modifier[0] == 0) && "No modifiers supported"); const MCOperand &Op = MI->getOperand(OpNo); if (Op.isReg()) { O << getRegisterName(Op.getReg()); diff --git a/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h b/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h index d32eb3a21a..4261224f8f 100644 --- a/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h +++ b/lib/Target/MSP430/InstPrinter/MSP430InstPrinter.h @@ -32,10 +32,10 @@ namespace llvm { static const char *getRegisterName(unsigned RegNo); void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O, - const char *Modifier = 0); + const char *Modifier = nullptr); void printPCRelImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); void printSrcMemOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O, - const char *Modifier = 0); + const char *Modifier = nullptr); void printCCOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); }; diff --git a/lib/Target/MSP430/MSP430FrameLowering.h b/lib/Target/MSP430/MSP430FrameLowering.h index 8370714a59..70e14d1b51 100644 --- a/lib/Target/MSP430/MSP430FrameLowering.h +++ b/lib/Target/MSP430/MSP430FrameLowering.h @@ -51,7 +51,7 @@ public: bool hasFP(const MachineFunction &MF) const; bool hasReservedCallFrame(const MachineFunction &MF) const; void processFunctionBeforeFrameFinalized(MachineFunction &MF, - RegScavenger *RS = NULL) const; + RegScavenger *RS = nullptr) const; }; } // End llvm namespace diff --git a/lib/Target/MSP430/MSP430ISelLowering.cpp b/lib/Target/MSP430/MSP430ISelLowering.cpp index 8d49a70b49..c5901bcd6e 100644 --- a/lib/Target/MSP430/MSP430ISelLowering.cpp +++ b/lib/Target/MSP430/MSP430ISelLowering.cpp @@ -462,7 +462,7 @@ MSP430TargetLowering::LowerCCCArguments(SDValue Chain, errs() << "LowerFormalArguments Unhandled argument type: " << RegVT.getSimpleVT().SimpleTy << "\n"; #endif - llvm_unreachable(0); + llvm_unreachable(nullptr); } case MVT::i16: unsigned VReg = RegInfo.createVirtualRegister(&MSP430::GR16RegClass); diff --git a/lib/Target/MSP430/MSP430RegisterInfo.h b/lib/Target/MSP430/MSP430RegisterInfo.h index 81bb8d828d..279886ed3a 100644 --- a/lib/Target/MSP430/MSP430RegisterInfo.h +++ b/lib/Target/MSP430/MSP430RegisterInfo.h @@ -35,7 +35,8 @@ public: MSP430RegisterInfo(MSP430TargetMachine &tm); /// Code Generation virtual methods... - const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF = 0) const; + const MCPhysReg * + getCalleeSavedRegs(const MachineFunction *MF = nullptr) const; BitVector getReservedRegs(const MachineFunction &MF) const; const TargetRegisterClass* @@ -43,7 +44,7 @@ public: void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, - RegScavenger *RS = NULL) const; + RegScavenger *RS = nullptr) const; // Debug information queries. unsigned getFrameRegister(const MachineFunction &MF) const; diff --git a/lib/Target/Mips/MCTargetDesc/MipsMCNaCl.h b/lib/Target/Mips/MCTargetDesc/MipsMCNaCl.h index 6992d06c45..01d5363812 100644 --- a/lib/Target/Mips/MCTargetDesc/MipsMCNaCl.h +++ b/lib/Target/Mips/MCTargetDesc/MipsMCNaCl.h @@ -18,7 +18,7 @@ namespace llvm { static const unsigned MIPS_NACL_BUNDLE_ALIGN = 4u; bool isBasePlusOffsetMemoryAccess(unsigned Opcode, unsigned *AddrIdx, - bool *IsStore = NULL); + bool *IsStore = nullptr); bool baseRegNeedsLoadStoreMask(unsigned Reg); // This function creates an MCELFStreamer for Mips NaCl. diff --git a/lib/Target/Mips/MipsAsmPrinter.h b/lib/Target/Mips/MipsAsmPrinter.h index 3e9093e2e4..4eb3eef94c 100644 --- a/lib/Target/Mips/MipsAsmPrinter.h +++ b/lib/Target/Mips/MipsAsmPrinter.h @@ -82,7 +82,7 @@ public: MipsMCInstLower MCInstLowering; explicit MipsAsmPrinter(TargetMachine &TM, MCStreamer &Streamer) - : AsmPrinter(TM, Streamer), MCP(0), InConstantPool(false), + : AsmPrinter(TM, Streamer), MCP(nullptr), InConstantPool(false), MCInstLowering(*this) { Subtarget = &TM.getSubtarget<MipsSubtarget>(); } @@ -122,7 +122,7 @@ public: void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O); void printMemOperandEA(const MachineInstr *MI, int opNum, raw_ostream &O); void printFCCOperand(const MachineInstr *MI, int opNum, raw_ostream &O, - const char *Modifier = 0); + const char *Modifier = nullptr); void EmitStartOfAsmFile(Module &M); void EmitEndOfAsmFile(Module &M); void PrintDebugValueComment(const MachineInstr *MI, raw_ostream &OS); diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp index ed8c944885..d152e6781a 100644 --- a/lib/Target/Mips/MipsISelLowering.cpp +++ b/lib/Target/Mips/MipsISelLowering.cpp @@ -3268,7 +3268,7 @@ analyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Args, dbgs() << "Call operand #" << I << " has unhandled type " << EVT(ArgVT).getEVTString(); #endif - llvm_unreachable(0); + llvm_unreachable(nullptr); } } } @@ -3300,7 +3300,7 @@ analyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Args, dbgs() << "Formal Arg #" << I << " has unhandled type " << EVT(ArgVT).getEVTString(); #endif - llvm_unreachable(0); + llvm_unreachable(nullptr); } } @@ -3325,7 +3325,7 @@ analyzeReturn(const SmallVectorImpl<Ty> &RetVals, bool IsSoftFloat, dbgs() << "Call result #" << I << " has unhandled type " << EVT(VT).getEVTString() << '\n'; #endif - llvm_unreachable(0); + llvm_unreachable(nullptr); } } } diff --git a/lib/Target/Mips/MipsMachineFunction.cpp b/lib/Target/Mips/MipsMachineFunction.cpp index dedf802f80..96c1f74247 100644 --- a/lib/Target/Mips/MipsMachineFunction.cpp +++ b/lib/Target/Mips/MipsMachineFunction.cpp @@ -27,7 +27,7 @@ FixGlobalBaseReg("mips-fix-global-base-reg", cl::Hidden, cl::init(true), MipsCallEntry::MipsCallEntry(const StringRef &N) { #ifndef NDEBUG Name = N; - Val = 0; + Val = nullptr; #endif } diff --git a/lib/Target/Mips/MipsOptimizePICCall.cpp b/lib/Target/Mips/MipsOptimizePICCall.cpp index f06cadd807..87895c2d23 100644 --- a/lib/Target/Mips/MipsOptimizePICCall.cpp +++ b/lib/Target/Mips/MipsOptimizePICCall.cpp @@ -155,7 +155,7 @@ static void eraseGPOpnd(MachineInstr &MI) { } } - llvm_unreachable(0); + llvm_unreachable(nullptr); } MBBInfo::MBBInfo(MachineDomTreeNode *N) : Node(N), HTScope(nullptr) {} diff --git a/lib/Target/Mips/MipsRegisterInfo.h b/lib/Target/Mips/MipsRegisterInfo.h index 136c142dde..46b9d10822 100644 --- a/lib/Target/Mips/MipsRegisterInfo.h +++ b/lib/Target/Mips/MipsRegisterInfo.h @@ -47,7 +47,7 @@ public: unsigned getRegPressureLimit(const TargetRegisterClass *RC, MachineFunction &MF) const; - const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF = 0) const; + const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF =nullptr) const; const uint32_t *getCallPreservedMask(CallingConv::ID) const; static const uint32_t *getMips16RetHelperMask(); @@ -60,10 +60,10 @@ public: /// Stack Frame Processing Methods void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, - RegScavenger *RS = NULL) const; + RegScavenger *RS = nullptr) const; void processFunctionBeforeFrameFinalized(MachineFunction &MF, - RegScavenger *RS = NULL) const; + RegScavenger *RS = nullptr) const; /// Debug information queries. unsigned getFrameRegister(const MachineFunction &MF) const; diff --git a/lib/Target/Mips/MipsSEISelLowering.h b/lib/Target/Mips/MipsSEISelLowering.h index 079fbf697b..435c15c750 100644 --- a/lib/Target/Mips/MipsSEISelLowering.h +++ b/lib/Target/Mips/MipsSEISelLowering.h @@ -30,8 +30,8 @@ namespace llvm { void addMSAFloatType(MVT::SimpleValueType Ty, const TargetRegisterClass *RC); - virtual bool allowsUnalignedMemoryAccesses(EVT VT, unsigned AS = 0, - bool *Fast = 0) const override; + bool allowsUnalignedMemoryAccesses(EVT VT, unsigned AS = 0, + bool *Fast = nullptr) const override; virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const; diff --git a/lib/Target/Mips/MipsTargetMachine.h b/lib/Target/Mips/MipsTargetMachine.h index 1179a93db6..6ba8b19da6 100644 --- a/lib/Target/Mips/MipsTargetMachine.h +++ b/lib/Target/Mips/MipsTargetMachine.h @@ -67,7 +67,7 @@ public: { return &DL;} virtual const InstrItineraryData *getInstrItineraryData() const { - return Subtarget.inMips16Mode() ? 0 : &InstrItins; + return Subtarget.inMips16Mode() ? nullptr : &InstrItins; } virtual MipsJITInfo *getJITInfo() diff --git a/lib/Target/NVPTX/InstPrinter/NVPTXInstPrinter.h b/lib/Target/NVPTX/InstPrinter/NVPTXInstPrinter.h index 93029ae8d3..d43c3592d8 100644 --- a/lib/Target/NVPTX/InstPrinter/NVPTXInstPrinter.h +++ b/lib/Target/NVPTX/InstPrinter/NVPTXInstPrinter.h @@ -37,15 +37,15 @@ public: void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); void printCvtMode(const MCInst *MI, int OpNum, raw_ostream &O, - const char *Modifier = 0); + const char *Modifier = nullptr); void printCmpMode(const MCInst *MI, int OpNum, raw_ostream &O, - const char *Modifier = 0); + const char *Modifier = nullptr); void printLdStCode(const MCInst *MI, int OpNum, - raw_ostream &O, const char *Modifier = 0); + raw_ostream &O, const char *Modifier = nullptr); void printMemOperand(const MCInst *MI, int OpNum, - raw_ostream &O, const char *Modifier = 0); + raw_ostream &O, const char *Modifier = nullptr); void printProtoIdent(const MCInst *MI, int OpNum, - raw_ostream &O, const char *Modifier = 0); + raw_ostream &O, const char *Modifier = nullptr); }; } diff --git a/lib/Target/NVPTX/NVPTXAsmPrinter.h b/lib/Target/NVPTX/NVPTXAsmPrinter.h index c83a0f1f84..4f1b7a12fb 100644 --- a/lib/Target/NVPTX/NVPTXAsmPrinter.h +++ b/lib/Target/NVPTX/NVPTXAsmPrinter.h @@ -208,12 +208,12 @@ private: MCOperand GetSymbolRef(const MCSymbol *Symbol); unsigned encodeVirtualRegister(unsigned Reg); - void EmitAlignment(unsigned NumBits, const GlobalValue *GV = 0) const {} + void EmitAlignment(unsigned NumBits, const GlobalValue *GV = nullptr) const {} void printVecModifiedImmediate(const MachineOperand &MO, const char *Modifier, raw_ostream &O); void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O, - const char *Modifier = 0); + const char *Modifier = nullptr); void printImplicitDef(const MachineInstr *MI, raw_ostream &O) const; void printModuleLevelGV(const GlobalVariable *GVar, raw_ostream &O, bool = false); @@ -236,7 +236,7 @@ private: unsigned AsmVariant, const char *ExtraCode, raw_ostream &); void printOperand(const MachineInstr *MI, int opNum, raw_ostream &O, - const char *Modifier = 0); + const char *Modifier = nullptr); bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, unsigned AsmVariant, const char *ExtraCode, raw_ostream &); @@ -312,7 +312,7 @@ public: : AsmPrinter(TM, Streamer), nvptxSubtarget(TM.getSubtarget<NVPTXSubtarget>()) { CurrentBankselLabelInBasicBlock = ""; - reader = NULL; + reader = nullptr; EmitGeneric = (nvptxSubtarget.getDrvInterface() == NVPTX::CUDA); } diff --git a/lib/Target/NVPTX/NVPTXMCExpr.h b/lib/Target/NVPTX/NVPTXMCExpr.h index 0efb231d7d..8e0e225f58 100644 --- a/lib/Target/NVPTX/NVPTXMCExpr.h +++ b/lib/Target/NVPTX/NVPTXMCExpr.h @@ -68,7 +68,7 @@ public: } void AddValueSymbols(MCAssembler *) const {}; const MCSection *FindAssociatedSection() const { - return NULL; + return nullptr; } // There are no TLS NVPTXMCExprs at the moment. diff --git a/lib/Target/NVPTX/NVPTXRegisterInfo.h b/lib/Target/NVPTX/NVPTXRegisterInfo.h index c5e98ab51a..4aff42ea83 100644 --- a/lib/Target/NVPTX/NVPTXRegisterInfo.h +++ b/lib/Target/NVPTX/NVPTXRegisterInfo.h @@ -42,7 +42,7 @@ public: // NVPTX callee saved registers virtual const MCPhysReg * - getCalleeSavedRegs(const MachineFunction *MF = 0) const; + getCalleeSavedRegs(const MachineFunction *MF = nullptr) const; // NVPTX callee saved register classes virtual const TargetRegisterClass *const * @@ -52,7 +52,7 @@ public: virtual void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj, unsigned FIOperandNum, - RegScavenger *RS = NULL) const; + RegScavenger *RS = nullptr) const; virtual int getDwarfRegNum(unsigned RegNum, bool isEH) const; virtual unsigned getFrameRegister(const MachineFunction &MF) const; diff --git a/lib/Target/NVPTX/NVPTXTargetObjectFile.h b/lib/Target/NVPTX/NVPTXTargetObjectFile.h index 2a7281e00d..0b438c521a 100644 --- a/lib/Target/NVPTX/NVPTXTargetObjectFile.h +++ b/lib/Target/NVPTX/NVPTXTargetObjectFile.h @@ -22,26 +22,26 @@ class NVPTXTargetObjectFile : public TargetLoweringObjectFile { public: NVPTXTargetObjectFile() { - TextSection = 0; - DataSection = 0; - BSSSection = 0; - ReadOnlySection = 0; + TextSection = nullptr; + DataSection = nullptr; + BSSSection = nullptr; + ReadOnlySection = nullptr; - StaticCtorSection = 0; - StaticDtorSection = 0; - LSDASection = 0; - EHFrameSection = 0; - DwarfAbbrevSection = 0; - DwarfInfoSection = 0; - DwarfLineSection = 0; - DwarfFrameSection = 0; - DwarfPubTypesSection = 0; - DwarfDebugInlineSection = 0; - DwarfStrSection = 0; - DwarfLocSection = 0; - DwarfARangesSection = 0; - DwarfRangesSection = 0; - DwarfMacroInfoSection = 0; + StaticCtorSection = nullptr; + StaticDtorSection = nullptr; + LSDASection = nullptr; + EHFrameSection = nullptr; + DwarfAbbrevSection = nullptr; + DwarfInfoSection = nullptr; + DwarfLineSection = nullptr; + DwarfFrameSection = nullptr; + DwarfPubTypesSection = nullptr; + DwarfDebugInlineSection = nullptr; + DwarfStrSection = nullptr; + DwarfLocSection = nullptr; + DwarfARangesSection = nullptr; + DwarfRangesSection = nullptr; + DwarfMacroInfoSection = nullptr; } virtual ~NVPTXTargetObjectFile(); diff --git a/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h b/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h index 4d1df78ee4..914f8657c9 100644 --- a/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h +++ b/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h @@ -41,7 +41,7 @@ public: void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); void printPredicateOperand(const MCInst *MI, unsigned OpNo, - raw_ostream &O, const char *Modifier = 0); + raw_ostream &O, const char *Modifier = nullptr); void printU2ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); void printS5ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); diff --git a/lib/Target/PowerPC/PPCFrameLowering.h b/lib/Target/PowerPC/PPCFrameLowering.h index 7aab37e188..619ad833a7 100644 --- a/lib/Target/PowerPC/PPCFrameLowering.h +++ b/lib/Target/PowerPC/PPCFrameLowering.h @@ -46,9 +46,9 @@ public: void replaceFPWithRealFP(MachineFunction &MF) const; void processFunctionBeforeCalleeSavedScan(MachineFunction &MF, - RegScavenger *RS = NULL) const; + RegScavenger *RS = nullptr) const; void processFunctionBeforeFrameFinalized(MachineFunction &MF, - RegScavenger *RS = NULL) const; + RegScavenger *RS = nullptr) const; void addScavengingSpillSlot(MachineFunction &MF, RegScavenger *RS) const; bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, @@ -156,7 +156,7 @@ public: // Early exit if not using the SVR4 ABI. if (!Subtarget.isSVR4ABI()) { NumEntries = 0; - return 0; + return nullptr; } // Note that the offsets here overlap, but this is fixed up in diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index b4874887d6..119911626d 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -3801,7 +3801,7 @@ PPCTargetLowering::LowerCall_32SVR4(SDValue Chain, SDValue Callee, errs() << "Call operand #" << i << " has unhandled type " << EVT(ArgVT).getEVTString() << "\n"; #endif - llvm_unreachable(0); + llvm_unreachable(nullptr); } } } else { @@ -5487,7 +5487,7 @@ SDValue PPCTargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const { SDLoc dl(Op); BuildVectorSDNode *BVN = dyn_cast<BuildVectorSDNode>(Op.getNode()); - assert(BVN != 0 && "Expected a BuildVectorSDNode in LowerBUILD_VECTOR"); + assert(BVN && "Expected a BuildVectorSDNode in LowerBUILD_VECTOR"); // Check if this is a splat of a constant value. APInt APSplatBits, APSplatUndef; diff --git a/lib/Target/PowerPC/PPCISelLowering.h b/lib/Target/PowerPC/PPCISelLowering.h index 497937624e..36fdf46ceb 100644 --- a/lib/Target/PowerPC/PPCISelLowering.h +++ b/lib/Target/PowerPC/PPCISelLowering.h @@ -492,7 +492,7 @@ namespace llvm { /// relative to software emulation. virtual bool allowsUnalignedMemoryAccesses(EVT VT, unsigned AddrSpace, - bool *Fast = 0) const; + bool *Fast = nullptr) const; /// isFMAFasterThanFMulAndFAdd - Return true if an FMA operation is faster /// than a pair of fmul and fadd instructions. fmuladd intrinsics will be diff --git a/lib/Target/PowerPC/PPCRegisterInfo.h b/lib/Target/PowerPC/PPCRegisterInfo.h index 321979a0b4..02b9179f64 100644 --- a/lib/Target/PowerPC/PPCRegisterInfo.h +++ b/lib/Target/PowerPC/PPCRegisterInfo.h @@ -44,7 +44,7 @@ public: getLargestLegalSuperClass(const TargetRegisterClass *RC) const; /// Code Generation virtual methods... - const MCPhysReg *getCalleeSavedRegs(const MachineFunction* MF = 0) const; + const MCPhysReg *getCalleeSavedRegs(const MachineFunction* MF =nullptr) const; const uint32_t *getCallPreservedMask(CallingConv::ID CC) const; const uint32_t *getNoPreservedMask() const; @@ -85,7 +85,7 @@ public: int &FrameIdx) const; void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, - RegScavenger *RS = NULL) const; + RegScavenger *RS = nullptr) const; // Support for virtual base registers. bool needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const; diff --git a/lib/Target/R600/AMDGPUInstrInfo.h b/lib/Target/R600/AMDGPUInstrInfo.h index 426910c8fc..c23960bf32 100644 --- a/lib/Target/R600/AMDGPUInstrInfo.h +++ b/lib/Target/R600/AMDGPUInstrInfo.h @@ -118,7 +118,7 @@ public: SmallVectorImpl<SDNode *> &NewNodes) const; unsigned getOpcodeAfterMemoryUnfold(unsigned Opc, bool UnfoldLoad, bool UnfoldStore, - unsigned *LoadRegIndex = 0) const; + unsigned *LoadRegIndex = nullptr) const; bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, int64_t Offset1, int64_t Offset2, unsigned NumLoads) const; diff --git a/lib/Target/R600/AMDGPURegisterInfo.h b/lib/Target/R600/AMDGPURegisterInfo.h index a372ea9502..168d55b962 100644 --- a/lib/Target/R600/AMDGPURegisterInfo.h +++ b/lib/Target/R600/AMDGPURegisterInfo.h @@ -43,11 +43,11 @@ struct AMDGPURegisterInfo : public AMDGPUGenRegisterInfo { /// \returns The ISA reg class that is equivalent to \p RC. virtual const TargetRegisterClass * getISARegClass( const TargetRegisterClass * RC) const { - assert(!"Unimplemented"); return NULL; + assert(!"Unimplemented"); return nullptr; } virtual const TargetRegisterClass* getCFGStructurizerRegClass(MVT VT) const { - assert(!"Unimplemented"); return NULL; + assert(!"Unimplemented"); return nullptr; } virtual unsigned getHWRegIndex(unsigned Reg) const { diff --git a/lib/Target/R600/AMDILCFGStructurizer.cpp b/lib/Target/R600/AMDILCFGStructurizer.cpp index 8de9339784..9828a04681 100644 --- a/lib/Target/R600/AMDILCFGStructurizer.cpp +++ b/lib/Target/R600/AMDILCFGStructurizer.cpp @@ -168,7 +168,7 @@ public: MLI = &getAnalysis<MachineLoopInfo>(); DEBUG(dbgs() << "LoopInfo:\n"; PrintLoopinfo(*MLI);); MDT = &getAnalysis<MachineDominatorTree>(); - DEBUG(MDT->print(dbgs(), (const llvm::Module*)0);); + DEBUG(MDT->print(dbgs(), (const llvm::Module*)nullptr);); PDT = &getAnalysis<MachinePostDominatorTree>(); DEBUG(PDT->print(dbgs());); prepare(); diff --git a/lib/Target/R600/AMDILIntrinsicInfo.h b/lib/Target/R600/AMDILIntrinsicInfo.h index 35559e23fc..a81354efb9 100644 --- a/lib/Target/R600/AMDILIntrinsicInfo.h +++ b/lib/Target/R600/AMDILIntrinsicInfo.h @@ -34,12 +34,12 @@ enum ID { class AMDGPUIntrinsicInfo : public TargetIntrinsicInfo { public: AMDGPUIntrinsicInfo(TargetMachine *tm); - std::string getName(unsigned int IntrId, Type **Tys = 0, + std::string getName(unsigned int IntrId, Type **Tys = nullptr, unsigned int numTys = 0) const; unsigned int lookupName(const char *Name, unsigned int Len) const; bool isOverloaded(unsigned int IID) const; Function *getDeclaration(Module *M, unsigned int ID, - Type **Tys = 0, + Type **Tys = nullptr, unsigned int numTys = 0) const; }; diff --git a/lib/Target/R600/R600InstrInfo.h b/lib/Target/R600/R600InstrInfo.h index d5ff4de764..baee6e002b 100644 --- a/lib/Target/R600/R600InstrInfo.h +++ b/lib/Target/R600/R600InstrInfo.h @@ -192,7 +192,7 @@ namespace llvm { unsigned int getInstrLatency(const InstrItineraryData *ItinData, const MachineInstr *MI, - unsigned *PredCost = 0) const; + unsigned *PredCost = nullptr) const; virtual int getInstrLatency(const InstrItineraryData *ItinData, SDNode *Node) const { return 1;} diff --git a/lib/Target/R600/R600MachineScheduler.h b/lib/Target/R600/R600MachineScheduler.h index b909ff71a6..390abbb4dc 100644 --- a/lib/Target/R600/R600MachineScheduler.h +++ b/lib/Target/R600/R600MachineScheduler.h @@ -68,7 +68,7 @@ class R600SchedStrategy : public MachineSchedStrategy { public: R600SchedStrategy() : - DAG(0), TII(0), TRI(0), MRI(0) { + DAG(nullptr), TII(nullptr), TRI(nullptr), MRI(nullptr) { } virtual ~R600SchedStrategy() { diff --git a/lib/Target/R600/SIInstrInfo.h b/lib/Target/R600/SIInstrInfo.h index 044cf37c95..415f31bfd6 100644 --- a/lib/Target/R600/SIInstrInfo.h +++ b/lib/Target/R600/SIInstrInfo.h @@ -79,7 +79,7 @@ public: bool NewMI=false) const; bool isTriviallyReMaterializable(const MachineInstr *MI, - AliasAnalysis *AA = 0) const; + AliasAnalysis *AA = nullptr) const; virtual unsigned getIEQOpcode() const { llvm_unreachable("Unimplemented"); diff --git a/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp b/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp index bf3f7e9df2..9f3ef1c4b2 100644 --- a/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp +++ b/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp @@ -245,7 +245,7 @@ public: case k_Immediate: OS << "Imm: " << getImm() << "\n"; break; case k_MemoryReg: OS << "Mem: " << getMemBase() << "+" << getMemOffsetReg() << "\n"; break; - case k_MemoryImm: assert(getMemOff() != 0); + case k_MemoryImm: assert(getMemOff() != nullptr); OS << "Mem: " << getMemBase() << "+" << *getMemOff() << "\n"; break; diff --git a/lib/Target/Sparc/InstPrinter/SparcInstPrinter.h b/lib/Target/Sparc/InstPrinter/SparcInstPrinter.h index 45ee6c027f..056542096b 100644 --- a/lib/Target/Sparc/InstPrinter/SparcInstPrinter.h +++ b/lib/Target/Sparc/InstPrinter/SparcInstPrinter.h @@ -42,7 +42,7 @@ public: void printOperand(const MCInst *MI, int opNum, raw_ostream &OS); void printMemOperand(const MCInst *MI, int opNum, raw_ostream &OS, - const char *Modifier = 0); + const char *Modifier = nullptr); void printCCOperand(const MCInst *MI, int opNum, raw_ostream &OS); bool printGetPCX(const MCInst *MI, unsigned OpNo, raw_ostream &OS); diff --git a/lib/Target/Sparc/SparcFrameLowering.h b/lib/Target/Sparc/SparcFrameLowering.h index 072fde3938..c13ca1a014 100644 --- a/lib/Target/Sparc/SparcFrameLowering.h +++ b/lib/Target/Sparc/SparcFrameLowering.h @@ -41,7 +41,7 @@ public: bool hasReservedCallFrame(const MachineFunction &MF) const; bool hasFP(const MachineFunction &MF) const; void processFunctionBeforeCalleeSavedScan(MachineFunction &MF, - RegScavenger *RS = NULL) const; + RegScavenger *RS = nullptr) const; private: // Remap input registers to output registers for leaf procedure. diff --git a/lib/Target/Sparc/SparcRegisterInfo.h b/lib/Target/Sparc/SparcRegisterInfo.h index 3f3e12ff13..d3b9d60cdd 100644 --- a/lib/Target/Sparc/SparcRegisterInfo.h +++ b/lib/Target/Sparc/SparcRegisterInfo.h @@ -31,7 +31,7 @@ struct SparcRegisterInfo : public SparcGenRegisterInfo { SparcRegisterInfo(SparcSubtarget &st); /// Code Generation virtual methods... - const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF = 0) const; + const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF =nullptr) const; const uint32_t* getCallPreservedMask(CallingConv::ID CC) const; const uint32_t* getRTCallPreservedMask(CallingConv::ID CC) const; @@ -43,10 +43,10 @@ struct SparcRegisterInfo : public SparcGenRegisterInfo { void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, - RegScavenger *RS = NULL) const; + RegScavenger *RS = nullptr) const; void processFunctionBeforeFrameFinalized(MachineFunction &MF, - RegScavenger *RS = NULL) const; + RegScavenger *RS = nullptr) const; // Debug information queries. unsigned getFrameRegister(const MachineFunction &MF) const; diff --git a/lib/Target/SystemZ/SystemZInstrInfo.h b/lib/Target/SystemZ/SystemZInstrInfo.h index 55f80af68c..09aee5d202 100644 --- a/lib/Target/SystemZ/SystemZInstrInfo.h +++ b/lib/Target/SystemZ/SystemZInstrInfo.h @@ -229,7 +229,7 @@ public: // BRANCH exists, return the opcode for the latter, otherwise return 0. // MI, if nonnull, is the compare instruction. unsigned getCompareAndBranch(unsigned Opcode, - const MachineInstr *MI = 0) const; + const MachineInstr *MI = nullptr) const; // Emit code before MBBI in MI to move immediate value Value into // physical register Reg. diff --git a/lib/Target/SystemZ/SystemZRegisterInfo.h b/lib/Target/SystemZ/SystemZRegisterInfo.h index f943f19012..e236f712e7 100644 --- a/lib/Target/SystemZ/SystemZRegisterInfo.h +++ b/lib/Target/SystemZ/SystemZRegisterInfo.h @@ -49,7 +49,7 @@ public: bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override { return true; } - const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF = 0) const + const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF = nullptr) const override; BitVector getReservedRegs(const MachineFunction &MF) const override; void eliminateFrameIndex(MachineBasicBlock::iterator MI, diff --git a/lib/Target/X86/AsmParser/X86Operand.h b/lib/Target/X86/AsmParser/X86Operand.h index 45fe2a9d0c..de3be38c1d 100644 --- a/lib/Target/X86/AsmParser/X86Operand.h +++ b/lib/Target/X86/AsmParser/X86Operand.h @@ -422,7 +422,7 @@ struct X86Operand : public MCParsedAsmOperand { bool AddressOf = false, SMLoc OffsetOfLoc = SMLoc(), StringRef SymName = StringRef(), - void *OpDecl = 0) { + void *OpDecl = nullptr) { X86Operand *Res = new X86Operand(Register, StartLoc, EndLoc); Res->Reg.RegNo = RegNo; Res->AddressOf = AddressOf; @@ -441,7 +441,7 @@ struct X86Operand : public MCParsedAsmOperand { /// Create an absolute memory operand. static X86Operand *CreateMem(const MCExpr *Disp, SMLoc StartLoc, SMLoc EndLoc, unsigned Size = 0, StringRef SymName = StringRef(), - void *OpDecl = 0) { + void *OpDecl = nullptr) { X86Operand *Res = new X86Operand(Memory, StartLoc, EndLoc); Res->Mem.SegReg = 0; Res->Mem.Disp = Disp; @@ -461,7 +461,7 @@ struct X86Operand : public MCParsedAsmOperand { unsigned Scale, SMLoc StartLoc, SMLoc EndLoc, unsigned Size = 0, StringRef SymName = StringRef(), - void *OpDecl = 0) { + void *OpDecl = nullptr) { // We should never just have a displacement, that should be parsed as an // absolute memory operand. assert((SegReg || BaseReg || IndexReg) && "Invalid memory operand!"); diff --git a/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp b/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp index 632f3b5c7c..918df13871 100644 --- a/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp +++ b/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp @@ -80,7 +80,7 @@ static InstructionContext contextForAttrs(uint16_t attrMask) { static int modRMRequired(OpcodeType type, InstructionContext insnContext, uint16_t opcode) { - const struct ContextDecision* decision = 0; + const struct ContextDecision* decision = nullptr; switch (type) { case ONEBYTE: @@ -124,7 +124,7 @@ static InstrUID decode(OpcodeType type, InstructionContext insnContext, uint8_t opcode, uint8_t modRM) { - const struct ModRMDecision* dec = 0; + const struct ModRMDecision* dec = nullptr; switch (type) { case ONEBYTE: diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp index 0be680b182..76718d0b68 100644 --- a/lib/Target/X86/X86CodeEmitter.cpp +++ b/lib/Target/X86/X86CodeEmitter.cpp @@ -1476,7 +1476,7 @@ void Emitter<CodeEmitter>::emitInstruction(MachineInstr &MI, #ifndef NDEBUG dbgs() << "Cannot encode all operands of: " << MI << "\n"; #endif - llvm_unreachable(0); + llvm_unreachable(nullptr); } MCE.processDebugLoc(MI.getDebugLoc(), false); diff --git a/lib/Target/X86/X86FrameLowering.h b/lib/Target/X86/X86FrameLowering.h index f0db8cbc0a..208bb8bd6a 100644 --- a/lib/Target/X86/X86FrameLowering.h +++ b/lib/Target/X86/X86FrameLowering.h @@ -47,7 +47,7 @@ public: void adjustForHiPEPrologue(MachineFunction &MF) const override; void processFunctionBeforeCalleeSavedScan(MachineFunction &MF, - RegScavenger *RS = NULL) const override; + RegScavenger *RS = nullptr) const override; bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp index 46f64e1bf1..3baa774042 100644 --- a/lib/Target/X86/X86ISelDAGToDAG.cpp +++ b/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -104,14 +104,14 @@ namespace { void dump() { dbgs() << "X86ISelAddressMode " << this << '\n'; dbgs() << "Base_Reg "; - if (Base_Reg.getNode() != 0) + if (Base_Reg.getNode()) Base_Reg.getNode()->dump(); else dbgs() << "nul"; dbgs() << " Base.FrameIndex " << Base_FrameIndex << '\n' << " Scale" << Scale << '\n' << "IndexReg "; - if (IndexReg.getNode() != 0) + if (IndexReg.getNode()) IndexReg.getNode()->dump(); else dbgs() << "nul"; @@ -2773,7 +2773,7 @@ SDNode *X86DAGToDAGISel::Select(SDNode *Node) { SDNode *ResNode = SelectCode(Node); DEBUG(dbgs() << "=> "; - if (ResNode == NULL || ResNode == Node) + if (ResNode == nullptr || ResNode == Node) Node->dump(CurDAG); else ResNode->dump(CurDAG); diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index d1f19a7242..5b0882b2ef 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -11515,7 +11515,7 @@ static SDValue getTargetVShiftByConstNode(unsigned Opc, SDLoc dl, MVT VT, ConstantSDNode *ND; switch(Opc) { - default: llvm_unreachable(0); + default: llvm_unreachable(nullptr); case X86ISD::VSHLI: for (unsigned i=0; i!=NumElts; ++i) { SDValue CurrentOp = SrcOp->getOperand(i); diff --git a/lib/Target/X86/X86ISelLowering.h b/lib/Target/X86/X86ISelLowering.h index 7becb54d65..4533404b32 100644 --- a/lib/Target/X86/X86ISelLowering.h +++ b/lib/Target/X86/X86ISelLowering.h @@ -783,7 +783,7 @@ namespace llvm { /// Intel processors have a unified instruction and data cache const char * getClearCacheBuiltinName() const { - return 0; // nothing to do, move along. + return nullptr; // nothing to do, move along. } /// createFastISel - This method returns a target specific FastISel object, diff --git a/lib/Target/X86/X86InstrBuilder.h b/lib/Target/X86/X86InstrBuilder.h index aaef4a466d..e421f8c7b9 100644 --- a/lib/Target/X86/X86InstrBuilder.h +++ b/lib/Target/X86/X86InstrBuilder.h @@ -52,7 +52,8 @@ struct X86AddressMode { unsigned GVOpFlags; X86AddressMode() - : BaseType(RegBase), Scale(1), IndexReg(0), Disp(0), GV(0), GVOpFlags(0) { + : BaseType(RegBase), Scale(1), IndexReg(0), Disp(0), GV(nullptr), + GVOpFlags(0) { Base.Reg = 0; } diff --git a/lib/Target/X86/X86InstrInfo.h b/lib/Target/X86/X86InstrInfo.h index 156291e78b..cf8a9fa66a 100644 --- a/lib/Target/X86/X86InstrInfo.h +++ b/lib/Target/X86/X86InstrInfo.h @@ -325,7 +325,7 @@ public: /// value. unsigned getOpcodeAfterMemoryUnfold(unsigned Opc, bool UnfoldLoad, bool UnfoldStore, - unsigned *LoadRegIndex = 0) const override; + unsigned *LoadRegIndex = nullptr) const override; /// areLoadsFromSameBasePtr - This is used by the pre-regalloc scheduler /// to determine if two loads are loading from the same base address. It diff --git a/lib/Target/X86/X86RegisterInfo.h b/lib/Target/X86/X86RegisterInfo.h index 2aa6543769..2289d91960 100644 --- a/lib/Target/X86/X86RegisterInfo.h +++ b/lib/Target/X86/X86RegisterInfo.h @@ -122,7 +122,7 @@ public: void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj, unsigned FIOperandNum, - RegScavenger *RS = NULL) const override; + RegScavenger *RS = nullptr) const override; // Debug information queries. unsigned getFrameRegister(const MachineFunction &MF) const override; diff --git a/lib/Target/XCore/XCoreFrameLowering.cpp b/lib/Target/XCore/XCoreFrameLowering.cpp index 954fddf904..5461a3f5cf 100644 --- a/lib/Target/XCore/XCoreFrameLowering.cpp +++ b/lib/Target/XCore/XCoreFrameLowering.cpp @@ -495,7 +495,7 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, errs() << "eliminateCallFramePseudoInstr size too big: " << Amount << "\n"; #endif - llvm_unreachable(0); + llvm_unreachable(nullptr); } MachineInstr *New; diff --git a/lib/Target/XCore/XCoreFrameLowering.h b/lib/Target/XCore/XCoreFrameLowering.h index 6cd90c96e7..34571d335b 100644 --- a/lib/Target/XCore/XCoreFrameLowering.h +++ b/lib/Target/XCore/XCoreFrameLowering.h @@ -46,10 +46,10 @@ namespace llvm { bool hasFP(const MachineFunction &MF) const; void processFunctionBeforeCalleeSavedScan(MachineFunction &MF, - RegScavenger *RS = NULL) const; + RegScavenger *RS = nullptr) const; void processFunctionBeforeFrameFinalized(MachineFunction &MF, - RegScavenger *RS = NULL) const; + RegScavenger *RS = nullptr) const; //! Stack slot size (4 bytes) static int stackSlotSize() { diff --git a/lib/Target/XCore/XCoreISelLowering.cpp b/lib/Target/XCore/XCoreISelLowering.cpp index e97e19a64f..1c52c70afe 100644 --- a/lib/Target/XCore/XCoreISelLowering.cpp +++ b/lib/Target/XCore/XCoreISelLowering.cpp @@ -1345,7 +1345,7 @@ XCoreTargetLowering::LowerCCCArguments(SDValue Chain, errs() << "LowerFormalArguments Unhandled argument type: " << RegVT.getSimpleVT().SimpleTy << "\n"; #endif - llvm_unreachable(0); + llvm_unreachable(nullptr); } case MVT::i32: unsigned VReg = RegInfo.createVirtualRegister(&XCore::GRRegsRegClass); diff --git a/lib/Target/XCore/XCoreRegisterInfo.h b/lib/Target/XCore/XCoreRegisterInfo.h index 552cb78cbf..ff9b95697a 100644 --- a/lib/Target/XCore/XCoreRegisterInfo.h +++ b/lib/Target/XCore/XCoreRegisterInfo.h @@ -29,7 +29,7 @@ public: /// Code Generation virtual methods... - const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF = 0) const; + const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF =nullptr) const; BitVector getReservedRegs(const MachineFunction &MF) const; @@ -41,7 +41,7 @@ public: void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, - RegScavenger *RS = NULL) const; + RegScavenger *RS = nullptr) const; // Debug information queries. unsigned getFrameRegister(const MachineFunction &MF) const; diff --git a/lib/Transforms/InstCombine/InstCombine.h b/lib/Transforms/InstCombine/InstCombine.h index 1a9dcdd376..88351a09ce 100644 --- a/lib/Transforms/InstCombine/InstCombine.h +++ b/lib/Transforms/InstCombine/InstCombine.h @@ -98,7 +98,7 @@ public: BuilderTy *Builder; static char ID; // Pass identification, replacement for typeid - InstCombiner() : FunctionPass(ID), DL(0), Builder(0) { + InstCombiner() : FunctionPass(ID), DL(nullptr), Builder(nullptr) { MinimizeSize = false; initializeInstCombinerPass(*PassRegistry::getPassRegistry()); } @@ -158,7 +158,7 @@ public: Constant *RHSC); Instruction *FoldCmpLoadFromIndexedGlobal(GetElementPtrInst *GEP, GlobalVariable *GV, CmpInst &ICI, - ConstantInt *AndCst = 0); + ConstantInt *AndCst = nullptr); Instruction *visitFCmpInst(FCmpInst &I); Instruction *visitICmpInst(ICmpInst &I); Instruction *visitICmpInstWithCastAndCast(ICmpInst &ICI); @@ -218,7 +218,7 @@ public: Instruction *visitLandingPadInst(LandingPadInst &LI); // visitInstruction - Specify what to return for unhandled instructions... - Instruction *visitInstruction(Instruction &I) { return 0; } + Instruction *visitInstruction(Instruction &I) { return nullptr; } private: bool ShouldChangeType(Type *From, Type *To) const; @@ -253,7 +253,7 @@ public: // in the program. Add the new instruction to the worklist. // Instruction *InsertNewInstBefore(Instruction *New, Instruction &Old) { - assert(New && New->getParent() == 0 && + assert(New && !New->getParent() && "New instruction already inserted into a basic block!"); BasicBlock *BB = Old.getParent(); BB->getInstList().insert(&Old, New); // Insert inst @@ -308,7 +308,7 @@ public: Worklist.Remove(&I); I.eraseFromParent(); MadeIRChange = true; - return 0; // Don't do anything with FI + return nullptr; // Don't do anything with FI } void ComputeMaskedBits(Value *V, APInt &KnownZero, diff --git a/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp b/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp index 9f09584b45..341673d22f 100644 --- a/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp +++ b/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp @@ -102,7 +102,7 @@ bool InstCombiner::SimplifyDemandedBits(Use &U, APInt DemandedMask, Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask, APInt &KnownZero, APInt &KnownOne, unsigned Depth) { - assert(V != 0 && "Null pointer of Value???"); + assert(V != nullptr && "Null pointer of Value???"); assert(Depth <= 6 && "Limit Search Depth"); uint32_t BitWidth = DemandedMask.getBitWidth(); Type *VTy = V->getType(); diff --git a/lib/Transforms/InstCombine/InstCombineVectorOps.cpp b/lib/Transforms/InstCombine/InstCombineVectorOps.cpp index b63c3a6b26..aa81e8c972 100644 --- a/lib/Transforms/InstCombine/InstCombineVectorOps.cpp +++ b/lib/Transforms/InstCombine/InstCombineVectorOps.cpp @@ -445,7 +445,7 @@ static ShuffleOps CollectShuffleElements(Value *V, if (EI->getOperand(0) == PermittedRHS || PermittedRHS == nullptr) { Value *RHS = EI->getOperand(0); ShuffleOps LR = CollectShuffleElements(VecOp, Mask, RHS); - assert(LR.second == 0 || LR.second == RHS); + assert(LR.second == nullptr || LR.second == RHS); if (LR.first->getType() != RHS->getType()) { // We tried our best, but we can't find anything compatible with RHS diff --git a/lib/Transforms/InstCombine/InstCombineWorklist.h b/lib/Transforms/InstCombine/InstCombineWorklist.h index 53fde9d556..1ab7db3a98 100644 --- a/lib/Transforms/InstCombine/InstCombineWorklist.h +++ b/lib/Transforms/InstCombine/InstCombineWorklist.h @@ -69,7 +69,7 @@ public: if (It == WorklistMap.end()) return; // Not in worklist. // Don't bother moving everything down, just null out the slot. - Worklist[It->second] = 0; + Worklist[It->second] = nullptr; WorklistMap.erase(It); } diff --git a/lib/Transforms/Instrumentation/MemorySanitizer.cpp b/lib/Transforms/Instrumentation/MemorySanitizer.cpp index 98d372b3f0..d8e65102b5 100644 --- a/lib/Transforms/Instrumentation/MemorySanitizer.cpp +++ b/lib/Transforms/Instrumentation/MemorySanitizer.cpp @@ -2147,7 +2147,7 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> { IRB.CreateStore(getOrigin(A), getOriginPtrForArgument(A, IRB, ArgOffset)); (void)Store; - assert(Size != 0 && Store != 0); + assert(Size != 0 && Store != nullptr); DEBUG(dbgs() << " Param:" << *Store << "\n"); ArgOffset += DataLayout::RoundUpAlignment(Size, 8); } diff --git a/lib/Transforms/ObjCARC/ARCRuntimeEntryPoints.h b/lib/Transforms/ObjCARC/ARCRuntimeEntryPoints.h index 4eac39dedd..4098428630 100644 --- a/lib/Transforms/ObjCARC/ARCRuntimeEntryPoints.h +++ b/lib/Transforms/ObjCARC/ARCRuntimeEntryPoints.h @@ -43,34 +43,34 @@ public: EPT_RetainAutoreleaseRV }; - ARCRuntimeEntryPoints() : TheModule(0), - AutoreleaseRV(0), - Release(0), - Retain(0), - RetainBlock(0), - Autorelease(0), - StoreStrong(0), - RetainRV(0), - RetainAutorelease(0), - RetainAutoreleaseRV(0) { } + ARCRuntimeEntryPoints() : TheModule(nullptr), + AutoreleaseRV(nullptr), + Release(nullptr), + Retain(nullptr), + RetainBlock(nullptr), + Autorelease(nullptr), + StoreStrong(nullptr), + RetainRV(nullptr), + RetainAutorelease(nullptr), + RetainAutoreleaseRV(nullptr) { } ~ARCRuntimeEntryPoints() { } void Initialize(Module *M) { TheModule = M; - AutoreleaseRV = 0; - Release = 0; - Retain = 0; - RetainBlock = 0; - Autorelease = 0; - StoreStrong = 0; - RetainRV = 0; - RetainAutorelease = 0; - RetainAutoreleaseRV = 0; + AutoreleaseRV = nullptr; + Release = nullptr; + Retain = nullptr; + RetainBlock = nullptr; + Autorelease = nullptr; + StoreStrong = nullptr; + RetainRV = nullptr; + RetainAutorelease = nullptr; + RetainAutoreleaseRV = nullptr; } Constant *get(const EntryPointType entry) { - assert(TheModule != 0 && "Not initialized."); + assert(TheModule != nullptr && "Not initialized."); switch (entry) { case EPT_AutoreleaseRV: diff --git a/lib/Transforms/ObjCARC/ObjCARCOpts.cpp b/lib/Transforms/ObjCARC/ObjCARCOpts.cpp index f29cb2d91a..dd4dd50f0b 100644 --- a/lib/Transforms/ObjCARC/ObjCARCOpts.cpp +++ b/lib/Transforms/ObjCARC/ObjCARCOpts.cpp @@ -819,7 +819,7 @@ ARCAnnotationTargetIdentifier("objc-arc-annotation-target-identifier", /// arc annotation processor tool. If the function is an static MDString *AppendMDNodeToSourcePtr(unsigned NodeId, Value *Ptr) { - MDString *Hash = 0; + MDString *Hash = nullptr; // If pointer is a result of an instruction and it does not have a source // MDNode it, attach a new MDNode onto it. If pointer is a result of @@ -881,7 +881,7 @@ static void AppendMDNodeToInstForPtr(unsigned NodeId, MDString *PtrSourceMDNodeID, Sequence OldSeq, Sequence NewSeq) { - MDNode *Node = 0; + MDNode *Node = nullptr; Value *tmp[3] = {PtrSourceMDNodeID, SequenceToMDString(Inst->getContext(), OldSeq), @@ -917,7 +917,7 @@ static void GenerateARCBBEntranceAnnotation(const char *Name, BasicBlock *BB, Value *PtrName; StringRef Tmp = Ptr->getName(); - if (0 == (PtrName = M->getGlobalVariable(Tmp, true))) { + if (nullptr == (PtrName = M->getGlobalVariable(Tmp, true))) { Value *ActualPtrName = Builder.CreateGlobalStringPtr(Tmp, Tmp + "_STR"); PtrName = new GlobalVariable(*M, I8X, true, GlobalVariable::InternalLinkage, @@ -926,7 +926,7 @@ static void GenerateARCBBEntranceAnnotation(const char *Name, BasicBlock *BB, Value *S; std::string SeqStr = SequenceToString(Seq); - if (0 == (S = M->getGlobalVariable(SeqStr, true))) { + if (nullptr == (S = M->getGlobalVariable(SeqStr, true))) { Value *ActualPtrName = Builder.CreateGlobalStringPtr(SeqStr, SeqStr + "_STR"); S = new GlobalVariable(*M, I8X, true, GlobalVariable::InternalLinkage, @@ -960,7 +960,7 @@ static void GenerateARCBBTerminatorAnnotation(const char *Name, BasicBlock *BB, Value *PtrName; StringRef Tmp = Ptr->getName(); - if (0 == (PtrName = M->getGlobalVariable(Tmp, true))) { + if (nullptr == (PtrName = M->getGlobalVariable(Tmp, true))) { Value *ActualPtrName = Builder.CreateGlobalStringPtr(Tmp, Tmp + "_STR"); PtrName = new GlobalVariable(*M, I8X, true, GlobalVariable::InternalLinkage, @@ -969,7 +969,7 @@ static void GenerateARCBBTerminatorAnnotation(const char *Name, BasicBlock *BB, Value *S; std::string SeqStr = SequenceToString(Seq); - if (0 == (S = M->getGlobalVariable(SeqStr, true))) { + if (nullptr == (S = M->getGlobalVariable(SeqStr, true))) { Value *ActualPtrName = Builder.CreateGlobalStringPtr(SeqStr, SeqStr + "_STR"); S = new GlobalVariable(*M, I8X, true, GlobalVariable::InternalLinkage, diff --git a/lib/Transforms/Scalar/GVN.cpp b/lib/Transforms/Scalar/GVN.cpp index e7156fd6b6..06ee1f07f1 100644 --- a/lib/Transforms/Scalar/GVN.cpp +++ b/lib/Transforms/Scalar/GVN.cpp @@ -214,7 +214,7 @@ Expression ValueTable::create_cmp_expression(unsigned Opcode, } Expression ValueTable::create_extractvalue_expression(ExtractValueInst *EI) { - assert(EI != 0 && "Not an ExtractValueInst?"); + assert(EI && "Not an ExtractValueInst?"); Expression e; e.type = EI->getType(); e.opcode = 0; diff --git a/lib/Transforms/Scalar/LICM.cpp b/lib/Transforms/Scalar/LICM.cpp index 4b7303c4ef..0a8d16f49e 100644 --- a/lib/Transforms/Scalar/LICM.cpp +++ b/lib/Transforms/Scalar/LICM.cpp @@ -335,7 +335,7 @@ bool LICM::runOnLoop(Loop *L, LPPassManager &LPM) { /// iteration. /// void LICM::SinkRegion(DomTreeNode *N) { - assert(N != 0 && "Null dominator tree node?"); + assert(N != nullptr && "Null dominator tree node?"); BasicBlock *BB = N->getBlock(); // If this subregion is not in the top level loop at all, exit. @@ -382,7 +382,7 @@ void LICM::SinkRegion(DomTreeNode *N) { /// before uses, allowing us to hoist a loop body in one pass without iteration. /// void LICM::HoistRegion(DomTreeNode *N) { - assert(N != 0 && "Null dominator tree node?"); + assert(N != nullptr && "Null dominator tree node?"); BasicBlock *BB = N->getBlock(); // If this subregion is not in the top level loop at all, exit. diff --git a/lib/Transforms/Scalar/SCCP.cpp b/lib/Transforms/Scalar/SCCP.cpp index c4ce074ded..feeb23136e 100644 --- a/lib/Transforms/Scalar/SCCP.cpp +++ b/lib/Transforms/Scalar/SCCP.cpp @@ -627,7 +627,7 @@ bool SCCPSolver::isEdgeFeasible(BasicBlock *From, BasicBlock *To) { #ifndef NDEBUG dbgs() << "Unknown terminator instruction: " << *TI << '\n'; #endif - llvm_unreachable(0); + llvm_unreachable(nullptr); } // visit Implementations - Something changed in this instruction, either an diff --git a/lib/Transforms/Utils/BasicBlockUtils.cpp b/lib/Transforms/Utils/BasicBlockUtils.cpp index dbe4897213..20681a93ff 100644 --- a/lib/Transforms/Utils/BasicBlockUtils.cpp +++ b/lib/Transforms/Utils/BasicBlockUtils.cpp @@ -217,7 +217,7 @@ void llvm::ReplaceInstWithValue(BasicBlock::InstListType &BIL, /// void llvm::ReplaceInstWithInst(BasicBlock::InstListType &BIL, BasicBlock::iterator &BI, Instruction *I) { - assert(I->getParent() == 0 && + assert(I->getParent() == nullptr && "ReplaceInstWithInst: Instruction already inserted into basic block!"); // Insert the new instruction into the basic block... diff --git a/lib/Transforms/Utils/LoopUnrollRuntime.cpp b/lib/Transforms/Utils/LoopUnrollRuntime.cpp index d1ea2d6be6..5bef091a49 100644 --- a/lib/Transforms/Utils/LoopUnrollRuntime.cpp +++ b/lib/Transforms/Utils/LoopUnrollRuntime.cpp @@ -59,7 +59,7 @@ static void ConnectProlog(Loop *L, Value *TripCount, unsigned Count, BasicBlock *OrigPH, BasicBlock *NewPH, ValueToValueMapTy &LVMap, Pass *P) { BasicBlock *Latch = L->getLoopLatch(); - assert(Latch != 0 && "Loop must have a latch"); + assert(Latch && "Loop must have a latch"); // Create a PHI node for each outgoing value from the original loop // (which means it is an outgoing value from the prolog code too). @@ -111,7 +111,7 @@ static void ConnectProlog(Loop *L, Value *TripCount, unsigned Count, new ICmpInst(InsertPt, ICmpInst::ICMP_ULT, TripCount, ConstantInt::get(TripCount->getType(), Count)); BasicBlock *Exit = L->getUniqueExitBlock(); - assert(Exit != 0 && "Loop must have a single exit block only"); + assert(Exit && "Loop must have a single exit block only"); // Split the exit to maintain loop canonicalization guarantees SmallVector<BasicBlock*, 4> Preds(pred_begin(Exit), pred_end(Exit)); if (!Exit->isLandingPad()) { diff --git a/lib/Transforms/Utils/SSAUpdater.cpp b/lib/Transforms/Utils/SSAUpdater.cpp index 44dc7b7ec8..3fcb789bd8 100644 --- a/lib/Transforms/Utils/SSAUpdater.cpp +++ b/lib/Transforms/Utils/SSAUpdater.cpp @@ -55,7 +55,7 @@ bool SSAUpdater::HasValueForBlock(BasicBlock *BB) const { } void SSAUpdater::AddAvailableValue(BasicBlock *BB, Value *V) { - assert(ProtoType != 0 && "Need to initialize SSAUpdater"); + assert(ProtoType && "Need to initialize SSAUpdater"); assert(ProtoType == V->getType() && "All rewritten values must have the same type"); getAvailableVals(AV)[BB] = V; diff --git a/lib/Transforms/Vectorize/SLPVectorizer.cpp b/lib/Transforms/Vectorize/SLPVectorizer.cpp index b15bf9c207..21a727bfb3 100644 --- a/lib/Transforms/Vectorize/SLPVectorizer.cpp +++ b/lib/Transforms/Vectorize/SLPVectorizer.cpp @@ -2486,7 +2486,7 @@ public: } // Update users. if (ReductionPHI) { - assert(ReductionRoot != NULL && "Need a reduction operation"); + assert(ReductionRoot && "Need a reduction operation"); ReductionRoot->setOperand(0, VectorizedTree); ReductionRoot->setOperand(1, ReductionPHI); } else diff --git a/tools/bugpoint/BugDriver.cpp b/tools/bugpoint/BugDriver.cpp index e4f66ed5b3..cecccbe0f0 100644 --- a/tools/bugpoint/BugDriver.cpp +++ b/tools/bugpoint/BugDriver.cpp @@ -116,7 +116,7 @@ Module *llvm::ParseInputFile(const std::string &Filename, // parsed), and false on success. // bool BugDriver::addSources(const std::vector<std::string> &Filenames) { - assert(Program == 0 && "Cannot call addSources multiple times!"); + assert(!Program && "Cannot call addSources multiple times!"); assert(!Filenames.empty() && "Must specify at least on input filename!"); // Load the first input file. diff --git a/tools/bugpoint/BugDriver.h b/tools/bugpoint/BugDriver.h index c01bbe557d..3169d293da 100644 --- a/tools/bugpoint/BugDriver.h +++ b/tools/bugpoint/BugDriver.h @@ -202,7 +202,7 @@ public: const std::string &BitcodeFile = "", const std::string &SharedObj = "", bool RemoveBitcode = false, - std::string *Error = 0) const; + std::string *Error = nullptr) const; /// EmitProgressBitcode - This function is used to output M to a file named /// "bugpoint-ID.bc". @@ -244,7 +244,7 @@ public: /// this method will never return null. Module *runPassesOn(Module *M, const std::vector<std::string> &Passes, bool AutoDebugCrashes = false, unsigned NumExtraArgs = 0, - const char * const *ExtraArgs = NULL); + const char * const *ExtraArgs = nullptr); /// runPasses - Run the specified passes on Program, outputting a bitcode /// file and writting the filename into OutputFile if successful. If the @@ -259,7 +259,7 @@ public: const std::vector<std::string> &PassesToRun, std::string &OutputFilename, bool DeleteOutput = false, bool Quiet = false, unsigned NumExtraArgs = 0, - const char * const *ExtraArgs = NULL) const; + const char * const *ExtraArgs = nullptr) const; /// runManyPasses - Take the specified pass list and create different /// combinations of passes to compile the program with. Compile the program with diff --git a/tools/bugpoint/ToolRunner.h b/tools/bugpoint/ToolRunner.h index 38a58356a6..6e7b95c784 100644 --- a/tools/bugpoint/ToolRunner.h +++ b/tools/bugpoint/ToolRunner.h @@ -63,7 +63,7 @@ public: FileType fileType, const std::string &InputFile, const std::string &OutputFile, - std::string *Error = 0, + std::string *Error = nullptr, const std::vector<std::string> &GCCArgs = std::vector<std::string>(), unsigned Timeout = 0, @@ -89,15 +89,17 @@ class AbstractInterpreter { public: static LLC *createLLC(const char *Argv0, std::string &Message, const std::string &GCCBinary, - const std::vector<std::string> *Args = 0, - const std::vector<std::string> *GCCArgs = 0, + const std::vector<std::string> *Args = nullptr, + const std::vector<std::string> *GCCArgs = nullptr, bool UseIntegratedAssembler = false); - static AbstractInterpreter* createLLI(const char *Argv0, std::string &Message, - const std::vector<std::string> *Args=0); + static AbstractInterpreter* + createLLI(const char *Argv0, std::string &Message, + const std::vector<std::string> *Args = nullptr); - static AbstractInterpreter* createJIT(const char *Argv0, std::string &Message, - const std::vector<std::string> *Args=0); + static AbstractInterpreter* + createJIT(const char *Argv0, std::string &Message, + const std::vector<std::string> *Args = nullptr); static AbstractInterpreter* createCustomCompiler(std::string &Message, diff --git a/tools/lli/RemoteMemoryManager.h b/tools/lli/RemoteMemoryManager.h index 11f600f3c7..cf5d7c6e5d 100644 --- a/tools/lli/RemoteMemoryManager.h +++ b/tools/lli/RemoteMemoryManager.h @@ -63,7 +63,7 @@ private: RemoteTarget *Target; public: - RemoteMemoryManager() : Target(NULL) {} + RemoteMemoryManager() : Target(nullptr) {} virtual ~RemoteMemoryManager(); uint8_t *allocateCodeSection(uintptr_t Size, unsigned Alignment, diff --git a/tools/lli/Unix/RPCChannel.inc b/tools/lli/Unix/RPCChannel.inc index 4d245d66c1..6a9ae14b59 100644 --- a/tools/lli/Unix/RPCChannel.inc +++ b/tools/lli/Unix/RPCChannel.inc @@ -60,7 +60,7 @@ bool RPCChannel::createServer() { } // Execute the child process. - char *args[1] = { NULL }; + char *args[1] = { nullptr }; int rc = execv(ChildName.c_str(), args); if (rc != 0) perror("Error executing child process: "); @@ -84,7 +84,7 @@ bool RPCChannel::createClient() { return true; } -void RPCChannel::Wait() { wait(NULL); } +void RPCChannel::Wait() { wait(nullptr); } static bool CheckError(int rc, size_t Size, const char *Desc) { if (rc < 0) { diff --git a/tools/llvm-diff/DifferenceEngine.h b/tools/llvm-diff/DifferenceEngine.h index 73bf6eb6ea..44709685a3 100644 --- a/tools/llvm-diff/DifferenceEngine.h +++ b/tools/llvm-diff/DifferenceEngine.h @@ -59,7 +59,7 @@ namespace llvm { }; DifferenceEngine(Consumer &consumer) - : consumer(consumer), globalValueOracle(0) {} + : consumer(consumer), globalValueOracle(nullptr) {} void diff(Module *L, Module *R); void diff(Function *L, Function *R); diff --git a/tools/llvm-readobj/ARMEHABIPrinter.h b/tools/llvm-readobj/ARMEHABIPrinter.h index 388171dc82..7608cfbbd8 100644 --- a/tools/llvm-readobj/ARMEHABIPrinter.h +++ b/tools/llvm-readobj/ARMEHABIPrinter.h @@ -385,7 +385,7 @@ PrinterContext<ET>::FindExceptionTable(unsigned IndexSectionIndex, } } } - return NULL; + return nullptr; } template <typename ET> |