diff options
| -rw-r--r-- | lib/Target/ARM/ARMFeatures.h | 5 | ||||
| -rw-r--r-- | lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 2 | ||||
| -rw-r--r-- | test/CodeGen/ARM/2013-05-05-IfConvertBug.ll | 21 | ||||
| -rw-r--r-- | test/CodeGen/Thumb2/2011-12-16-T2SizeReduceAssert.ll | 5 |
4 files changed, 26 insertions, 7 deletions
diff --git a/lib/Target/ARM/ARMFeatures.h b/lib/Target/ARM/ARMFeatures.h index dafc4b3a82..2580f7bf7f 100644 --- a/lib/Target/ARM/ARMFeatures.h +++ b/lib/Target/ARM/ARMFeatures.h @@ -19,7 +19,7 @@ namespace llvm { template<typename InstrType> // could be MachineInstr or MCInst -inline bool isV8EligibleForIT(InstrType *Instr, int BLXOperandIndex = 0) { +inline bool isV8EligibleForIT(InstrType *Instr) { switch (Instr->getOpcode()) { default: return false; @@ -70,14 +70,13 @@ inline bool isV8EligibleForIT(InstrType *Instr, int BLXOperandIndex = 0) { return true; // there are some "conditionally deprecated" opcodes case ARM::tADDspr: + case ARM::tBLXr: return Instr->getOperand(2).getReg() != ARM::PC; // ADD PC, SP and BLX PC were always unpredictable, // now on top of it they're deprecated case ARM::tADDrSP: case ARM::tBX: return Instr->getOperand(0).getReg() != ARM::PC; - case ARM::tBLXr: - return Instr->getOperand(BLXOperandIndex).getReg() != ARM::PC; case ARM::tADDhirr: return Instr->getOperand(0).getReg() != ARM::PC && Instr->getOperand(2).getReg() != ARM::PC; diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index dc9a308bb9..216f4aa2d6 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -7956,7 +7956,7 @@ MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, // Only after the instruction is fully processed, we can validate it if (wasInITBlock && hasV8Ops() && isThumb() && - !isV8EligibleForIT(&Inst, 2)) { + !isV8EligibleForIT(&Inst)) { Warning(IDLoc, "deprecated instruction in IT block"); } } diff --git a/test/CodeGen/ARM/2013-05-05-IfConvertBug.ll b/test/CodeGen/ARM/2013-05-05-IfConvertBug.ll index c4f5f54c3a..480d08714b 100644 --- a/test/CodeGen/ARM/2013-05-05-IfConvertBug.ll +++ b/test/CodeGen/ARM/2013-05-05-IfConvertBug.ll @@ -72,6 +72,27 @@ KBBlockZero.exit: ; preds = %bb2.i indirectbr i8* undef, [label %KBBlockZero_return_1, label %KBBlockZero_return_0] } +@foo = global i32 ()* null +define i32 @t4(i32 %x, i32 ()* %p_foo) { +entry: +;CHECK-LABEL: t4: +;CHECK-V8-LABEL: t4: + %cmp = icmp slt i32 %x, 60 + br i1 %cmp, label %if.then, label %if.else + +if.then: ; preds = %entry + %tmp.2 = call i32 %p_foo() + %sub = add nsw i32 %x, -1 + br label %return + +if.else: ; preds = %entry + %sub1 = add nsw i32 %x, -120 + br label %return + +return: ; preds = %if.end5, %if.then4, %if.then + %retval.0 = phi i32 [ %sub, %if.then ], [ %sub1, %if.else ] + ret i32 %retval.0 +} ; If-converter was checking for the wrong predicate subsumes pattern when doing ; nested predicates. diff --git a/test/CodeGen/Thumb2/2011-12-16-T2SizeReduceAssert.ll b/test/CodeGen/Thumb2/2011-12-16-T2SizeReduceAssert.ll index 48d76241d5..ea8d233e79 100644 --- a/test/CodeGen/Thumb2/2011-12-16-T2SizeReduceAssert.ll +++ b/test/CodeGen/Thumb2/2011-12-16-T2SizeReduceAssert.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -mtriple=thumbv7-apple-ios -relocation-model=pic -disable-fp-elim -mcpu=cortex-a8 -; RUN: llc < %s -mtriple=thumbv8-none-linux-gnueabi | FileCheck %s +; RUN: llc < %s -mtriple=thumbv7-apple-ios -relocation-model=pic -disable-fp-elim -mcpu=cortex-a8 +; RUN: llc < %s -mtriple=thumbv8-none-linux-gnueabi %struct.LIST_NODE.0.16 = type { %struct.LIST_NODE.0.16*, i8* } @@ -31,7 +31,6 @@ bb5: ; preds = %bb3, %bb declare void @use(i32) define double @find_max_double(i32 %n, double* nocapture readonly %aa) { entry: -;CHECK-LABEL: find_max_double: br i1 undef, label %for.body, label %for.end for.body: ; preds = %for.body, %entry |