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-rw-r--r--lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp2
-rw-r--r--lib/Target/X86/X86CallingConv.td2
-rw-r--r--lib/Target/X86/X86InstrInfo.cpp1
-rw-r--r--test/MC/X86/avx512-encodings.s98
4 files changed, 100 insertions, 3 deletions
diff --git a/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
index a10cb8ddd5..b4e8b7a67f 100644
--- a/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
+++ b/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
@@ -219,7 +219,7 @@ static bool isCDisp8(uint64_t TSFlags, int Value, int& CValue) {
if (Value & MemObjMask) // Unaligned offset
return false;
- Value /= MemObjSize;
+ Value /= (int)MemObjSize;
bool Ret = (Value == (signed char)Value);
if (Ret)
diff --git a/lib/Target/X86/X86CallingConv.td b/lib/Target/X86/X86CallingConv.td
index f40a42ee9b..1cfd827ace 100644
--- a/lib/Target/X86/X86CallingConv.td
+++ b/lib/Target/X86/X86CallingConv.td
@@ -667,6 +667,6 @@ def CSR_64_Intel_OCL_BI : CalleeSavedRegs<(add CSR_64,
def CSR_64_Intel_OCL_BI_AVX : CalleeSavedRegs<(add CSR_64,
(sequence "YMM%u", 8, 15))>;
-def CSR_64_Intel_OCL_BI_AVX512 : CalleeSavedRegs<(add CSR_64,
+def CSR_64_Intel_OCL_BI_AVX512 : CalleeSavedRegs<(add RBX, RDI, RSI, R14, R15,
(sequence "ZMM%u", 16, 31),
K4, K5, K6, K7)>;
diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp
index 1be723829f..9c688bdc20 100644
--- a/lib/Target/X86/X86InstrInfo.cpp
+++ b/lib/Target/X86/X86InstrInfo.cpp
@@ -3878,6 +3878,7 @@ bool X86InstrInfo::expandPostRAPseudo(MachineBasicBlock::iterator MI) const {
case X86::TEST8ri_NOREX:
MI->setDesc(get(X86::TEST8ri));
return true;
+ case X86::KSET0B:
case X86::KSET0W: return Expand2AddrUndef(MIB, get(X86::KXORWrr));
case X86::KSET1B:
case X86::KSET1W: return Expand2AddrUndef(MIB, get(X86::KXNORWrr));
diff --git a/test/MC/X86/avx512-encodings.s b/test/MC/X86/avx512-encodings.s
index 10c134522e..cc73152531 100644
--- a/test/MC/X86/avx512-encodings.s
+++ b/test/MC/X86/avx512-encodings.s
@@ -1,5 +1,101 @@
// RUN: llvm-mc -triple x86_64-unknown-unknown -mcpu=knl --show-encoding %s | FileCheck %s
+// CHECK: vaddpd -8192(%rdx), %zmm27, %zmm8
+// CHECK: encoding: [0x62,0x71,0xa5,0x40,0x58,0x42,0x80]
+ vaddpd -8192(%rdx), %zmm27, %zmm8
+
+// CHECK: vaddpd -1024(%rdx){1to8}, %zmm27, %zmm8
+// CHECK: encoding: [0x62,0x71,0xa5,0x50,0x58,0x42,0x80]
+ vaddpd -1024(%rdx){1to8}, %zmm27, %zmm8
+
+// CHECK: vaddps -8192(%rdx), %zmm13, %zmm18
+// CHECK: encoding: [0x62,0xe1,0x14,0x48,0x58,0x52,0x80]
+ vaddps -8192(%rdx), %zmm13, %zmm18
+
+// CHECK: vaddps -512(%rdx){1to16}, %zmm13, %zmm18
+// CHECK: encoding: [0x62,0xe1,0x14,0x58,0x58,0x52,0x80]
+ vaddps -512(%rdx){1to16}, %zmm13, %zmm18
+
+// CHECK: vdivpd -8192(%rdx), %zmm6, %zmm18
+// CHECK: encoding: [0x62,0xe1,0xcd,0x48,0x5e,0x52,0x80]
+ vdivpd -8192(%rdx), %zmm6, %zmm18
+
+// CHECK: vdivpd -1024(%rdx){1to8}, %zmm6, %zmm18
+// CHECK: encoding: [0x62,0xe1,0xcd,0x58,0x5e,0x52,0x80]
+ vdivpd -1024(%rdx){1to8}, %zmm6, %zmm18
+
+// CHECK: vdivps -8192(%rdx), %zmm23, %zmm23
+// CHECK: encoding: [0x62,0xe1,0x44,0x40,0x5e,0x7a,0x80]
+ vdivps -8192(%rdx), %zmm23, %zmm23
+
+// CHECK: vdivps -512(%rdx){1to16}, %zmm23, %zmm23
+// CHECK: encoding: [0x62,0xe1,0x44,0x50,0x5e,0x7a,0x80]
+ vdivps -512(%rdx){1to16}, %zmm23, %zmm23
+
+// CHECK: vmaxpd -8192(%rdx), %zmm28, %zmm30
+// CHECK: encoding: [0x62,0x61,0x9d,0x40,0x5f,0x72,0x80]
+ vmaxpd -8192(%rdx), %zmm28, %zmm30
+
+// CHECK: vmaxpd -1024(%rdx){1to8}, %zmm28, %zmm30
+// CHECK: encoding: [0x62,0x61,0x9d,0x50,0x5f,0x72,0x80]
+ vmaxpd -1024(%rdx){1to8}, %zmm28, %zmm30
+
+// CHECK: vmaxps -8192(%rdx), %zmm6, %zmm25
+// CHECK: encoding: [0x62,0x61,0x4c,0x48,0x5f,0x4a,0x80]
+ vmaxps -8192(%rdx), %zmm6, %zmm25
+
+// CHECK: vmaxps -512(%rdx){1to16}, %zmm6, %zmm25
+// CHECK: encoding: [0x62,0x61,0x4c,0x58,0x5f,0x4a,0x80]
+ vmaxps -512(%rdx){1to16}, %zmm6, %zmm25
+
+// CHECK: vminpd -8192(%rdx), %zmm6, %zmm6
+// CHECK: encoding: [0x62,0xf1,0xcd,0x48,0x5d,0x72,0x80]
+ vminpd -8192(%rdx), %zmm6, %zmm6
+
+// CHECK: vminpd -1024(%rdx){1to8}, %zmm6, %zmm6
+// CHECK: encoding: [0x62,0xf1,0xcd,0x58,0x5d,0x72,0x80]
+ vminpd -1024(%rdx){1to8}, %zmm6, %zmm6
+
+// CHECK: vminps -8192(%rdx), %zmm3, %zmm3
+// CHECK: encoding: [0x62,0xf1,0x64,0x48,0x5d,0x5a,0x80]
+ vminps -8192(%rdx), %zmm3, %zmm3
+
+// CHECK: vminps -512(%rdx){1to16}, %zmm3, %zmm3
+// CHECK: encoding: [0x62,0xf1,0x64,0x58,0x5d,0x5a,0x80]
+ vminps -512(%rdx){1to16}, %zmm3, %zmm3
+
+// CHECK: vmulpd -8192(%rdx), %zmm4, %zmm24
+// CHECK: encoding: [0x62,0x61,0xdd,0x48,0x59,0x42,0x80]
+ vmulpd -8192(%rdx), %zmm4, %zmm24
+
+// CHECK: vmulpd -1024(%rdx){1to8}, %zmm4, %zmm24
+// CHECK: encoding: [0x62,0x61,0xdd,0x58,0x59,0x42,0x80]
+ vmulpd -1024(%rdx){1to8}, %zmm4, %zmm24
+
+// CHECK: vmulps -8192(%rdx), %zmm6, %zmm3
+// CHECK: encoding: [0x62,0xf1,0x4c,0x48,0x59,0x5a,0x80]
+ vmulps -8192(%rdx), %zmm6, %zmm3
+
+// CHECK: vmulps -512(%rdx){1to16}, %zmm6, %zmm3
+// CHECK: encoding: [0x62,0xf1,0x4c,0x58,0x59,0x5a,0x80]
+ vmulps -512(%rdx){1to16}, %zmm6, %zmm3
+
+// CHECK: vsubpd -8192(%rdx), %zmm12, %zmm9
+// CHECK: encoding: [0x62,0x71,0x9d,0x48,0x5c,0x4a,0x80]
+ vsubpd -8192(%rdx), %zmm12, %zmm9
+
+// CHECK: vsubpd -1024(%rdx){1to8}, %zmm12, %zmm9
+// CHECK: encoding: [0x62,0x71,0x9d,0x58,0x5c,0x4a,0x80]
+ vsubpd -1024(%rdx){1to8}, %zmm12, %zmm9
+
+// CHECK: vsubps -8192(%rdx), %zmm27, %zmm14
+// CHECK: encoding: [0x62,0x71,0x24,0x40,0x5c,0x72,0x80]
+ vsubps -8192(%rdx), %zmm27, %zmm14
+
+// CHECK: vsubps -512(%rdx){1to16}, %zmm27, %zmm14
+// CHECK: encoding: [0x62,0x71,0x24,0x50,0x5c,0x72,0x80]
+ vsubps -512(%rdx){1to16}, %zmm27, %zmm14
+
// CHECK: vinserti32x4
// CHECK: encoding: [0x62,0xa3,0x55,0x48,0x38,0xcd,0x01]
vinserti32x4 $1, %xmm21, %zmm5, %zmm17
@@ -45,7 +141,7 @@ vpbroadcastd %xmm0, %zmm1 {%k1} {z}
vmovdqu64 %zmm0, %zmm1 {%k3}
// CHECK: vmovd
-// CHECK: encoding: [0x62,0xe1,0x7d,0x08,0x7e,0xb4,0x24,0xac,0xff,0xff,0xff]
+// CHECK: encoding: [0x62,0xe1,0x7d,0x08,0x7e,0x74,0x24,0xeb]
vmovd %xmm22, -84(%rsp)
// CHECK: vextractps
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-30 21:04:05 +0000