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-rw-r--r--lib/Target/X86/X86ISelLowering.cpp3
-rw-r--r--test/CodeGen/X86/cmp.ll11
2 files changed, 13 insertions, 1 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 8800bff87f..e59560ed88 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -9802,7 +9802,8 @@ SDValue X86TargetLowering::EmitTest(SDValue Op, unsigned X86CC, SDLoc dl,
// If we have a constant logical shift that's only used in a comparison
// against zero turn it into an equivalent AND. This allows turning it into
// a TEST instruction later.
- if (isa<ConstantSDNode>(Op->getOperand(1)) && !hasNonFlagsUse(Op)) {
+ if ((X86CC == X86::COND_E || X86CC == X86::COND_NE) &&
+ isa<ConstantSDNode>(Op->getOperand(1)) && !hasNonFlagsUse(Op)) {
EVT VT = Op.getValueType();
unsigned BitWidth = VT.getSizeInBits();
unsigned ShAmt = Op->getConstantOperandVal(1);
diff --git a/test/CodeGen/X86/cmp.ll b/test/CodeGen/X86/cmp.ll
index c52197f9be..cdcdc963ed 100644
--- a/test/CodeGen/X86/cmp.ll
+++ b/test/CodeGen/X86/cmp.ll
@@ -187,3 +187,14 @@ define i32 @test13(i32 %mask, i32 %base, i32 %intra) {
; CHECK: testb $8, %dil
; CHECK: cmovnel
}
+
+define i32 @test14(i32 %mask, i32 %base, i32 %intra) #0 {
+ %s = lshr i32 %mask, 7
+ %tobool = icmp sgt i32 %s, -1
+ %cond = select i1 %tobool, i32 %intra, i32 %base
+ ret i32 %cond
+
+; CHECK-LABEL: test14:
+; CHECK: shrl $7, %edi
+; CHECK-NEXT: cmovnsl %edx, %esi
+}