diff options
Diffstat (limited to 'docs/CodeGenerator.rst')
| -rw-r--r-- | docs/CodeGenerator.rst | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/docs/CodeGenerator.rst b/docs/CodeGenerator.rst index d7d98bc385..58906c2749 100644 --- a/docs/CodeGenerator.rst +++ b/docs/CodeGenerator.rst @@ -172,7 +172,7 @@ architecture. These target descriptions often have a large amount of common information (e.g., an ``add`` instruction is almost identical to a ``sub`` instruction). In order to allow the maximum amount of commonality to be factored out, the LLVM code generator uses the -:doc:`TableGen <TableGenFundamentals>` tool to describe big chunks of the +:doc:`TableGen/index` tool to describe big chunks of the target machine, which allows the use of domain-specific and target-specific abstractions to reduce the amount of repetition. @@ -277,7 +277,7 @@ an associated register class. When the register allocator runs, it replaces virtual registers with a physical register in the set. The target-specific implementations of these classes is auto-generated from a -`TableGen <TableGenFundamentals.html>`_ description of the register file. +:doc:`TableGen/index` description of the register file. .. _TargetInstrInfo: |