diff options
Diffstat (limited to 'include/llvm/IR')
-rw-r--r-- | include/llvm/IR/IRBuilder.h | 11 | ||||
-rw-r--r-- | include/llvm/IR/Instructions.h | 53 |
2 files changed, 53 insertions, 11 deletions
diff --git a/include/llvm/IR/IRBuilder.h b/include/llvm/IR/IRBuilder.h index d28652f125..79ee7b753d 100644 --- a/include/llvm/IR/IRBuilder.h +++ b/include/llvm/IR/IRBuilder.h @@ -934,10 +934,13 @@ public: const Twine &Name = "") { return Insert(new FenceInst(Context, Ordering, SynchScope), Name); } - AtomicCmpXchgInst *CreateAtomicCmpXchg(Value *Ptr, Value *Cmp, Value *New, - AtomicOrdering Ordering, - SynchronizationScope SynchScope = CrossThread) { - return Insert(new AtomicCmpXchgInst(Ptr, Cmp, New, Ordering, SynchScope)); + AtomicCmpXchgInst * + CreateAtomicCmpXchg(Value *Ptr, Value *Cmp, Value *New, + AtomicOrdering SuccessOrdering, + AtomicOrdering FailureOrdering, + SynchronizationScope SynchScope = CrossThread) { + return Insert(new AtomicCmpXchgInst(Ptr, Cmp, New, SuccessOrdering, + FailureOrdering, SynchScope)); } AtomicRMWInst *CreateAtomicRMW(AtomicRMWInst::BinOp Op, Value *Ptr, Value *Val, AtomicOrdering Ordering, diff --git a/include/llvm/IR/Instructions.h b/include/llvm/IR/Instructions.h index e1a3b04720..154dce3217 100644 --- a/include/llvm/IR/Instructions.h +++ b/include/llvm/IR/Instructions.h @@ -463,7 +463,8 @@ private: class AtomicCmpXchgInst : public Instruction { void *operator new(size_t, unsigned) LLVM_DELETED_FUNCTION; void Init(Value *Ptr, Value *Cmp, Value *NewVal, - AtomicOrdering Ordering, SynchronizationScope SynchScope); + AtomicOrdering SuccessOrdering, AtomicOrdering FailureOrdering, + SynchronizationScope SynchScope); protected: AtomicCmpXchgInst *clone_impl() const override; public: @@ -472,10 +473,14 @@ public: return User::operator new(s, 3); } AtomicCmpXchgInst(Value *Ptr, Value *Cmp, Value *NewVal, - AtomicOrdering Ordering, SynchronizationScope SynchScope, + AtomicOrdering SuccessOrdering, + AtomicOrdering FailureOrdering, + SynchronizationScope SynchScope, Instruction *InsertBefore = 0); AtomicCmpXchgInst(Value *Ptr, Value *Cmp, Value *NewVal, - AtomicOrdering Ordering, SynchronizationScope SynchScope, + AtomicOrdering SuccessOrdering, + AtomicOrdering FailureOrdering, + SynchronizationScope SynchScope, BasicBlock *InsertAtEnd); /// isVolatile - Return true if this is a cmpxchg from a volatile memory @@ -496,13 +501,20 @@ public: DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); /// Set the ordering constraint on this cmpxchg. - void setOrdering(AtomicOrdering Ordering) { + void setSuccessOrdering(AtomicOrdering Ordering) { assert(Ordering != NotAtomic && "CmpXchg instructions can only be atomic."); - setInstructionSubclassData((getSubclassDataFromInstruction() & 3) | + setInstructionSubclassData((getSubclassDataFromInstruction() & ~0x1c) | (Ordering << 2)); } + void setFailureOrdering(AtomicOrdering Ordering) { + assert(Ordering != NotAtomic && + "CmpXchg instructions can only be atomic."); + setInstructionSubclassData((getSubclassDataFromInstruction() & ~0xe0) | + (Ordering << 5)); + } + /// Specify whether this cmpxchg is atomic and orders other operations with /// respect to all concurrently executing threads, or only with respect to /// signal handlers executing in the same thread. @@ -512,8 +524,13 @@ public: } /// Returns the ordering constraint on this cmpxchg. - AtomicOrdering getOrdering() const { - return AtomicOrdering(getSubclassDataFromInstruction() >> 2); + AtomicOrdering getSuccessOrdering() const { + return AtomicOrdering((getSubclassDataFromInstruction() >> 2) & 7); + } + + /// Returns the ordering constraint on this cmpxchg. + AtomicOrdering getFailureOrdering() const { + return AtomicOrdering((getSubclassDataFromInstruction() >> 5) & 7); } /// Returns whether this cmpxchg is atomic between threads or only within a @@ -537,6 +554,28 @@ public: return getPointerOperand()->getType()->getPointerAddressSpace(); } + /// \brief Returns the strongest permitted ordering on failure, given the + /// desired ordering on success. + /// + /// If the comparison in a cmpxchg operation fails, there is no atomic store + /// so release semantics cannot be provided. So this function drops explicit + /// Release requests from the AtomicOrdering. A SequentiallyConsistent + /// operation would remain SequentiallyConsistent. + static AtomicOrdering + getStrongestFailureOrdering(AtomicOrdering SuccessOrdering) { + switch (SuccessOrdering) { + default: llvm_unreachable("invalid cmpxchg success ordering"); + case Release: + case Monotonic: + return Monotonic; + case AcquireRelease: + case Acquire: + return Acquire; + case SequentiallyConsistent: + return SequentiallyConsistent; + } + } + // Methods for support type inquiry through isa, cast, and dyn_cast: static inline bool classof(const Instruction *I) { return I->getOpcode() == Instruction::AtomicCmpXchg; |