diff options
Diffstat (limited to 'lib/CodeGen/LLVMTargetMachine.cpp')
| -rw-r--r-- | lib/CodeGen/LLVMTargetMachine.cpp | 45 |
1 files changed, 23 insertions, 22 deletions
diff --git a/lib/CodeGen/LLVMTargetMachine.cpp b/lib/CodeGen/LLVMTargetMachine.cpp index 086104912b..92aeb64c7d 100644 --- a/lib/CodeGen/LLVMTargetMachine.cpp +++ b/lib/CodeGen/LLVMTargetMachine.cpp @@ -55,9 +55,9 @@ FileModel::Model LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM, raw_ostream &Out, CodeGenFileType FileType, - bool Fast) { + unsigned OptLevel) { // Add common CodeGen passes. - if (addCommonCodeGenPasses(PM, Fast)) + if (addCommonCodeGenPasses(PM, OptLevel)) return FileModel::Error; // Fold redundant debug labels. @@ -66,17 +66,17 @@ LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM, if (PrintMachineCode) PM.add(createMachineFunctionPrinterPass(cerr)); - if (addPreEmitPass(PM, Fast) && PrintMachineCode) + if (addPreEmitPass(PM, OptLevel) && PrintMachineCode) PM.add(createMachineFunctionPrinterPass(cerr)); - if (!Fast) + if (OptLevel != 0) PM.add(createLoopAlignerPass()); switch (FileType) { default: break; case TargetMachine::AssemblyFile: - if (addAssemblyEmitter(PM, Fast, getAsmVerbosityDefault(), Out)) + if (addAssemblyEmitter(PM, OptLevel, getAsmVerbosityDefault(), Out)) return FileModel::Error; return FileModel::AsmFile; case TargetMachine::ObjectFile: @@ -94,9 +94,9 @@ LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM, /// finish up adding passes to emit the file, if necessary. bool LLVMTargetMachine::addPassesToEmitFileFinish(PassManagerBase &PM, MachineCodeEmitter *MCE, - bool Fast) { + unsigned OptLevel) { if (MCE) - addSimpleCodeEmitter(PM, Fast, PrintEmittedAsm, *MCE); + addSimpleCodeEmitter(PM, OptLevel, PrintEmittedAsm, *MCE); PM.add(createGCInfoDeleter()); @@ -114,15 +114,15 @@ bool LLVMTargetMachine::addPassesToEmitFileFinish(PassManagerBase &PM, /// bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM, MachineCodeEmitter &MCE, - bool Fast) { + unsigned OptLevel) { // Add common CodeGen passes. - if (addCommonCodeGenPasses(PM, Fast)) + if (addCommonCodeGenPasses(PM, OptLevel)) return true; - if (addPreEmitPass(PM, Fast) && PrintMachineCode) + if (addPreEmitPass(PM, OptLevel) && PrintMachineCode) PM.add(createMachineFunctionPrinterPass(cerr)); - addCodeEmitter(PM, Fast, PrintEmittedAsm, MCE); + addCodeEmitter(PM, OptLevel, PrintEmittedAsm, MCE); PM.add(createGCInfoDeleter()); @@ -135,11 +135,12 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM, /// addCommonCodeGenPasses - Add standard LLVM codegen passes used for /// both emitting to assembly files or machine code output. /// -bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM, bool Fast) { +bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM, + unsigned OptLevel) { // Standard LLVM-Level Passes. // Run loop strength reduction before anything else. - if (!Fast) { + if (OptLevel != 0) { PM.add(createLoopStrengthReducePass(getTargetLowering())); if (PrintLSR) PM.add(createPrintFunctionPass("\n\n*** Code after LSR ***\n", &errs())); @@ -153,7 +154,7 @@ bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM, bool Fast) { // Make sure that no unreachable blocks are instruction selected. PM.add(createUnreachableBlockEliminationPass()); - if (!Fast) + if (OptLevel != 0) PM.add(createCodeGenPreparePass(getTargetLowering())); PM.add(createStackProtectorPass(getTargetLowering())); @@ -167,38 +168,38 @@ bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM, bool Fast) { // Enable FastISel with -fast, but allow that to be overridden. if (EnableFastISelOption == cl::BOU_TRUE || - (Fast && EnableFastISelOption != cl::BOU_FALSE)) + (OptLevel == 0 && EnableFastISelOption != cl::BOU_FALSE)) EnableFastISel = true; // Ask the target for an isel. - if (addInstSelector(PM, Fast)) + if (addInstSelector(PM, OptLevel)) return true; // Print the instruction selected machine code... if (PrintMachineCode) PM.add(createMachineFunctionPrinterPass(cerr)); - if (!Fast) { + if (OptLevel != 0) { PM.add(createMachineLICMPass()); PM.add(createMachineSinkingPass()); } // Run pre-ra passes. - if (addPreRegAlloc(PM, Fast) && PrintMachineCode) + if (addPreRegAlloc(PM, OptLevel) && PrintMachineCode) PM.add(createMachineFunctionPrinterPass(cerr)); // Perform register allocation. PM.add(createRegisterAllocator()); // Perform stack slot coloring. - if (!Fast) + if (OptLevel != 0) PM.add(createStackSlotColoringPass()); if (PrintMachineCode) // Print the register-allocated code PM.add(createMachineFunctionPrinterPass(cerr)); // Run post-ra passes. - if (addPostRegAlloc(PM, Fast) && PrintMachineCode) + if (addPostRegAlloc(PM, OptLevel) && PrintMachineCode) PM.add(createMachineFunctionPrinterPass(cerr)); if (PrintMachineCode) @@ -216,7 +217,7 @@ bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM, bool Fast) { PM.add(createMachineFunctionPrinterPass(cerr)); // Second pass scheduler. - if (!Fast && !DisablePostRAScheduler) { + if (OptLevel != 0 && !DisablePostRAScheduler) { PM.add(createPostRAScheduler()); if (PrintMachineCode) @@ -224,7 +225,7 @@ bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM, bool Fast) { } // Branch folding must be run after regalloc and prolog/epilog insertion. - if (!Fast) + if (OptLevel != 0) PM.add(createBranchFoldingPass(getEnableTailMergeDefault())); if (PrintMachineCode) |