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Diffstat (limited to 'lib/Target/AArch64/AArch64TargetMachine.h')
-rw-r--r-- | lib/Target/AArch64/AArch64TargetMachine.h | 94 |
1 files changed, 94 insertions, 0 deletions
diff --git a/lib/Target/AArch64/AArch64TargetMachine.h b/lib/Target/AArch64/AArch64TargetMachine.h new file mode 100644 index 0000000000..079b19b23b --- /dev/null +++ b/lib/Target/AArch64/AArch64TargetMachine.h @@ -0,0 +1,94 @@ +//==-- AArch64TargetMachine.h - Define TargetMachine for AArch64 -*- C++ -*-==// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file declares the AArch64 specific subclass of TargetMachine. +// +//===----------------------------------------------------------------------===// + +#ifndef AArch64TARGETMACHINE_H +#define AArch64TARGETMACHINE_H + +#include "AArch64InstrInfo.h" +#include "AArch64ISelLowering.h" +#include "AArch64Subtarget.h" +#include "AArch64FrameLowering.h" +#include "AArch64SelectionDAGInfo.h" +#include "llvm/IR/DataLayout.h" +#include "llvm/Target/TargetMachine.h" +#include "llvm/MC/MCStreamer.h" + +namespace llvm { + +class AArch64TargetMachine : public LLVMTargetMachine { +protected: + AArch64Subtarget Subtarget; + +private: + const DataLayout DL; + AArch64InstrInfo InstrInfo; + AArch64TargetLowering TLInfo; + AArch64FrameLowering FrameLowering; + AArch64SelectionDAGInfo TSInfo; + +public: + AArch64TargetMachine(const Target &T, StringRef TT, StringRef CPU, + StringRef FS, const TargetOptions &Options, + Reloc::Model RM, CodeModel::Model CM, + CodeGenOpt::Level OL, bool IsLittleEndian); + + const AArch64Subtarget *getSubtargetImpl() const override { + return &Subtarget; + } + const AArch64TargetLowering *getTargetLowering() const override { + return &TLInfo; + } + const DataLayout *getDataLayout() const override { return &DL; } + const AArch64FrameLowering *getFrameLowering() const override { + return &FrameLowering; + } + const AArch64InstrInfo *getInstrInfo() const override { return &InstrInfo; } + const AArch64RegisterInfo *getRegisterInfo() const override { + return &InstrInfo.getRegisterInfo(); + } + const AArch64SelectionDAGInfo *getSelectionDAGInfo() const override { + return &TSInfo; + } + + // Pass Pipeline Configuration + TargetPassConfig *createPassConfig(PassManagerBase &PM) override; + + /// \brief Register AArch64 analysis passes with a pass manager. + void addAnalysisPasses(PassManagerBase &PM) override; +}; + +// AArch64leTargetMachine - AArch64 little endian target machine. +// +class AArch64leTargetMachine : public AArch64TargetMachine { + virtual void anchor(); +public: + AArch64leTargetMachine(const Target &T, StringRef TT, StringRef CPU, + StringRef FS, const TargetOptions &Options, + Reloc::Model RM, CodeModel::Model CM, + CodeGenOpt::Level OL); +}; + +// AArch64beTargetMachine - AArch64 big endian target machine. +// +class AArch64beTargetMachine : public AArch64TargetMachine { + virtual void anchor(); +public: + AArch64beTargetMachine(const Target &T, StringRef TT, StringRef CPU, + StringRef FS, const TargetOptions &Options, + Reloc::Model RM, CodeModel::Model CM, + CodeGenOpt::Level OL); +}; + +} // end namespace llvm + +#endif |