diff options
Diffstat (limited to 'lib/Target/ARM64/ARM64FrameLowering.cpp')
| -rw-r--r-- | lib/Target/ARM64/ARM64FrameLowering.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/ARM64/ARM64FrameLowering.cpp b/lib/Target/ARM64/ARM64FrameLowering.cpp index 798986ca90..3e2b0cfadf 100644 --- a/lib/Target/ARM64/ARM64FrameLowering.cpp +++ b/lib/Target/ARM64/ARM64FrameLowering.cpp @@ -388,14 +388,14 @@ void ARM64FrameLowering::emitPrologue(MachineFunction &MF) const { } } -static bool isCalleeSavedRegister(unsigned Reg, const uint16_t *CSRegs) { +static bool isCalleeSavedRegister(unsigned Reg, const MCPhysReg *CSRegs) { for (unsigned i = 0; CSRegs[i]; ++i) if (Reg == CSRegs[i]) return true; return false; } -static bool isCSRestore(MachineInstr *MI, const uint16_t *CSRegs) { +static bool isCSRestore(MachineInstr *MI, const MCPhysReg *CSRegs) { if (MI->getOpcode() == ARM64::LDPXpost || MI->getOpcode() == ARM64::LDPDpost || MI->getOpcode() == ARM64::LDPXi || MI->getOpcode() == ARM64::LDPDi) { @@ -424,7 +424,7 @@ void ARM64FrameLowering::emitEpilogue(MachineFunction &MF, unsigned NumRestores = 0; // Move past the restores of the callee-saved registers. MachineBasicBlock::iterator LastPopI = MBBI; - const uint16_t *CSRegs = RegInfo->getCalleeSavedRegs(&MF); + const MCPhysReg *CSRegs = RegInfo->getCalleeSavedRegs(&MF); if (LastPopI != MBB.begin()) { do { ++NumRestores; @@ -708,7 +708,7 @@ void ARM64FrameLowering::processFunctionBeforeCalleeSavedScan( bool ExtraCSSpill = false; bool CanEliminateFrame = true; DEBUG(dbgs() << "*** processFunctionBeforeCalleeSavedScan\nUsed CSRs:"); - const uint16_t *CSRegs = RegInfo->getCalleeSavedRegs(&MF); + const MCPhysReg *CSRegs = RegInfo->getCalleeSavedRegs(&MF); // Check pairs of consecutive callee-saved registers. for (unsigned i = 0; CSRegs[i]; i += 2) { |