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path: root/lib/Target/ARM64/MCTargetDesc/ARM64MCCodeEmitter.cpp
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Diffstat (limited to 'lib/Target/ARM64/MCTargetDesc/ARM64MCCodeEmitter.cpp')
-rw-r--r--lib/Target/ARM64/MCTargetDesc/ARM64MCCodeEmitter.cpp1
1 files changed, 0 insertions, 1 deletions
diff --git a/lib/Target/ARM64/MCTargetDesc/ARM64MCCodeEmitter.cpp b/lib/Target/ARM64/MCTargetDesc/ARM64MCCodeEmitter.cpp
index be831b8cf0..3c6dbc85b1 100644
--- a/lib/Target/ARM64/MCTargetDesc/ARM64MCCodeEmitter.cpp
+++ b/lib/Target/ARM64/MCTargetDesc/ARM64MCCodeEmitter.cpp
@@ -288,7 +288,6 @@ ARM64MCCodeEmitter::getAddSubImmOpValue(const MCInst &MI, unsigned OpIdx,
return MO.getImm() | (ShiftVal == 0 ? 0 : (1 << 12));
assert(MO.isExpr() && "Unable to encode MCOperand!");
const MCExpr *Expr = MO.getExpr();
- assert(ShiftVal == 0 && "shift not allowed on add/sub immediate with fixup");
// Encode the 12 bits of the fixup.
MCFixupKind Kind = MCFixupKind(ARM64::fixup_arm64_add_imm12);