diff options
Diffstat (limited to 'lib/Target/ARM64')
20 files changed, 40 insertions, 23 deletions
diff --git a/lib/Target/ARM64/ARM64AddressTypePromotion.cpp b/lib/Target/ARM64/ARM64AddressTypePromotion.cpp index b3d7b5c754..b34a81081f 100644 --- a/lib/Target/ARM64/ARM64AddressTypePromotion.cpp +++ b/lib/Target/ARM64/ARM64AddressTypePromotion.cpp @@ -29,7 +29,6 @@ // FIXME: This pass may be useful for other targets too. // ===---------------------------------------------------------------------===// -#define DEBUG_TYPE "arm64-type-promotion" #include "ARM64.h" #include "llvm/ADT/DenseMap.h" #include "llvm/ADT/SmallPtrSet.h" @@ -46,6 +45,8 @@ using namespace llvm; +#define DEBUG_TYPE "arm64-type-promotion" + static cl::opt<bool> EnableAddressTypePromotion("arm64-type-promotion", cl::Hidden, cl::desc("Enable the type promotion pass"), diff --git a/lib/Target/ARM64/ARM64AdvSIMDScalarPass.cpp b/lib/Target/ARM64/ARM64AdvSIMDScalarPass.cpp index 83a3883fec..851572485d 100644 --- a/lib/Target/ARM64/ARM64AdvSIMDScalarPass.cpp +++ b/lib/Target/ARM64/ARM64AdvSIMDScalarPass.cpp @@ -33,7 +33,6 @@ // solution. //===----------------------------------------------------------------------===// -#define DEBUG_TYPE "arm64-simd-scalar" #include "ARM64.h" #include "ARM64InstrInfo.h" #include "ARM64RegisterInfo.h" @@ -48,6 +47,8 @@ #include "llvm/Support/raw_ostream.h" using namespace llvm; +#define DEBUG_TYPE "arm64-simd-scalar" + static cl::opt<bool> AdvSIMDScalar("arm64-simd-scalar", cl::desc("enable use of AdvSIMD scalar integer instructions"), diff --git a/lib/Target/ARM64/ARM64AsmPrinter.cpp b/lib/Target/ARM64/ARM64AsmPrinter.cpp index 9ea00c8a93..22ccdf97e3 100644 --- a/lib/Target/ARM64/ARM64AsmPrinter.cpp +++ b/lib/Target/ARM64/ARM64AsmPrinter.cpp @@ -12,7 +12,6 @@ // //===----------------------------------------------------------------------===// -#define DEBUG_TYPE "asm-printer" #include "ARM64.h" #include "ARM64MachineFunctionInfo.h" #include "ARM64MCInstLower.h" @@ -39,6 +38,8 @@ #include "llvm/Support/TargetRegistry.h" using namespace llvm; +#define DEBUG_TYPE "asm-printer" + namespace { class ARM64AsmPrinter : public AsmPrinter { diff --git a/lib/Target/ARM64/ARM64BranchRelaxation.cpp b/lib/Target/ARM64/ARM64BranchRelaxation.cpp index 24311ae6b8..06c6733ee6 100644 --- a/lib/Target/ARM64/ARM64BranchRelaxation.cpp +++ b/lib/Target/ARM64/ARM64BranchRelaxation.cpp @@ -9,7 +9,6 @@ // //===----------------------------------------------------------------------===// -#define DEBUG_TYPE "arm64-branch-relax" #include "ARM64.h" #include "ARM64InstrInfo.h" #include "ARM64MachineFunctionInfo.h" @@ -24,6 +23,8 @@ #include "llvm/Support/CommandLine.h" using namespace llvm; +#define DEBUG_TYPE "arm64-branch-relax" + static cl::opt<bool> BranchRelaxation("arm64-branch-relax", cl::Hidden, cl::init(true), cl::desc("Relax out of range conditional branches")); diff --git a/lib/Target/ARM64/ARM64CollectLOH.cpp b/lib/Target/ARM64/ARM64CollectLOH.cpp index 6e168a8379..abe1b4615d 100644 --- a/lib/Target/ARM64/ARM64CollectLOH.cpp +++ b/lib/Target/ARM64/ARM64CollectLOH.cpp @@ -98,7 +98,6 @@ // - Other ObjectWriters ignore them. //===----------------------------------------------------------------------===// -#define DEBUG_TYPE "arm64-collect-loh" #include "ARM64.h" #include "ARM64InstrInfo.h" #include "ARM64MachineFunctionInfo.h" @@ -123,6 +122,8 @@ #include "llvm/ADT/Statistic.h" using namespace llvm; +#define DEBUG_TYPE "arm64-collect-loh" + static cl::opt<bool> PreCollectRegister("arm64-collect-loh-pre-collect-register", cl::Hidden, cl::desc("Restrict analysis to registers invovled" diff --git a/lib/Target/ARM64/ARM64ConditionalCompares.cpp b/lib/Target/ARM64/ARM64ConditionalCompares.cpp index 759e8b7df4..72848330bd 100644 --- a/lib/Target/ARM64/ARM64ConditionalCompares.cpp +++ b/lib/Target/ARM64/ARM64ConditionalCompares.cpp @@ -17,7 +17,6 @@ // //===----------------------------------------------------------------------===// -#define DEBUG_TYPE "arm64-ccmp" #include "ARM64.h" #include "llvm/ADT/BitVector.h" #include "llvm/ADT/DepthFirstIterator.h" @@ -43,6 +42,8 @@ using namespace llvm; +#define DEBUG_TYPE "arm64-ccmp" + // Absolute maximum number of instructions allowed per speculated block. // This bypasses all other heuristics, so it should be set fairly high. static cl::opt<unsigned> BlockInstrLimit( diff --git a/lib/Target/ARM64/ARM64DeadRegisterDefinitionsPass.cpp b/lib/Target/ARM64/ARM64DeadRegisterDefinitionsPass.cpp index 7d2a97f8e7..eded8bd9e6 100644 --- a/lib/Target/ARM64/ARM64DeadRegisterDefinitionsPass.cpp +++ b/lib/Target/ARM64/ARM64DeadRegisterDefinitionsPass.cpp @@ -11,7 +11,6 @@ // hardware's register renamer. //===----------------------------------------------------------------------===// -#define DEBUG_TYPE "arm64-dead-defs" #include "ARM64.h" #include "ARM64RegisterInfo.h" #include "llvm/ADT/Statistic.h" @@ -22,6 +21,8 @@ #include "llvm/Support/raw_ostream.h" using namespace llvm; +#define DEBUG_TYPE "arm64-dead-defs" + STATISTIC(NumDeadDefsReplaced, "Number of dead definitions replaced"); namespace { diff --git a/lib/Target/ARM64/ARM64FrameLowering.cpp b/lib/Target/ARM64/ARM64FrameLowering.cpp index 3e2b0cfadf..471ec2092d 100644 --- a/lib/Target/ARM64/ARM64FrameLowering.cpp +++ b/lib/Target/ARM64/ARM64FrameLowering.cpp @@ -11,7 +11,6 @@ // //===----------------------------------------------------------------------===// -#define DEBUG_TYPE "frame-info" #include "ARM64FrameLowering.h" #include "ARM64InstrInfo.h" #include "ARM64MachineFunctionInfo.h" @@ -32,6 +31,8 @@ using namespace llvm; +#define DEBUG_TYPE "frame-info" + static cl::opt<bool> EnableRedZone("arm64-redzone", cl::desc("enable use of redzone on ARM64"), cl::init(false), cl::Hidden); diff --git a/lib/Target/ARM64/ARM64ISelDAGToDAG.cpp b/lib/Target/ARM64/ARM64ISelDAGToDAG.cpp index f96249937e..6c4d175b88 100644 --- a/lib/Target/ARM64/ARM64ISelDAGToDAG.cpp +++ b/lib/Target/ARM64/ARM64ISelDAGToDAG.cpp @@ -11,7 +11,6 @@ // //===----------------------------------------------------------------------===// -#define DEBUG_TYPE "arm64-isel" #include "ARM64TargetMachine.h" #include "MCTargetDesc/ARM64AddressingModes.h" #include "llvm/ADT/APSInt.h" @@ -26,6 +25,8 @@ using namespace llvm; +#define DEBUG_TYPE "arm64-isel" + //===--------------------------------------------------------------------===// /// ARM64DAGToDAGISel - ARM64 specific code to select ARM64 machine /// instructions for SelectionDAG operations. diff --git a/lib/Target/ARM64/ARM64ISelLowering.cpp b/lib/Target/ARM64/ARM64ISelLowering.cpp index ee498e65c7..5aa3a3652d 100644 --- a/lib/Target/ARM64/ARM64ISelLowering.cpp +++ b/lib/Target/ARM64/ARM64ISelLowering.cpp @@ -11,8 +11,6 @@ // //===----------------------------------------------------------------------===// -#define DEBUG_TYPE "arm64-lower" - #include "ARM64ISelLowering.h" #include "ARM64PerfectShuffle.h" #include "ARM64Subtarget.h" @@ -36,6 +34,8 @@ #include "llvm/Target/TargetOptions.h" using namespace llvm; +#define DEBUG_TYPE "arm64-lower" + STATISTIC(NumTailCalls, "Number of tail calls"); STATISTIC(NumShiftInserts, "Number of vector shift inserts"); diff --git a/lib/Target/ARM64/ARM64LoadStoreOptimizer.cpp b/lib/Target/ARM64/ARM64LoadStoreOptimizer.cpp index 7233b67f7b..54a642917a 100644 --- a/lib/Target/ARM64/ARM64LoadStoreOptimizer.cpp +++ b/lib/Target/ARM64/ARM64LoadStoreOptimizer.cpp @@ -12,7 +12,6 @@ // //===----------------------------------------------------------------------===// -#define DEBUG_TYPE "arm64-ldst-opt" #include "ARM64InstrInfo.h" #include "MCTargetDesc/ARM64AddressingModes.h" #include "llvm/ADT/BitVector.h" @@ -30,6 +29,8 @@ #include "llvm/ADT/Statistic.h" using namespace llvm; +#define DEBUG_TYPE "arm64-ldst-opt" + /// ARM64AllocLoadStoreOpt - Post-register allocation pass to combine /// load / store instructions to form ldp / stp instructions. diff --git a/lib/Target/ARM64/ARM64PromoteConstant.cpp b/lib/Target/ARM64/ARM64PromoteConstant.cpp index e25b454c68..6fc5750594 100644 --- a/lib/Target/ARM64/ARM64PromoteConstant.cpp +++ b/lib/Target/ARM64/ARM64PromoteConstant.cpp @@ -21,7 +21,6 @@ // FIXME: This pass may be useful for other targets too. //===----------------------------------------------------------------------===// -#define DEBUG_TYPE "arm64-promote-const" #include "ARM64.h" #include "llvm/ADT/Statistic.h" #include "llvm/ADT/DenseMap.h" @@ -42,6 +41,8 @@ using namespace llvm; +#define DEBUG_TYPE "arm64-promote-const" + // Stress testing mode - disable heuristics. static cl::opt<bool> Stress("arm64-stress-promote-const", cl::Hidden, cl::desc("Promote all vector constants")); diff --git a/lib/Target/ARM64/ARM64SelectionDAGInfo.cpp b/lib/Target/ARM64/ARM64SelectionDAGInfo.cpp index 79d507f7da..49c3c0c1bf 100644 --- a/lib/Target/ARM64/ARM64SelectionDAGInfo.cpp +++ b/lib/Target/ARM64/ARM64SelectionDAGInfo.cpp @@ -11,10 +11,11 @@ // //===----------------------------------------------------------------------===// -#define DEBUG_TYPE "arm64-selectiondag-info" #include "ARM64TargetMachine.h" using namespace llvm; +#define DEBUG_TYPE "arm64-selectiondag-info" + ARM64SelectionDAGInfo::ARM64SelectionDAGInfo(const TargetMachine &TM) : TargetSelectionDAGInfo(TM), Subtarget(&TM.getSubtarget<ARM64Subtarget>()) {} diff --git a/lib/Target/ARM64/ARM64StorePairSuppress.cpp b/lib/Target/ARM64/ARM64StorePairSuppress.cpp index fc6a0439c5..15b465da5a 100644 --- a/lib/Target/ARM64/ARM64StorePairSuppress.cpp +++ b/lib/Target/ARM64/ARM64StorePairSuppress.cpp @@ -11,7 +11,6 @@ // store pairs. Later we may do the same for floating point loads. // ===---------------------------------------------------------------------===// -#define DEBUG_TYPE "arm64-stp-suppress" #include "ARM64InstrInfo.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineFunctionPass.h" @@ -24,6 +23,8 @@ using namespace llvm; +#define DEBUG_TYPE "arm64-stp-suppress" + namespace { class ARM64StorePairSuppress : public MachineFunctionPass { const ARM64InstrInfo *TII; diff --git a/lib/Target/ARM64/ARM64TargetTransformInfo.cpp b/lib/Target/ARM64/ARM64TargetTransformInfo.cpp index d5e8213d5b..f411689180 100644 --- a/lib/Target/ARM64/ARM64TargetTransformInfo.cpp +++ b/lib/Target/ARM64/ARM64TargetTransformInfo.cpp @@ -14,7 +14,6 @@ /// //===----------------------------------------------------------------------===// -#define DEBUG_TYPE "arm64tti" #include "ARM64.h" #include "ARM64TargetMachine.h" #include "MCTargetDesc/ARM64AddressingModes.h" @@ -25,6 +24,8 @@ #include <algorithm> using namespace llvm; +#define DEBUG_TYPE "arm64tti" + // Declare the pass initialization routine locally as target-specific passes // don't havve a target-wide initialization entry point, and so we rely on the // pass constructor initialization. diff --git a/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp b/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp index 6979f00d47..a9b6f059ad 100644 --- a/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp +++ b/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp @@ -10,8 +10,6 @@ // //===----------------------------------------------------------------------===// -#define DEBUG_TYPE "arm64-disassembler" - #include "ARM64Disassembler.h" #include "ARM64ExternalSymbolizer.h" #include "ARM64Subtarget.h" @@ -26,6 +24,8 @@ using namespace llvm; +#define DEBUG_TYPE "arm64-disassembler" + // Pull DecodeStatus and its enum values into the global namespace. typedef llvm::MCDisassembler::DecodeStatus DecodeStatus; diff --git a/lib/Target/ARM64/Disassembler/ARM64ExternalSymbolizer.cpp b/lib/Target/ARM64/Disassembler/ARM64ExternalSymbolizer.cpp index 65d4220488..4ce432372a 100644 --- a/lib/Target/ARM64/Disassembler/ARM64ExternalSymbolizer.cpp +++ b/lib/Target/ARM64/Disassembler/ARM64ExternalSymbolizer.cpp @@ -7,8 +7,6 @@ // //===----------------------------------------------------------------------===// -#define DEBUG_TYPE "arm64-disassembler" - #include "ARM64ExternalSymbolizer.h" #include "ARM64Subtarget.h" #include "MCTargetDesc/ARM64AddressingModes.h" @@ -21,6 +19,8 @@ using namespace llvm; +#define DEBUG_TYPE "arm64-disassembler" + static MCSymbolRefExpr::VariantKind getVariant(uint64_t LLVMDisassembler_VariantKind) { switch (LLVMDisassembler_VariantKind) { diff --git a/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp b/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp index 5c2cea9a1f..28af3f0166 100644 --- a/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp +++ b/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp @@ -11,7 +11,6 @@ // //===----------------------------------------------------------------------===// -#define DEBUG_TYPE "asm-printer" #include "ARM64InstPrinter.h" #include "MCTargetDesc/ARM64AddressingModes.h" #include "Utils/ARM64BaseInfo.h" @@ -24,6 +23,8 @@ #include "llvm/Support/raw_ostream.h" using namespace llvm; +#define DEBUG_TYPE "asm-printer" + #define GET_INSTRUCTION_NAME #define PRINT_ALIAS_INSTR #include "ARM64GenAsmWriter.inc" diff --git a/lib/Target/ARM64/MCTargetDesc/ARM64MCCodeEmitter.cpp b/lib/Target/ARM64/MCTargetDesc/ARM64MCCodeEmitter.cpp index f65099e85b..85acdf3191 100644 --- a/lib/Target/ARM64/MCTargetDesc/ARM64MCCodeEmitter.cpp +++ b/lib/Target/ARM64/MCTargetDesc/ARM64MCCodeEmitter.cpp @@ -11,7 +11,6 @@ // //===----------------------------------------------------------------------===// -#define DEBUG_TYPE "mccodeemitter" #include "MCTargetDesc/ARM64AddressingModes.h" #include "MCTargetDesc/ARM64FixupKinds.h" #include "MCTargetDesc/ARM64MCExpr.h" @@ -26,6 +25,8 @@ #include "llvm/Support/raw_ostream.h" using namespace llvm; +#define DEBUG_TYPE "mccodeemitter" + STATISTIC(MCNumEmitted, "Number of MC instructions emitted."); STATISTIC(MCNumFixups, "Number of MC fixups created."); diff --git a/lib/Target/ARM64/MCTargetDesc/ARM64MCExpr.cpp b/lib/Target/ARM64/MCTargetDesc/ARM64MCExpr.cpp index d4ab140da6..6de8a0699a 100644 --- a/lib/Target/ARM64/MCTargetDesc/ARM64MCExpr.cpp +++ b/lib/Target/ARM64/MCTargetDesc/ARM64MCExpr.cpp @@ -12,7 +12,6 @@ // //===----------------------------------------------------------------------===// -#define DEBUG_TYPE "aarch64symbolrefexpr" #include "ARM64MCExpr.h" #include "llvm/MC/MCAssembler.h" #include "llvm/MC/MCContext.h" @@ -24,6 +23,8 @@ using namespace llvm; +#define DEBUG_TYPE "aarch64symbolrefexpr" + const ARM64MCExpr *ARM64MCExpr::Create(const MCExpr *Expr, VariantKind Kind, MCContext &Ctx) { return new (Ctx) ARM64MCExpr(Expr, Kind); |