diff options
Diffstat (limited to 'lib/Target/Alpha/AlphaRegisterInfo.cpp')
| -rw-r--r-- | lib/Target/Alpha/AlphaRegisterInfo.cpp | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/lib/Target/Alpha/AlphaRegisterInfo.cpp b/lib/Target/Alpha/AlphaRegisterInfo.cpp index 8dd8b1769a..717b5388e0 100644 --- a/lib/Target/Alpha/AlphaRegisterInfo.cpp +++ b/lib/Target/Alpha/AlphaRegisterInfo.cpp @@ -117,17 +117,17 @@ MachineInstr *AlphaRegisterInfo::foldMemoryOperand(MachineInstr *MI, case Alpha::CPYST: if (MI->getOperand(1).getReg() == MI->getOperand(2).getReg()) { if (OpNum == 0) { // move -> store - unsigned InReg = MI->getOperand(1).getReg(); - Opc = (Opc == Alpha::BISr) ? Alpha::STQ : - ((Opc == Alpha::CPYSS) ? Alpha::STS : Alpha::STT); - NewMI = BuildMI(TII.get(Opc)).addReg(InReg).addFrameIndex(FrameIndex) - .addReg(Alpha::F31); + unsigned InReg = MI->getOperand(1).getReg(); + Opc = (Opc == Alpha::BISr) ? Alpha::STQ : + ((Opc == Alpha::CPYSS) ? Alpha::STS : Alpha::STT); + NewMI = BuildMI(TII.get(Opc)).addReg(InReg).addFrameIndex(FrameIndex) + .addReg(Alpha::F31); } else { // load -> move - unsigned OutReg = MI->getOperand(0).getReg(); - Opc = (Opc == Alpha::BISr) ? Alpha::LDQ : - ((Opc == Alpha::CPYSS) ? Alpha::LDS : Alpha::LDT); - NewMI = BuildMI(TII.get(Opc), OutReg).addFrameIndex(FrameIndex) - .addReg(Alpha::F31); + unsigned OutReg = MI->getOperand(0).getReg(); + Opc = (Opc == Alpha::BISr) ? Alpha::LDQ : + ((Opc == Alpha::CPYSS) ? Alpha::LDS : Alpha::LDT); + NewMI = BuildMI(TII.get(Opc), OutReg).addFrameIndex(FrameIndex) + .addReg(Alpha::F31); } } break; |