diff options
Diffstat (limited to 'lib/Target/CellSPU/SPUInstrInfo.cpp')
| -rw-r--r-- | lib/Target/CellSPU/SPUInstrInfo.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/CellSPU/SPUInstrInfo.cpp b/lib/Target/CellSPU/SPUInstrInfo.cpp index 86825c8186..423da3b4db 100644 --- a/lib/Target/CellSPU/SPUInstrInfo.cpp +++ b/lib/Target/CellSPU/SPUInstrInfo.cpp @@ -262,7 +262,7 @@ bool SPUInstrInfo::copyRegToReg(MachineBasicBlock &MBB, // we instruction select bitconvert i64 -> f64 as a noop for example, so our // types have no specific meaning. - DebugLoc DL = DebugLoc::getUnknownLoc(); + DebugLoc DL; if (MI != MBB.end()) DL = MI->getDebugLoc(); if (DestRC == SPU::R8CRegisterClass) { @@ -317,7 +317,7 @@ SPUInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, llvm_unreachable("Unknown regclass!"); } - DebugLoc DL = DebugLoc::getUnknownLoc(); + DebugLoc DL; if (MI != MBB.end()) DL = MI->getDebugLoc(); addFrameReference(BuildMI(MBB, MI, DL, get(opc)) .addReg(SrcReg, getKillRegState(isKill)), FrameIdx); @@ -351,7 +351,7 @@ SPUInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, llvm_unreachable("Unknown regclass in loadRegFromStackSlot!"); } - DebugLoc DL = DebugLoc::getUnknownLoc(); + DebugLoc DL; if (MI != MBB.end()) DL = MI->getDebugLoc(); addFrameReference(BuildMI(MBB, MI, DL, get(opc), DestReg), FrameIdx); } @@ -553,7 +553,7 @@ SPUInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond) const { // FIXME this should probably have a DebugLoc argument - DebugLoc dl = DebugLoc::getUnknownLoc(); + DebugLoc dl; // Shouldn't be a fall through. assert(TBB && "InsertBranch must not be told to insert a fallthrough"); assert((Cond.size() == 2 || Cond.size() == 0) && |