diff options
Diffstat (limited to 'lib/Target/Mips/MipsSchedule.td')
| -rw-r--r-- | lib/Target/Mips/MipsSchedule.td | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/lib/Target/Mips/MipsSchedule.td b/lib/Target/Mips/MipsSchedule.td index 00be8ee944..bb7d5f1a88 100644 --- a/lib/Target/Mips/MipsSchedule.td +++ b/lib/Target/Mips/MipsSchedule.td @@ -1,21 +1,21 @@ -//===- MipsSchedule.td - Mips Scheduling Definitions -------*- tablegen -*-===// +//===- MipsSchedule.td - Mips Scheduling Definitions ------*- tablegen -*-===// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // -//===----------------------------------------------------------------------===// +//===---------------------------------------------------------------------===// -//===----------------------------------------------------------------------===// +//===---------------------------------------------------------------------===// // Functional units across Mips chips sets. Based on GCC/Mips backend files. -//===----------------------------------------------------------------------===// +//===---------------------------------------------------------------------===// def ALU : FuncUnit; def IMULDIV : FuncUnit; -//===----------------------------------------------------------------------===// +//===---------------------------------------------------------------------===// // Instruction Itinerary classes used for Mips -//===----------------------------------------------------------------------===// +//===---------------------------------------------------------------------===// def IIAlu : InstrItinClass; def IILoad : InstrItinClass; def IIStore : InstrItinClass; @@ -37,9 +37,9 @@ def IIFsqrtDouble : InstrItinClass; def IIFrecipFsqrtStep : InstrItinClass; def IIPseudo : InstrItinClass; -//===----------------------------------------------------------------------===// +//===---------------------------------------------------------------------===// // Mips Generic instruction itineraries. -//===----------------------------------------------------------------------===// +//===---------------------------------------------------------------------===// def MipsGenericItineraries : ProcessorItineraries<[ALU, IMULDIV], [], [ InstrItinData<IIAlu , [InstrStage<1, [ALU]>]>, InstrItinData<IILoad , [InstrStage<3, [ALU]>]>, |