diff options
Diffstat (limited to 'lib/Target/PowerPC/PPCRegisterInfo.cpp')
-rw-r--r-- | lib/Target/PowerPC/PPCRegisterInfo.cpp | 30 |
1 files changed, 5 insertions, 25 deletions
diff --git a/lib/Target/PowerPC/PPCRegisterInfo.cpp b/lib/Target/PowerPC/PPCRegisterInfo.cpp index 7a74f3d459..00dce5d3cf 100644 --- a/lib/Target/PowerPC/PPCRegisterInfo.cpp +++ b/lib/Target/PowerPC/PPCRegisterInfo.cpp @@ -459,9 +459,8 @@ PPCRegisterInfo::hasReservedSpillSlot(const MachineFunction &MF, return false; } -// Figure out if the offset in the instruction is shifted right two bits. This -// is true for instructions like "STD", which the machine implicitly adds two -// low zeros to. +// Figure out if the offset in the instruction must be a multiple of 4. +// This is true for instructions like "STD". static bool usesIXAddr(const MachineInstr &MI) { unsigned OpC = MI.getOpcode(); @@ -554,10 +553,7 @@ PPCRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, // Now add the frame object offset to the offset from r1. int Offset = MFI->getObjectOffset(FrameIndex); - if (!isIXAddr) - Offset += MI.getOperand(OffsetOperandNo).getImm(); - else - Offset += MI.getOperand(OffsetOperandNo).getImm() << 2; + Offset += MI.getOperand(OffsetOperandNo).getImm(); // If we're not using a Frame Pointer that has been set to the value of the // SP before having the stack size subtracted from it, then add the stack size @@ -577,8 +573,6 @@ PPCRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, if (OpC == PPC::DBG_VALUE || // DBG_VALUE is always Reg+Imm (!noImmForm && isInt<16>(Offset) && (!isIXAddr || (Offset & 3) == 0))) { - if (isIXAddr) - Offset >>= 2; // The actual encoded value has the low two bits zero. MI.getOperand(OffsetOperandNo).ChangeToImmediate(Offset); return; } @@ -655,11 +649,7 @@ needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const { } unsigned OffsetOperandNo = getOffsetONFromFION(*MI, FIOperandNum); - - if (!usesIXAddr(*MI)) - Offset += MI->getOperand(OffsetOperandNo).getImm(); - else - Offset += MI->getOperand(OffsetOperandNo).getImm() << 2; + Offset += MI->getOperand(OffsetOperandNo).getImm(); // It's the load/store FI references that cause issues, as it can be difficult // to materialize the offset if it won't fit in the literal field. Estimate @@ -739,17 +729,7 @@ PPCRegisterInfo::resolveFrameIndex(MachineBasicBlock::iterator I, MI.getOperand(FIOperandNum).ChangeToRegister(BaseReg, false); unsigned OffsetOperandNo = getOffsetONFromFION(MI, FIOperandNum); - - bool isIXAddr = usesIXAddr(MI); - if (!isIXAddr) - Offset += MI.getOperand(OffsetOperandNo).getImm(); - else - Offset += MI.getOperand(OffsetOperandNo).getImm() << 2; - - // Figure out if the offset in the instruction is shifted right two bits. - if (isIXAddr) - Offset >>= 2; // The actual encoded value has the low two bits zero. - + Offset += MI.getOperand(OffsetOperandNo).getImm(); MI.getOperand(OffsetOperandNo).ChangeToImmediate(Offset); } |