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-rw-r--r--lib/Target/PowerPC/README_ALTIVEC.txt5
1 files changed, 0 insertions, 5 deletions
diff --git a/lib/Target/PowerPC/README_ALTIVEC.txt b/lib/Target/PowerPC/README_ALTIVEC.txt
index 881ba020f4..5aca1f4c3c 100644
--- a/lib/Target/PowerPC/README_ALTIVEC.txt
+++ b/lib/Target/PowerPC/README_ALTIVEC.txt
@@ -112,11 +112,6 @@ be constants. The verifier should enforce this constraint.
//===----------------------------------------------------------------------===//
-We should instcombine the lvx/stvx intrinsics into loads/stores if we know that
-the loaded address is 16-byte aligned.
-
-//===----------------------------------------------------------------------===//
-
Instead of writting a pattern for type-agnostic operations (e.g. gen-zero, load,
store, and, ...) in every supported type, make legalize do the work. We should
have a canonical type that we want operations changed to (e.g. v4i32 for