diff options
Diffstat (limited to 'lib/Target/Sparc/SparcTargetMachine.cpp')
-rw-r--r-- | lib/Target/Sparc/SparcTargetMachine.cpp | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/lib/Target/Sparc/SparcTargetMachine.cpp b/lib/Target/Sparc/SparcTargetMachine.cpp index 218c4bc9bc..c6b4e44d38 100644 --- a/lib/Target/Sparc/SparcTargetMachine.cpp +++ b/lib/Target/Sparc/SparcTargetMachine.cpp @@ -26,8 +26,9 @@ extern "C" void LLVMInitializeSparcTarget() { /// SparcTargetMachine::SparcTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, - Reloc::Model RM, bool is64bit) - : LLVMTargetMachine(T, TT, CPU, FS, RM), + Reloc::Model RM, CodeModel::Model CM, + bool is64bit) + : LLVMTargetMachine(T, TT, CPU, FS, RM, CM), Subtarget(TT, CPU, FS, is64bit), DataLayout(Subtarget.getDataLayout()), TLInfo(*this), TSInfo(*this), InstrInfo(Subtarget), @@ -51,15 +52,15 @@ bool SparcTargetMachine::addPreEmitPass(PassManagerBase &PM, } SparcV8TargetMachine::SparcV8TargetMachine(const Target &T, - StringRef TT, - StringRef CPU, - StringRef FS, Reloc::Model RM) - : SparcTargetMachine(T, TT, CPU, FS, RM, false) { + StringRef TT, StringRef CPU, + StringRef FS, Reloc::Model RM, + CodeModel::Model CM) + : SparcTargetMachine(T, TT, CPU, FS, RM, CM, false) { } SparcV9TargetMachine::SparcV9TargetMachine(const Target &T, - StringRef TT, - StringRef CPU, - StringRef FS, Reloc::Model RM) - : SparcTargetMachine(T, TT, CPU, FS, RM, true) { + StringRef TT, StringRef CPU, + StringRef FS, Reloc::Model RM, + CodeModel::Model CM) + : SparcTargetMachine(T, TT, CPU, FS, RM, CM, true) { } |