diff options
Diffstat (limited to 'lib/Target/SystemZ')
18 files changed, 144 insertions, 161 deletions
diff --git a/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp b/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp index e78b1a2ac7..389b1230ca 100644 --- a/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp +++ b/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp @@ -162,7 +162,7 @@ public: } // Token operands - virtual bool isToken() const LLVM_OVERRIDE { + virtual bool isToken() const override { return Kind == KindToken; } StringRef getToken() const { @@ -171,13 +171,13 @@ public: } // Register operands. - virtual bool isReg() const LLVM_OVERRIDE { + virtual bool isReg() const override { return Kind == KindReg; } bool isReg(RegisterKind RegKind) const { return Kind == KindReg && Reg.Kind == RegKind; } - virtual unsigned getReg() const LLVM_OVERRIDE { + virtual unsigned getReg() const override { assert(Kind == KindReg && "Not a register"); return Reg.Num; } @@ -189,7 +189,7 @@ public: } // Immediate operands. - virtual bool isImm() const LLVM_OVERRIDE { + virtual bool isImm() const override { return Kind == KindImm; } bool isImm(int64_t MinValue, int64_t MaxValue) const { @@ -201,7 +201,7 @@ public: } // Memory operands. - virtual bool isMem() const LLVM_OVERRIDE { + virtual bool isMem() const override { return Kind == KindMem; } bool isMem(RegisterKind RegKind, MemoryKind MemKind) const { @@ -221,9 +221,9 @@ public: } // Override MCParsedAsmOperand. - virtual SMLoc getStartLoc() const LLVM_OVERRIDE { return StartLoc; } - virtual SMLoc getEndLoc() const LLVM_OVERRIDE { return EndLoc; } - virtual void print(raw_ostream &OS) const LLVM_OVERRIDE; + virtual SMLoc getStartLoc() const override { return StartLoc; } + virtual SMLoc getEndLoc() const override { return EndLoc; } + virtual void print(raw_ostream &OS) const override; // Used by the TableGen code to add particular types of operand // to an instruction. @@ -340,18 +340,18 @@ public: } // Override MCTargetAsmParser. - virtual bool ParseDirective(AsmToken DirectiveID) LLVM_OVERRIDE; + virtual bool ParseDirective(AsmToken DirectiveID) override; virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, - SMLoc &EndLoc) LLVM_OVERRIDE; - virtual bool ParseInstruction(ParseInstructionInfo &Info, - StringRef Name, SMLoc NameLoc, - SmallVectorImpl<MCParsedAsmOperand*> &Operands) - LLVM_OVERRIDE; + SMLoc &EndLoc) override; + virtual bool + ParseInstruction(ParseInstructionInfo &Info, + StringRef Name, SMLoc NameLoc, + SmallVectorImpl<MCParsedAsmOperand*> &Operands) override; virtual bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, SmallVectorImpl<MCParsedAsmOperand*> &Operands, MCStreamer &Out, unsigned &ErrorInfo, - bool MatchingInlineAsm) LLVM_OVERRIDE; + bool MatchingInlineAsm) override; // Used by the TableGen code to parse particular operand types. OperandMatchResultTy diff --git a/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp b/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp index fc3c38d2f3..4a7bbef290 100644 --- a/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp +++ b/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp @@ -32,7 +32,7 @@ public: const MemoryObject ®ion, uint64_t address, raw_ostream &vStream, - raw_ostream &cStream) const LLVM_OVERRIDE; + raw_ostream &cStream) const override; }; } // end anonymous namespace diff --git a/lib/Target/SystemZ/InstPrinter/SystemZInstPrinter.h b/lib/Target/SystemZ/InstPrinter/SystemZInstPrinter.h index 734ecf0ff2..6882341439 100644 --- a/lib/Target/SystemZ/InstPrinter/SystemZInstPrinter.h +++ b/lib/Target/SystemZ/InstPrinter/SystemZInstPrinter.h @@ -38,10 +38,9 @@ public: static void printOperand(const MCOperand &MO, raw_ostream &O); // Override MCInstPrinter. - virtual void printRegName(raw_ostream &O, unsigned RegNo) const - LLVM_OVERRIDE; - virtual void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot) - LLVM_OVERRIDE; + virtual void printRegName(raw_ostream &O, unsigned RegNo) const override; + virtual void printInst(const MCInst *MI, raw_ostream &O, + StringRef Annot) override; private: // Print various types of operand. diff --git a/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp b/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp index 1098c911bd..da1838345c 100644 --- a/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp +++ b/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp @@ -43,31 +43,28 @@ public: : OSABI(osABI) {} // Override MCAsmBackend - virtual unsigned getNumFixupKinds() const LLVM_OVERRIDE { + virtual unsigned getNumFixupKinds() const override { return SystemZ::NumTargetFixupKinds; } - virtual const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const - LLVM_OVERRIDE; + virtual const MCFixupKindInfo & + getFixupKindInfo(MCFixupKind Kind) const override; virtual void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize, - uint64_t Value) const LLVM_OVERRIDE; - virtual bool mayNeedRelaxation(const MCInst &Inst) const LLVM_OVERRIDE { + uint64_t Value) const override; + virtual bool mayNeedRelaxation(const MCInst &Inst) const override { return false; } virtual bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, const MCRelaxableFragment *Fragment, - const MCAsmLayout &Layout) const - LLVM_OVERRIDE { + const MCAsmLayout &Layout) const override { return false; } virtual void relaxInstruction(const MCInst &Inst, - MCInst &Res) const LLVM_OVERRIDE { + MCInst &Res) const override { llvm_unreachable("SystemZ does do not have assembler relaxation"); } - virtual bool writeNopData(uint64_t Count, - MCObjectWriter *OW) const LLVM_OVERRIDE; - virtual MCObjectWriter *createObjectWriter(raw_ostream &OS) const - LLVM_OVERRIDE { + virtual bool writeNopData(uint64_t Count, MCObjectWriter *OW) const override; + virtual MCObjectWriter *createObjectWriter(raw_ostream &OS) const override { return createSystemZObjectWriter(OS, OSABI); } }; diff --git a/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.h b/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.h index b9ac92a693..27bbf5c114 100644 --- a/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.h +++ b/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.h @@ -21,8 +21,8 @@ public: explicit SystemZMCAsmInfo(StringRef TT); // Override MCAsmInfo; - virtual const MCSection *getNonexecutableStackSection(MCContext &Ctx) const - LLVM_OVERRIDE; + virtual const MCSection * + getNonexecutableStackSection(MCContext &Ctx) const override; }; } // namespace llvm diff --git a/lib/Target/SystemZ/MCTargetDesc/SystemZMCCodeEmitter.cpp b/lib/Target/SystemZ/MCTargetDesc/SystemZMCCodeEmitter.cpp index 84dc47300c..6e85ddd578 100644 --- a/lib/Target/SystemZ/MCTargetDesc/SystemZMCCodeEmitter.cpp +++ b/lib/Target/SystemZ/MCTargetDesc/SystemZMCCodeEmitter.cpp @@ -36,8 +36,7 @@ public: // OVerride MCCodeEmitter. virtual void EncodeInstruction(const MCInst &MI, raw_ostream &OS, SmallVectorImpl<MCFixup> &Fixups, - const MCSubtargetInfo &STI) const - LLVM_OVERRIDE; + const MCSubtargetInfo &STI) const override; private: // Automatically generated by TableGen. diff --git a/lib/Target/SystemZ/MCTargetDesc/SystemZMCObjectWriter.cpp b/lib/Target/SystemZ/MCTargetDesc/SystemZMCObjectWriter.cpp index 36e3d83d4d..d0c2cfa629 100644 --- a/lib/Target/SystemZ/MCTargetDesc/SystemZMCObjectWriter.cpp +++ b/lib/Target/SystemZ/MCTargetDesc/SystemZMCObjectWriter.cpp @@ -26,12 +26,12 @@ protected: // Override MCELFObjectTargetWriter. virtual unsigned GetRelocType(const MCValue &Target, const MCFixup &Fixup, bool IsPCRel, bool IsRelocWithSymbol, - int64_t Addend) const LLVM_OVERRIDE; + int64_t Addend) const override; virtual const MCSymbol *ExplicitRelSym(const MCAssembler &Asm, const MCValue &Target, const MCFragment &F, const MCFixup &Fixup, - bool IsPCRel) const LLVM_OVERRIDE; + bool IsPCRel) const override; }; } // end anonymouse namespace diff --git a/lib/Target/SystemZ/SystemZAsmPrinter.h b/lib/Target/SystemZ/SystemZAsmPrinter.h index 4b6c51b6f0..bde60374c8 100644 --- a/lib/Target/SystemZ/SystemZAsmPrinter.h +++ b/lib/Target/SystemZ/SystemZAsmPrinter.h @@ -32,20 +32,20 @@ public: } // Override AsmPrinter. - virtual const char *getPassName() const LLVM_OVERRIDE { + virtual const char *getPassName() const override { return "SystemZ Assembly Printer"; } - virtual void EmitInstruction(const MachineInstr *MI) LLVM_OVERRIDE; - virtual void EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) - LLVM_OVERRIDE; + virtual void EmitInstruction(const MachineInstr *MI) override; + virtual void + EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) override; virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, unsigned AsmVariant, const char *ExtraCode, - raw_ostream &OS) LLVM_OVERRIDE; + raw_ostream &OS) override; virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, unsigned AsmVariant, const char *ExtraCode, - raw_ostream &OS) LLVM_OVERRIDE; - virtual void EmitEndOfAsmFile(Module &M) LLVM_OVERRIDE; + raw_ostream &OS) override; + virtual void EmitEndOfAsmFile(Module &M) override; }; } // end namespace llvm diff --git a/lib/Target/SystemZ/SystemZConstantPoolValue.h b/lib/Target/SystemZ/SystemZConstantPoolValue.h index 9927bdb262..60944cc42f 100644 --- a/lib/Target/SystemZ/SystemZConstantPoolValue.h +++ b/lib/Target/SystemZ/SystemZConstantPoolValue.h @@ -39,11 +39,11 @@ public: Create(const GlobalValue *GV, SystemZCP::SystemZCPModifier Modifier); // Override MachineConstantPoolValue. - virtual unsigned getRelocationInfo() const LLVM_OVERRIDE; + virtual unsigned getRelocationInfo() const override; virtual int getExistingMachineCPValue(MachineConstantPool *CP, - unsigned Alignment) LLVM_OVERRIDE; - virtual void addSelectionDAGCSEId(FoldingSetNodeID &ID) LLVM_OVERRIDE; - virtual void print(raw_ostream &O) const LLVM_OVERRIDE; + unsigned Alignment) override; + virtual void addSelectionDAGCSEId(FoldingSetNodeID &ID) override; + virtual void print(raw_ostream &O) const override; // Access SystemZ-specific fields. const GlobalValue *getGlobalValue() const { return GV; } diff --git a/lib/Target/SystemZ/SystemZFrameLowering.h b/lib/Target/SystemZ/SystemZFrameLowering.h index 9b0a1d5f22..601b14a2f0 100644 --- a/lib/Target/SystemZ/SystemZFrameLowering.h +++ b/lib/Target/SystemZ/SystemZFrameLowering.h @@ -30,39 +30,36 @@ public: const SystemZSubtarget &sti); // Override TargetFrameLowering. - virtual bool isFPCloseToIncomingSP() const LLVM_OVERRIDE { return false; } - virtual const SpillSlot *getCalleeSavedSpillSlots(unsigned &NumEntries) const - LLVM_OVERRIDE; + virtual bool isFPCloseToIncomingSP() const override { return false; } + virtual const SpillSlot * + getCalleeSavedSpillSlots(unsigned &NumEntries) const override; virtual void processFunctionBeforeCalleeSavedScan(MachineFunction &MF, - RegScavenger *RS) const LLVM_OVERRIDE; + RegScavenger *RS) const override; virtual bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const std::vector<CalleeSavedInfo> &CSI, const TargetRegisterInfo *TRI) const - LLVM_OVERRIDE; + override; virtual bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBII, const std::vector<CalleeSavedInfo> &CSI, - const TargetRegisterInfo *TRI) const - LLVM_OVERRIDE; + const TargetRegisterInfo *TRI) const override; virtual void processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS) const; - virtual void emitPrologue(MachineFunction &MF) const LLVM_OVERRIDE; + virtual void emitPrologue(MachineFunction &MF) const override; virtual void emitEpilogue(MachineFunction &MF, - MachineBasicBlock &MBB) const LLVM_OVERRIDE; - virtual bool hasFP(const MachineFunction &MF) const LLVM_OVERRIDE; + MachineBasicBlock &MBB) const override; + virtual bool hasFP(const MachineFunction &MF) const override; virtual int getFrameIndexOffset(const MachineFunction &MF, - int FI) const LLVM_OVERRIDE; - virtual bool hasReservedCallFrame(const MachineFunction &MF) const - LLVM_OVERRIDE; + int FI) const override; + virtual bool hasReservedCallFrame(const MachineFunction &MF) const override; virtual void eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, - MachineBasicBlock::iterator MI) const - LLVM_OVERRIDE; + MachineBasicBlock::iterator MI) const override; // Return the number of bytes in the callee-allocated part of the frame. uint64_t getAllocatedStackSize(const MachineFunction &MF) const; diff --git a/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp b/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp index aa4752c2ba..dc92ff69c2 100644 --- a/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp +++ b/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp @@ -318,16 +318,15 @@ public: Subtarget(*TM.getSubtargetImpl()) { } // Override MachineFunctionPass. - virtual const char *getPassName() const LLVM_OVERRIDE { + virtual const char *getPassName() const override { return "SystemZ DAG->DAG Pattern Instruction Selection"; } // Override SelectionDAGISel. - virtual SDNode *Select(SDNode *Node) LLVM_OVERRIDE; - virtual bool SelectInlineAsmMemoryOperand(const SDValue &Op, - char ConstraintCode, - std::vector<SDValue> &OutOps) - LLVM_OVERRIDE; + virtual SDNode *Select(SDNode *Node) override; + virtual bool + SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode, + std::vector<SDValue> &OutOps) override; // Include the pieces autogenerated from the target description. #include "SystemZGenDAGISel.inc" diff --git a/lib/Target/SystemZ/SystemZISelLowering.h b/lib/Target/SystemZ/SystemZISelLowering.h index 13befbca05..b96a424305 100644 --- a/lib/Target/SystemZ/SystemZISelLowering.h +++ b/lib/Target/SystemZ/SystemZISelLowering.h @@ -201,58 +201,57 @@ public: explicit SystemZTargetLowering(SystemZTargetMachine &TM); // Override TargetLowering. - virtual MVT getScalarShiftAmountTy(EVT LHSTy) const LLVM_OVERRIDE { + virtual MVT getScalarShiftAmountTy(EVT LHSTy) const override { return MVT::i32; } - virtual EVT getSetCCResultType(LLVMContext &, EVT) const LLVM_OVERRIDE; - virtual bool isFMAFasterThanFMulAndFAdd(EVT VT) const LLVM_OVERRIDE; - virtual bool isFPImmLegal(const APFloat &Imm, EVT VT) const LLVM_OVERRIDE; - virtual bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const - LLVM_OVERRIDE; - virtual bool allowsUnalignedMemoryAccesses(EVT VT, unsigned AS, - bool *Fast) const LLVM_OVERRIDE; - virtual bool isTruncateFree(Type *, Type *) const LLVM_OVERRIDE; - virtual bool isTruncateFree(EVT, EVT) const LLVM_OVERRIDE; - virtual const char *getTargetNodeName(unsigned Opcode) const LLVM_OVERRIDE; + virtual EVT getSetCCResultType(LLVMContext &, EVT) const override; + virtual bool isFMAFasterThanFMulAndFAdd(EVT VT) const override; + virtual bool isFPImmLegal(const APFloat &Imm, EVT VT) const override; + virtual bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const override; + virtual bool + allowsUnalignedMemoryAccesses(EVT VT, unsigned AS, + bool *Fast) const override; + virtual bool isTruncateFree(Type *, Type *) const override; + virtual bool isTruncateFree(EVT, EVT) const override; + virtual const char *getTargetNodeName(unsigned Opcode) const override; virtual std::pair<unsigned, const TargetRegisterClass *> getRegForInlineAsmConstraint(const std::string &Constraint, - MVT VT) const LLVM_OVERRIDE; + MVT VT) const override; virtual TargetLowering::ConstraintType - getConstraintType(const std::string &Constraint) const LLVM_OVERRIDE; + getConstraintType(const std::string &Constraint) const override; virtual TargetLowering::ConstraintWeight getSingleConstraintMatchWeight(AsmOperandInfo &info, - const char *constraint) const LLVM_OVERRIDE; + const char *constraint) const override; virtual void LowerAsmOperandForConstraint(SDValue Op, std::string &Constraint, std::vector<SDValue> &Ops, - SelectionDAG &DAG) const LLVM_OVERRIDE; + SelectionDAG &DAG) const override; virtual MachineBasicBlock * EmitInstrWithCustomInserter(MachineInstr *MI, - MachineBasicBlock *BB) const LLVM_OVERRIDE; + MachineBasicBlock *BB) const override; virtual SDValue LowerOperation(SDValue Op, - SelectionDAG &DAG) const LLVM_OVERRIDE; - virtual bool allowTruncateForTailCall(Type *, Type *) const LLVM_OVERRIDE; - virtual bool mayBeEmittedAsTailCall(CallInst *CI) const LLVM_OVERRIDE; + SelectionDAG &DAG) const override; + virtual bool allowTruncateForTailCall(Type *, Type *) const override; + virtual bool mayBeEmittedAsTailCall(CallInst *CI) const override; virtual SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL, SelectionDAG &DAG, - SmallVectorImpl<SDValue> &InVals) const LLVM_OVERRIDE; + SmallVectorImpl<SDValue> &InVals) const override; virtual SDValue LowerCall(CallLoweringInfo &CLI, - SmallVectorImpl<SDValue> &InVals) const LLVM_OVERRIDE; + SmallVectorImpl<SDValue> &InVals) const override; virtual SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, - SDLoc DL, SelectionDAG &DAG) const LLVM_OVERRIDE; + SDLoc DL, SelectionDAG &DAG) const override; virtual SDValue prepareVolatileOrAtomicLoad(SDValue Chain, SDLoc DL, - SelectionDAG &DAG) const - LLVM_OVERRIDE; + SelectionDAG &DAG) const override; private: const SystemZSubtarget &Subtarget; diff --git a/lib/Target/SystemZ/SystemZInstrInfo.h b/lib/Target/SystemZ/SystemZInstrInfo.h index be4c8fe2ad..9dc781391a 100644 --- a/lib/Target/SystemZ/SystemZInstrInfo.h +++ b/lib/Target/SystemZ/SystemZInstrInfo.h @@ -134,60 +134,58 @@ public: // Override TargetInstrInfo. virtual unsigned isLoadFromStackSlot(const MachineInstr *MI, - int &FrameIndex) const LLVM_OVERRIDE; + int &FrameIndex) const override; virtual unsigned isStoreToStackSlot(const MachineInstr *MI, - int &FrameIndex) const LLVM_OVERRIDE; + int &FrameIndex) const override; virtual bool isStackSlotCopy(const MachineInstr *MI, int &DestFrameIndex, - int &SrcFrameIndex) const LLVM_OVERRIDE; + int &SrcFrameIndex) const override; virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, - bool AllowModify) const LLVM_OVERRIDE; - virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const LLVM_OVERRIDE; + bool AllowModify) const override; + virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const override; virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, - DebugLoc DL) const LLVM_OVERRIDE; + DebugLoc DL) const override; bool analyzeCompare(const MachineInstr *MI, unsigned &SrcReg, - unsigned &SrcReg2, int &Mask, int &Value) const - LLVM_OVERRIDE; + unsigned &SrcReg2, int &Mask, int &Value) const override; bool optimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, unsigned SrcReg2, int Mask, int Value, - const MachineRegisterInfo *MRI) const LLVM_OVERRIDE; - virtual bool isPredicable(MachineInstr *MI) const LLVM_OVERRIDE; - virtual bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, - unsigned ExtraPredCycles, - const BranchProbability &Probability) const - LLVM_OVERRIDE; - virtual bool isProfitableToIfCvt(MachineBasicBlock &TMBB, - unsigned NumCyclesT, - unsigned ExtraPredCyclesT, - MachineBasicBlock &FMBB, - unsigned NumCyclesF, - unsigned ExtraPredCyclesF, - const BranchProbability &Probability) const - LLVM_OVERRIDE; + const MachineRegisterInfo *MRI) const override; + virtual bool isPredicable(MachineInstr *MI) const override; + virtual bool + isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, + unsigned ExtraPredCycles, + const BranchProbability &Probability) const override; + virtual bool + isProfitableToIfCvt(MachineBasicBlock &TMBB, + unsigned NumCyclesT, + unsigned ExtraPredCyclesT, + MachineBasicBlock &FMBB, + unsigned NumCyclesF, + unsigned ExtraPredCyclesF, + const BranchProbability &Probability) const override; virtual bool PredicateInstruction(MachineInstr *MI, - const SmallVectorImpl<MachineOperand> &Pred) const - LLVM_OVERRIDE; + const SmallVectorImpl<MachineOperand> &Pred) const override; virtual void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, DebugLoc DL, unsigned DestReg, unsigned SrcReg, - bool KillSrc) const LLVM_OVERRIDE; + bool KillSrc) const override; virtual void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, - const TargetRegisterInfo *TRI) const LLVM_OVERRIDE; + const TargetRegisterInfo *TRI) const override; virtual void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, int FrameIdx, const TargetRegisterClass *RC, - const TargetRegisterInfo *TRI) const LLVM_OVERRIDE; + const TargetRegisterInfo *TRI) const override; virtual MachineInstr * convertToThreeAddress(MachineFunction::iterator &MFI, MachineBasicBlock::iterator &MBBI, @@ -201,10 +199,9 @@ public: const SmallVectorImpl<unsigned> &Ops, MachineInstr* LoadMI) const; virtual bool - expandPostRAPseudo(MachineBasicBlock::iterator MBBI) const LLVM_OVERRIDE; + expandPostRAPseudo(MachineBasicBlock::iterator MBBI) const override; virtual bool - ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const - LLVM_OVERRIDE; + ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override; // Return the SystemZRegisterInfo, which this class owns. const SystemZRegisterInfo &getRegisterInfo() const { return RI; } diff --git a/lib/Target/SystemZ/SystemZRegisterInfo.h b/lib/Target/SystemZ/SystemZRegisterInfo.h index 13f45faba0..9c82645fa9 100644 --- a/lib/Target/SystemZ/SystemZRegisterInfo.h +++ b/lib/Target/SystemZ/SystemZRegisterInfo.h @@ -40,27 +40,25 @@ public: SystemZRegisterInfo(SystemZTargetMachine &tm); // Override TargetRegisterInfo.h. - virtual bool requiresRegisterScavenging(const MachineFunction &MF) const - LLVM_OVERRIDE { + virtual bool + requiresRegisterScavenging(const MachineFunction &MF) const override { return true; } - virtual bool requiresFrameIndexScavenging(const MachineFunction &MF) const - LLVM_OVERRIDE { + virtual bool + requiresFrameIndexScavenging(const MachineFunction &MF) const override { return true; } - virtual bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const - LLVM_OVERRIDE { + virtual bool + trackLivenessAfterRegAlloc(const MachineFunction &MF) const override { return true; } - virtual const uint16_t *getCalleeSavedRegs(const MachineFunction *MF = 0) - const LLVM_OVERRIDE; - virtual BitVector getReservedRegs(const MachineFunction &MF) - const LLVM_OVERRIDE; + virtual const uint16_t * + getCalleeSavedRegs(const MachineFunction *MF = 0) const override; + virtual BitVector getReservedRegs(const MachineFunction &MF) const override; virtual void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj, unsigned FIOperandNum, - RegScavenger *RS) const LLVM_OVERRIDE; - virtual unsigned getFrameRegister(const MachineFunction &MF) const - LLVM_OVERRIDE; + RegScavenger *RS) const override; + virtual unsigned getFrameRegister(const MachineFunction &MF) const override; }; } // end namespace llvm diff --git a/lib/Target/SystemZ/SystemZSelectionDAGInfo.h b/lib/Target/SystemZ/SystemZSelectionDAGInfo.h index 281d1e291d..d8e580618f 100644 --- a/lib/Target/SystemZ/SystemZSelectionDAGInfo.h +++ b/lib/Target/SystemZ/SystemZSelectionDAGInfo.h @@ -31,48 +31,47 @@ public: SDValue Size, unsigned Align, bool IsVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, - MachinePointerInfo SrcPtrInfo) const - LLVM_OVERRIDE; + MachinePointerInfo SrcPtrInfo) const override; virtual SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc DL, SDValue Chain, SDValue Dst, SDValue Byte, SDValue Size, unsigned Align, bool IsVolatile, - MachinePointerInfo DstPtrInfo) const LLVM_OVERRIDE; + MachinePointerInfo DstPtrInfo) const override; virtual std::pair<SDValue, SDValue> EmitTargetCodeForMemcmp(SelectionDAG &DAG, SDLoc DL, SDValue Chain, SDValue Src1, SDValue Src2, SDValue Size, MachinePointerInfo Op1PtrInfo, - MachinePointerInfo Op2PtrInfo) const LLVM_OVERRIDE; + MachinePointerInfo Op2PtrInfo) const override; virtual std::pair<SDValue, SDValue> EmitTargetCodeForMemchr(SelectionDAG &DAG, SDLoc DL, SDValue Chain, SDValue Src, SDValue Char, SDValue Length, - MachinePointerInfo SrcPtrInfo) const LLVM_OVERRIDE; + MachinePointerInfo SrcPtrInfo) const override; virtual std::pair<SDValue, SDValue> EmitTargetCodeForStrcpy(SelectionDAG &DAG, SDLoc DL, SDValue Chain, SDValue Dest, SDValue Src, MachinePointerInfo DestPtrInfo, MachinePointerInfo SrcPtrInfo, - bool isStpcpy) const LLVM_OVERRIDE; + bool isStpcpy) const override; virtual std::pair<SDValue, SDValue> EmitTargetCodeForStrcmp(SelectionDAG &DAG, SDLoc DL, SDValue Chain, SDValue Src1, SDValue Src2, MachinePointerInfo Op1PtrInfo, - MachinePointerInfo Op2PtrInfo) const LLVM_OVERRIDE; + MachinePointerInfo Op2PtrInfo) const override; virtual std::pair<SDValue, SDValue> EmitTargetCodeForStrlen(SelectionDAG &DAG, SDLoc DL, SDValue Chain, - SDValue Src, MachinePointerInfo SrcPtrInfo) const - LLVM_OVERRIDE; + SDValue Src, + MachinePointerInfo SrcPtrInfo) const override; virtual std::pair<SDValue, SDValue> EmitTargetCodeForStrnlen(SelectionDAG &DAG, SDLoc DL, SDValue Chain, SDValue Src, SDValue MaxLength, - MachinePointerInfo SrcPtrInfo) const LLVM_OVERRIDE; + MachinePointerInfo SrcPtrInfo) const override; }; } diff --git a/lib/Target/SystemZ/SystemZSubtarget.h b/lib/Target/SystemZ/SystemZSubtarget.h index f7c8f96c04..fbb89efc6a 100644 --- a/lib/Target/SystemZ/SystemZSubtarget.h +++ b/lib/Target/SystemZ/SystemZSubtarget.h @@ -43,7 +43,7 @@ public: const std::string &FS); // This is important for reducing register pressure in vector code. - virtual bool useAA() const LLVM_OVERRIDE { return true; } + virtual bool useAA() const override { return true; } // Automatically generated by tblgen. void ParseSubtargetFeatures(StringRef CPU, StringRef FS); diff --git a/lib/Target/SystemZ/SystemZTargetMachine.cpp b/lib/Target/SystemZ/SystemZTargetMachine.cpp index 769bee51e3..637479be32 100644 --- a/lib/Target/SystemZ/SystemZTargetMachine.cpp +++ b/lib/Target/SystemZ/SystemZTargetMachine.cpp @@ -47,10 +47,10 @@ public: return getTM<SystemZTargetMachine>(); } - virtual void addIRPasses() LLVM_OVERRIDE; - virtual bool addInstSelector() LLVM_OVERRIDE; - virtual bool addPreSched2() LLVM_OVERRIDE; - virtual bool addPreEmitPass() LLVM_OVERRIDE; + virtual void addIRPasses() override; + virtual bool addInstSelector() override; + virtual bool addPreSched2() override; + virtual bool addPreEmitPass() override; }; } // end anonymous namespace diff --git a/lib/Target/SystemZ/SystemZTargetMachine.h b/lib/Target/SystemZ/SystemZTargetMachine.h index b3e56dbbc0..c8b924259a 100644 --- a/lib/Target/SystemZ/SystemZTargetMachine.h +++ b/lib/Target/SystemZ/SystemZTargetMachine.h @@ -42,31 +42,30 @@ public: CodeGenOpt::Level OL); // Override TargetMachine. - virtual const TargetFrameLowering *getFrameLowering() const LLVM_OVERRIDE { + virtual const TargetFrameLowering *getFrameLowering() const override { return &FrameLowering; } - virtual const SystemZInstrInfo *getInstrInfo() const LLVM_OVERRIDE { + virtual const SystemZInstrInfo *getInstrInfo() const override { return &InstrInfo; } - virtual const SystemZSubtarget *getSubtargetImpl() const LLVM_OVERRIDE { + virtual const SystemZSubtarget *getSubtargetImpl() const override { return &Subtarget; } - virtual const DataLayout *getDataLayout() const LLVM_OVERRIDE { + virtual const DataLayout *getDataLayout() const override { return &DL; } - virtual const SystemZRegisterInfo *getRegisterInfo() const LLVM_OVERRIDE { + virtual const SystemZRegisterInfo *getRegisterInfo() const override { return &InstrInfo.getRegisterInfo(); } - virtual const SystemZTargetLowering *getTargetLowering() const LLVM_OVERRIDE { + virtual const SystemZTargetLowering *getTargetLowering() const override { return &TLInfo; } - virtual const TargetSelectionDAGInfo *getSelectionDAGInfo() const - LLVM_OVERRIDE { + virtual const TargetSelectionDAGInfo *getSelectionDAGInfo() const override { return &TSInfo; } // Override LLVMTargetMachine - virtual TargetPassConfig *createPassConfig(PassManagerBase &PM) LLVM_OVERRIDE; + virtual TargetPassConfig *createPassConfig(PassManagerBase &PM) override; }; } // end namespace llvm |