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Diffstat (limited to 'lib/Target/X86/X86ISelDAGToDAG.cpp')
-rw-r--r--lib/Target/X86/X86ISelDAGToDAG.cpp28
1 files changed, 28 insertions, 0 deletions
diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp
index d836c29d6b..88cfe10dfa 100644
--- a/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -204,6 +204,9 @@ namespace {
bool SelectAddr(SDNode *Parent, SDValue N, SDValue &Base,
SDValue &Scale, SDValue &Index, SDValue &Disp,
SDValue &Segment);
+ bool SelectSingleRegAddr(SDNode *Parent, SDValue N, SDValue &Base,
+ SDValue &Scale, SDValue &Index, SDValue &Disp,
+ SDValue &Segment);
bool SelectLEAAddr(SDValue N, SDValue &Base,
SDValue &Scale, SDValue &Index, SDValue &Disp,
SDValue &Segment);
@@ -1319,6 +1322,31 @@ bool X86DAGToDAGISel::SelectAddr(SDNode *Parent, SDValue N, SDValue &Base,
return true;
}
+/// SelectSingleRegAddr - Like SelectAddr, but reject any address that would
+/// require more than one allocatable register.
+///
+/// This is used for a TCRETURNmi64 instruction when used to tail call a
+/// variadic function with 6 arguments: Only %r11 is available from GR64_TC.
+/// The other scratch register, %rax, is needed to pass in the number of vector
+/// registers used in the variadic arguments.
+///
+bool X86DAGToDAGISel::SelectSingleRegAddr(SDNode *Parent, SDValue N,
+ SDValue &Base,
+ SDValue &Scale, SDValue &Index,
+ SDValue &Disp, SDValue &Segment) {
+ if (!SelectAddr(Parent, N, Base, Scale, Index, Disp, Segment))
+ return false;
+ // Anything %RIP relative is fine.
+ if (RegisterSDNode *Reg = dyn_cast<RegisterSDNode>(Base))
+ if (Reg->getReg() == X86::RIP)
+ return true;
+ // Check that the index register is 0.
+ if (RegisterSDNode *Reg = dyn_cast<RegisterSDNode>(Index))
+ if (Reg->getReg() == 0)
+ return true;
+ return false;
+}
+
/// SelectScalarSSELoad - Match a scalar SSE load. In particular, we want to
/// match a load whose top elements are either undef or zeros. The load flavor
/// is derived from the type of N, which is either v4f32 or v2f64.