1 files changed, 0 insertions, 40 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 9ff05a2d11..1580935fb2 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -14415,7 +14415,6 @@ static SDValue PerformCMOVCombine(SDNode *N, SelectionDAG &DAG,
       if (TrueC->getAPIntValue().ult(FalseC->getAPIntValue())) {
         CC = X86::GetOppositeBranchCondition(CC);
         std::swap(TrueC, FalseC);
-        std::swap(TrueOp, FalseOp);
       }
 
       // Optimize C ? 8 : 0 -> zext(setcc(C)) << 3.  Likewise for any pow2/0.
@@ -14498,45 +14497,6 @@ static SDValue PerformCMOVCombine(SDNode *N, SelectionDAG &DAG,
       }
     }
   }
-
-  // Handle these cases:
-  //   (select (x != c), e, c) -> select (x != c), e, x),
-  //   (select (x == c), c, e) -> select (x == c), x, e) 
-  // where the c is an integer constant, and the "select" is the combination 
-  // of CMOV and CMP.
-  //
-  // The rationale for this change is that the conditional-move from a constant
-  // needs two instructions, however, conditional-move from a register needs 
-  // only one instruction.
-  // 
-  // CAVEAT: By replacing a constant with a symbolic value, it may obscure 
-  //  some instruction-combining opportunities. This opt needs to be 
-  //  postponed as late as possible.
-  //
-  if (!DCI.isBeforeLegalize() && !DCI.isBeforeLegalizeOps()) {
-    // the DCI.xxxx conditions are provided to postpone the optimization as 
-    // late as possible.
-
-    ConstantSDNode *CmpAgainst = 0;
-    if ((Cond.getOpcode() == X86ISD::CMP || Cond.getOpcode() == X86ISD::SUB) && 
-        (CmpAgainst = dyn_cast<ConstantSDNode>(Cond.getOperand(1))) && 
-        dyn_cast<ConstantSDNode>(Cond.getOperand(0)) == 0) {
-
-      if (CC == X86::COND_NE && 
-          CmpAgainst == dyn_cast<ConstantSDNode>(FalseOp)) {
-        CC = X86::GetOppositeBranchCondition(CC);
-        std::swap(TrueOp, FalseOp);
-      }
-
-      if (CC == X86::COND_E && 
-          CmpAgainst == dyn_cast<ConstantSDNode>(TrueOp)) {
-        SDValue Ops[] = { FalseOp, Cond.getOperand(0), N->getOperand(2), Cond };
-        return DAG.getNode(X86ISD::CMOV, DL, N->getVTList (), Ops, 
-                           array_lengthof(Ops));
-      }
-    }
-  }
-
   return SDValue();
 }