diff options
Diffstat (limited to 'lib')
105 files changed, 518 insertions, 20 deletions
diff --git a/lib/Analysis/DebugInfo.cpp b/lib/Analysis/DebugInfo.cpp index 1f0053d8cf..50080592a3 100644 --- a/lib/Analysis/DebugInfo.cpp +++ b/lib/Analysis/DebugInfo.cpp @@ -638,6 +638,32 @@ DIArray DICompileUnit::getGlobalVariables() const { } //===----------------------------------------------------------------------===// +// DIDescriptor: vtable anchors for all descriptors. +//===----------------------------------------------------------------------===// + +void DIScope::anchor() { } + +void DICompileUnit::anchor() { } + +void DIFile::anchor() { } + +void DIType::anchor() { } + +void DIBasicType::anchor() { } + +void DIDerivedType::anchor() { } + +void DICompositeType::anchor() { } + +void DISubprogram::anchor() { } + +void DILexicalBlock::anchor() { } + +void DINameSpace::anchor() { } + +void DILexicalBlockFile::anchor() { } + +//===----------------------------------------------------------------------===// // DIDescriptor: dump routines for all descriptors. //===----------------------------------------------------------------------===// diff --git a/lib/Analysis/DominanceFrontier.cpp b/lib/Analysis/DominanceFrontier.cpp index 6de4e1e1d7..1604576ec4 100644 --- a/lib/Analysis/DominanceFrontier.cpp +++ b/lib/Analysis/DominanceFrontier.cpp @@ -35,6 +35,8 @@ namespace { }; } +void DominanceFrontier::anchor() { } + const DominanceFrontier::DomSetType & DominanceFrontier::calculate(const DominatorTree &DT, const DomTreeNode *Node) { diff --git a/lib/CodeGen/AsmPrinter/DIE.cpp b/lib/CodeGen/AsmPrinter/DIE.cpp index 4f2d3e5b79..64e89e666e 100644 --- a/lib/CodeGen/AsmPrinter/DIE.cpp +++ b/lib/CodeGen/AsmPrinter/DIE.cpp @@ -174,6 +174,7 @@ void DIE::dump() { } #endif +void DIEValue::anchor() { } #ifndef NDEBUG void DIEValue::dump() { diff --git a/lib/CodeGen/AsmPrinter/DIE.h b/lib/CodeGen/AsmPrinter/DIE.h index 265446cf23..b4996250c1 100644 --- a/lib/CodeGen/AsmPrinter/DIE.h +++ b/lib/CodeGen/AsmPrinter/DIE.h @@ -195,6 +195,7 @@ namespace llvm { /// DIEValue - A debug information entry value. /// class DIEValue { + virtual void anchor(); public: enum { isInteger, diff --git a/lib/CodeGen/JITCodeEmitter.cpp b/lib/CodeGen/JITCodeEmitter.cpp new file mode 100644 index 0000000000..96a53892f6 --- /dev/null +++ b/lib/CodeGen/JITCodeEmitter.cpp @@ -0,0 +1,14 @@ +//===-- llvm/CodeGen/JITCodeEmitter.cpp - Code emission --------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/CodeGen/JITCodeEmitter.h" + +using namespace llvm; + +void JITCodeEmitter::anchor() { } diff --git a/lib/CodeGen/LexicalScopes.cpp b/lib/CodeGen/LexicalScopes.cpp index a12e1a36d1..f1abcbb1dd 100644 --- a/lib/CodeGen/LexicalScopes.cpp +++ b/lib/CodeGen/LexicalScopes.cpp @@ -311,6 +311,8 @@ bool LexicalScopes::dominates(DebugLoc DL, MachineBasicBlock *MBB) { return Result; } +void LexicalScope::anchor() { } + /// dump - Print data structures. void LexicalScope::dump() const { #ifndef NDEBUG diff --git a/lib/CodeGen/LiveRangeEdit.cpp b/lib/CodeGen/LiveRangeEdit.cpp index a470877e12..08ad0855ef 100644 --- a/lib/CodeGen/LiveRangeEdit.cpp +++ b/lib/CodeGen/LiveRangeEdit.cpp @@ -29,6 +29,8 @@ STATISTIC(NumDCEDeleted, "Number of instructions deleted by DCE"); STATISTIC(NumDCEFoldedLoads, "Number of single use loads folded after DCE"); STATISTIC(NumFracRanges, "Number of live ranges fractured by DCE"); +void LiveRangeEdit::Delegate::anchor() { } + LiveInterval &LiveRangeEdit::createFrom(unsigned OldReg, LiveIntervals &LIS, VirtRegMap &VRM) { diff --git a/lib/CodeGen/LiveRangeEdit.h b/lib/CodeGen/LiveRangeEdit.h index 057d9bb68c..29361ac76a 100644 --- a/lib/CodeGen/LiveRangeEdit.h +++ b/lib/CodeGen/LiveRangeEdit.h @@ -33,7 +33,9 @@ class VirtRegMap; class LiveRangeEdit { public: /// Callback methods for LiveRangeEdit owners. - struct Delegate { + class Delegate { + virtual void anchor(); + public: /// Called immediately before erasing a dead machine instruction. virtual void LRE_WillEraseInstruction(MachineInstr *MI) {} diff --git a/lib/CodeGen/MachineBranchProbabilityInfo.cpp b/lib/CodeGen/MachineBranchProbabilityInfo.cpp index e3cfa9ea5a..dc45e46bb6 100644 --- a/lib/CodeGen/MachineBranchProbabilityInfo.cpp +++ b/lib/CodeGen/MachineBranchProbabilityInfo.cpp @@ -26,6 +26,8 @@ INITIALIZE_PASS_END(MachineBranchProbabilityInfo, "machine-branch-prob", char MachineBranchProbabilityInfo::ID = 0; +void MachineBranchProbabilityInfo::anchor() { } + uint32_t MachineBranchProbabilityInfo:: getSumForBlock(MachineBasicBlock *MBB, uint32_t &Scale) const { // First we compute the sum with 64-bits of precision, ensuring that cannot diff --git a/lib/CodeGen/MachineCodeEmitter.cpp b/lib/CodeGen/MachineCodeEmitter.cpp new file mode 100644 index 0000000000..81b49784c0 --- /dev/null +++ b/lib/CodeGen/MachineCodeEmitter.cpp @@ -0,0 +1,14 @@ +//===-- llvm/CodeGen/MachineCodeEmitter.cpp - Code emission -----*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/CodeGen/MachineCodeEmitter.h" + +using namespace llvm; + +void MachineCodeEmitter::anchor() { } diff --git a/lib/CodeGen/MachineFunction.cpp b/lib/CodeGen/MachineFunction.cpp index 0c89a57fd5..0f9f970b35 100644 --- a/lib/CodeGen/MachineFunction.cpp +++ b/lib/CodeGen/MachineFunction.cpp @@ -619,6 +619,8 @@ void MachineJumpTableInfo::dump() const { print(dbgs()); } // MachineConstantPool implementation //===----------------------------------------------------------------------===// +void MachineConstantPoolValue::anchor() { } + Type *MachineConstantPoolEntry::getType() const { if (isMachineConstantPoolEntry()) return Val.MachineCPVal->getType(); diff --git a/lib/CodeGen/MachinePassRegistry.cpp b/lib/CodeGen/MachinePassRegistry.cpp index 9f4ef12878..58e067bcb9 100644 --- a/lib/CodeGen/MachinePassRegistry.cpp +++ b/lib/CodeGen/MachinePassRegistry.cpp @@ -16,6 +16,7 @@ using namespace llvm; +void MachinePassRegistryListener::anchor() { } /// Add - Adds a function pass to the registration list. /// diff --git a/lib/CodeGen/ScheduleDAG.cpp b/lib/CodeGen/ScheduleDAG.cpp index 1e9b5c89f1..e829668b4c 100644 --- a/lib/CodeGen/ScheduleDAG.cpp +++ b/lib/CodeGen/ScheduleDAG.cpp @@ -31,6 +31,8 @@ static cl::opt<bool> StressSchedOpt( cl::desc("Stress test instruction scheduling")); #endif +void SchedulingPriorityQueue::anchor() { } + ScheduleDAG::ScheduleDAG(MachineFunction &mf) : TM(mf.getTarget()), TII(TM.getInstrInfo()), diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index aa6ef67357..1e7bf667d4 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -262,6 +262,8 @@ void TargetLowering::AdjustInstrPostInstrSelection(MachineInstr *MI, // SelectionDAGISel code //===----------------------------------------------------------------------===// +void SelectionDAGISel::ISelUpdater::anchor() { } + SelectionDAGISel::SelectionDAGISel(const TargetMachine &tm, CodeGenOpt::Level OL) : MachineFunctionPass(ID), TM(tm), TLI(*tm.getTargetLowering()), diff --git a/lib/CodeGen/Spiller.cpp b/lib/CodeGen/Spiller.cpp index 9083804884..09fc83b2a7 100644 --- a/lib/CodeGen/Spiller.cpp +++ b/lib/CodeGen/Spiller.cpp @@ -185,6 +185,8 @@ public: } // end anonymous namespace +void Spiller::anchor() { } + llvm::Spiller* llvm::createSpiller(MachineFunctionPass &pass, MachineFunction &mf, VirtRegMap &vrm) { diff --git a/lib/CodeGen/Spiller.h b/lib/CodeGen/Spiller.h index 41f1727da4..b7d5beaab1 100644 --- a/lib/CodeGen/Spiller.h +++ b/lib/CodeGen/Spiller.h @@ -22,6 +22,7 @@ namespace llvm { /// Implementations are utility classes which insert spill or remat code on /// demand. class Spiller { + virtual void anchor(); public: virtual ~Spiller() = 0; diff --git a/lib/DebugInfo/DWARFContext.cpp b/lib/DebugInfo/DWARFContext.cpp index e1ac398b10..dccadc4ea4 100644 --- a/lib/DebugInfo/DWARFContext.cpp +++ b/lib/DebugInfo/DWARFContext.cpp @@ -165,3 +165,5 @@ DILineInfo DWARFContext::getLineInfoForAddress(uint64_t address) { return DILineInfo(fileName.c_str(), row.Line, row.Column); } + +void DWARFContextInMemory::anchor() { } diff --git a/lib/DebugInfo/DWARFContext.h b/lib/DebugInfo/DWARFContext.h index 746a4639f2..d2e763a87a 100644 --- a/lib/DebugInfo/DWARFContext.h +++ b/lib/DebugInfo/DWARFContext.h @@ -86,6 +86,7 @@ public: /// DWARFContext. It assumes all content is available in memory and stores /// pointers to it. class DWARFContextInMemory : public DWARFContext { + virtual void anchor(); StringRef InfoSection; StringRef AbbrevSection; StringRef ARangeSection; diff --git a/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.cpp b/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.cpp new file mode 100644 index 0000000000..457fe5e3ef --- /dev/null +++ b/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.cpp @@ -0,0 +1,14 @@ +//==-- MCJITMemoryManager.cpp - Definition for the Memory Manager -*-C++ -*-==// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "MCJITMemoryManager.h" + +using namespace llvm; + +void MCJITMemoryManager::anchor() { } diff --git a/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.h b/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.h index 58f9100eef..bc7080d2d3 100644 --- a/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.h +++ b/lib/ExecutionEngine/MCJIT/MCJITMemoryManager.h @@ -21,6 +21,7 @@ namespace llvm { // and the RuntimeDyld interface that maps objects, by name, onto their // matching LLVM IR counterparts in the module(s) being compiled. class MCJITMemoryManager : public RTDyldMemoryManager { + virtual void anchor(); JITMemoryManager *JMM; // FIXME: Multiple modules. diff --git a/lib/MC/MCAsmInfoCOFF.cpp b/lib/MC/MCAsmInfoCOFF.cpp index 6d34801f5c..767ac29dd4 100644 --- a/lib/MC/MCAsmInfoCOFF.cpp +++ b/lib/MC/MCAsmInfoCOFF.cpp @@ -16,6 +16,8 @@ #include "llvm/ADT/SmallVector.h" using namespace llvm; +void MCAsmInfoCOFF::anchor() { } + MCAsmInfoCOFF::MCAsmInfoCOFF() { GlobalPrefix = "_"; COMMDirectiveAlignmentIsInBytes = false; @@ -39,10 +41,14 @@ MCAsmInfoCOFF::MCAsmInfoCOFF() { SupportsDataRegions = false; } +void MCAsmInfoMicrosoft::anchor() { } + MCAsmInfoMicrosoft::MCAsmInfoMicrosoft() { AllowQuotesInName = true; } +void MCAsmInfoGNUCOFF::anchor() { } + MCAsmInfoGNUCOFF::MCAsmInfoGNUCOFF() { } diff --git a/lib/MC/MCAsmInfoDarwin.cpp b/lib/MC/MCAsmInfoDarwin.cpp index 24f1243cfc..c1e26350dc 100644 --- a/lib/MC/MCAsmInfoDarwin.cpp +++ b/lib/MC/MCAsmInfoDarwin.cpp @@ -18,6 +18,8 @@ #include "llvm/MC/MCStreamer.h" using namespace llvm; +void MCAsmInfoDarwin::anchor() { } + MCAsmInfoDarwin::MCAsmInfoDarwin() { // Common settings for all Darwin targets. // Syntax: diff --git a/lib/MC/MCAssembler.cpp b/lib/MC/MCAssembler.cpp index c5bf6b9f87..1cb97ce61f 100644 --- a/lib/MC/MCAssembler.cpp +++ b/lib/MC/MCAssembler.cpp @@ -972,3 +972,13 @@ void MCAssembler::dump() { } OS << "]>\n"; } + +// anchors for MC*Fragment vtables +void MCDataFragment::anchor() { } +void MCInstFragment::anchor() { } +void MCAlignFragment::anchor() { } +void MCFillFragment::anchor() { } +void MCOrgFragment::anchor() { } +void MCLEBFragment::anchor() { } +void MCDwarfLineAddrFragment::anchor() { } +void MCDwarfCallFrameFragment::anchor() { } diff --git a/lib/Object/Archive.cpp b/lib/Object/Archive.cpp index 8bdab16c04..ad1cde0d25 100644 --- a/lib/Object/Archive.cpp +++ b/lib/Object/Archive.cpp @@ -74,6 +74,8 @@ static bool isInternalMember(const ArchiveMemberHeader &amh) { return false; } +void Archive::anchor() { } + Archive::Child Archive::Child::getNext() const { size_t SpaceToSkip = sizeof(ArchiveMemberHeader) + ToHeader(Data.data())->getSize(); diff --git a/lib/Object/ObjectFile.cpp b/lib/Object/ObjectFile.cpp index 69d8ed0e5e..d051c03db3 100644 --- a/lib/Object/ObjectFile.cpp +++ b/lib/Object/ObjectFile.cpp @@ -21,6 +21,8 @@ using namespace llvm; using namespace object; +void ObjectFile::anchor() { } + ObjectFile::ObjectFile(unsigned int Type, MemoryBuffer *source, error_code &ec) : Binary(Type, source) { } diff --git a/lib/Support/IntrusiveRefCntPtr.cpp b/lib/Support/IntrusiveRefCntPtr.cpp new file mode 100644 index 0000000000..a8b45593ae --- /dev/null +++ b/lib/Support/IntrusiveRefCntPtr.cpp @@ -0,0 +1,14 @@ +//== IntrusiveRefCntPtr.cpp - Smart Refcounting Pointer ----------*- C++ -*-==// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/ADT/IntrusiveRefCntPtr.h" + +using namespace llvm; + +void RefCountedBaseVPTR::anchor() { } diff --git a/lib/TableGen/Record.cpp b/lib/TableGen/Record.cpp index 7c2ee228e5..1d6131c692 100644 --- a/lib/TableGen/Record.cpp +++ b/lib/TableGen/Record.cpp @@ -81,6 +81,7 @@ StringRecTy StringRecTy::Shared; CodeRecTy CodeRecTy::Shared; DagRecTy DagRecTy::Shared; +void RecTy::anchor() { } void RecTy::dump() const { print(errs()); } ListRecTy *RecTy::getListTy() { @@ -444,13 +445,18 @@ RecTy *llvm::resolveTypes(RecTy *T1, RecTy *T2) { // Initializer implementations //===----------------------------------------------------------------------===// +void Init::anchor() { } void Init::dump() const { return print(errs()); } +void UnsetInit::anchor() { } + UnsetInit *UnsetInit::get() { static UnsetInit TheInit; return &TheInit; } +void BitInit::anchor() { } + BitInit *BitInit::get(bool V) { static BitInit True(true); static BitInit False(false); @@ -565,6 +571,8 @@ IntInit::convertInitializerBitRange(const std::vector<unsigned> &Bits) const { return BitsInit::get(NewBits); } +void StringInit::anchor() { } + StringInit *StringInit::get(const std::string &V) { typedef StringMap<StringInit *> Pool; static Pool ThePool; @@ -574,6 +582,8 @@ StringInit *StringInit::get(const std::string &V) { return I; } +void CodeInit::anchor() { } + CodeInit *CodeInit::get(const std::string &V) { typedef StringMap<CodeInit *> Pool; static Pool ThePool; diff --git a/lib/TableGen/TableGenAction.cpp b/lib/TableGen/TableGenAction.cpp new file mode 100644 index 0000000000..54e5083094 --- /dev/null +++ b/lib/TableGen/TableGenAction.cpp @@ -0,0 +1,15 @@ +//===- TableGenAction.cpp - defines TableGenAction --------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/TableGen/TableGenAction.h" + +using namespace llvm; + +void TableGenAction::anchor() { } + diff --git a/lib/TableGen/TableGenBackend.cpp b/lib/TableGen/TableGenBackend.cpp index 29588db324..328d9a4930 100644 --- a/lib/TableGen/TableGenBackend.cpp +++ b/lib/TableGen/TableGenBackend.cpp @@ -15,6 +15,8 @@ #include "llvm/TableGen/Record.h" using namespace llvm; +void TableGenBackend::anchor() { } + void TableGenBackend::EmitSourceFileHeader(const std::string &Desc, raw_ostream &OS) const { OS << "//===- TableGen'erated file -------------------------------------*-" diff --git a/lib/Target/ARM/ARMMachineFunctionInfo.cpp b/lib/Target/ARM/ARMMachineFunctionInfo.cpp new file mode 100644 index 0000000000..a770bc5a02 --- /dev/null +++ b/lib/Target/ARM/ARMMachineFunctionInfo.cpp @@ -0,0 +1,14 @@ +//====- ARMMachineFuctionInfo.cpp - ARM machine function info ---*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "ARMMachineFunctionInfo.h" + +using namespace llvm; + +void ARMFunctionInfo::anchor() { } diff --git a/lib/Target/ARM/ARMMachineFunctionInfo.h b/lib/Target/ARM/ARMMachineFunctionInfo.h index 138f0c2622..96be29fa4f 100644 --- a/lib/Target/ARM/ARMMachineFunctionInfo.h +++ b/lib/Target/ARM/ARMMachineFunctionInfo.h @@ -25,6 +25,7 @@ namespace llvm { /// ARMFunctionInfo - This class is derived from MachineFunctionInfo and /// contains private ARM-specific information for each MachineFunction. class ARMFunctionInfo : public MachineFunctionInfo { + virtual void anchor(); /// isThumb - True if this function is compiled under Thumb mode. /// Used to initialized Align, so must precede it. diff --git a/lib/Target/ARM/ARMRegisterInfo.cpp b/lib/Target/ARM/ARMRegisterInfo.cpp index 1cba1ba591..d6921bb83c 100644 --- a/lib/Target/ARM/ARMRegisterInfo.cpp +++ b/lib/Target/ARM/ARMRegisterInfo.cpp @@ -16,6 +16,8 @@ #include "ARMRegisterInfo.h" using namespace llvm; +void ARMRegisterInfo::anchor() { } + ARMRegisterInfo::ARMRegisterInfo(const ARMBaseInstrInfo &tii, const ARMSubtarget &sti) : ARMBaseRegisterInfo(tii, sti) { diff --git a/lib/Target/ARM/ARMRegisterInfo.h b/lib/Target/ARM/ARMRegisterInfo.h index 8edfb9a205..15afc1aada 100644 --- a/lib/Target/ARM/ARMRegisterInfo.h +++ b/lib/Target/ARM/ARMRegisterInfo.h @@ -24,6 +24,7 @@ namespace llvm { class Type; struct ARMRegisterInfo : public ARMBaseRegisterInfo { + virtual void anchor(); public: ARMRegisterInfo(const ARMBaseInstrInfo &tii, const ARMSubtarget &STI); }; diff --git a/lib/Target/ARM/ARMTargetMachine.cpp b/lib/Target/ARM/ARMTargetMachine.cpp index 61b75cbcbc..9d6f9bd47a 100644 --- a/lib/Target/ARM/ARMTargetMachine.cpp +++ b/lib/Target/ARM/ARMTargetMachine.cpp @@ -34,6 +34,7 @@ extern "C" void LLVMInitializeARMTarget() { RegisterTargetMachine<ThumbTargetMachine> Y(TheThumbTarget); } + /// TargetMachine ctor - Create an ARM architecture model. /// ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T, StringRef TT, @@ -50,6 +51,8 @@ ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T, StringRef TT, this->Options.FloatABIType = FloatABI::Soft; } +void ARMTargetMachine::anchor() { } + ARMTargetMachine::ARMTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, @@ -74,6 +77,8 @@ ARMTargetMachine::ARMTargetMachine(const Target &T, StringRef TT, "support ARM mode execution!"); } +void ThumbTargetMachine::anchor() { } + ThumbTargetMachine::ThumbTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, diff --git a/lib/Target/ARM/ARMTargetMachine.h b/lib/Target/ARM/ARMTargetMachine.h index cd77822a33..b8a384928f 100644 --- a/lib/Target/ARM/ARMTargetMachine.h +++ b/lib/Target/ARM/ARMTargetMachine.h @@ -63,6 +63,7 @@ public: /// ARMTargetMachine - ARM target machine. /// class ARMTargetMachine : public ARMBaseTargetMachine { + virtual void anchor(); ARMInstrInfo InstrInfo; const TargetData DataLayout; // Calculates type size & alignment ARMELFWriterInfo ELFWriterInfo; @@ -103,6 +104,7 @@ class ARMTargetMachine : public ARMBaseTargetMachine { /// Thumb-1 and Thumb-2. /// class ThumbTargetMachine : public ARMBaseTargetMachine { + virtual void anchor(); // Either Thumb1InstrInfo or Thumb2InstrInfo. OwningPtr<ARMBaseInstrInfo> InstrInfo; const TargetData DataLayout; // Calculates type size & alignment diff --git a/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp b/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp index 1c109e0152..d1804a2e45 100644 --- a/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp +++ b/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp @@ -48,6 +48,8 @@ static const char *const arm_asm_table[] = { 0,0 }; +void ARMMCAsmInfoDarwin::anchor() { } + ARMMCAsmInfoDarwin::ARMMCAsmInfoDarwin() { AsmTransCBE = arm_asm_table; Data64bitsDirective = 0; @@ -61,6 +63,8 @@ ARMMCAsmInfoDarwin::ARMMCAsmInfoDarwin() { ExceptionsType = ExceptionHandling::SjLj; } +void ARMELFMCAsmInfo::anchor() { } + ARMELFMCAsmInfo::ARMELFMCAsmInfo() { // ".comm align is in bytes but .align is pow-2." AlignmentIsInBytes = false; diff --git a/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.h b/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.h index 90f7822ea5..e240f4ee18 100644 --- a/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.h +++ b/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.h @@ -18,11 +18,15 @@ namespace llvm { - struct ARMMCAsmInfoDarwin : public MCAsmInfoDarwin { + class ARMMCAsmInfoDarwin : public MCAsmInfoDarwin { + virtual void anchor(); + public: explicit ARMMCAsmInfoDarwin(); }; - struct ARMELFMCAsmInfo : public MCAsmInfo { + class ARMELFMCAsmInfo : public MCAsmInfo { + virtual void anchor(); + public: explicit ARMELFMCAsmInfo(); }; diff --git a/lib/Target/CellSPU/MCTargetDesc/SPUMCAsmInfo.cpp b/lib/Target/CellSPU/MCTargetDesc/SPUMCAsmInfo.cpp index 8c1176a9d0..4bad37eaca 100644 --- a/lib/Target/CellSPU/MCTargetDesc/SPUMCAsmInfo.cpp +++ b/lib/Target/CellSPU/MCTargetDesc/SPUMCAsmInfo.cpp @@ -14,6 +14,8 @@ #include "SPUMCAsmInfo.h" using namespace llvm; +void SPULinuxMCAsmInfo::anchor() { } + SPULinuxMCAsmInfo::SPULinuxMCAsmInfo(const Target &T, StringRef TT) { IsLittleEndian = false; diff --git a/lib/Target/CellSPU/MCTargetDesc/SPUMCAsmInfo.h b/lib/Target/CellSPU/MCTargetDesc/SPUMCAsmInfo.h index 7f850d347f..f786147b92 100644 --- a/lib/Target/CellSPU/MCTargetDesc/SPUMCAsmInfo.h +++ b/lib/Target/CellSPU/MCTargetDesc/SPUMCAsmInfo.h @@ -20,7 +20,9 @@ namespace llvm { class Target; - struct SPULinuxMCAsmInfo : public MCAsmInfo { + class SPULinuxMCAsmInfo : public MCAsmInfo { + virtual void anchor(); + public: explicit SPULinuxMCAsmInfo(const Target &T, StringRef TT); }; } // namespace llvm diff --git a/lib/Target/CellSPU/SPUMachineFunction.cpp b/lib/Target/CellSPU/SPUMachineFunction.cpp new file mode 100644 index 0000000000..5df522ef55 --- /dev/null +++ b/lib/Target/CellSPU/SPUMachineFunction.cpp @@ -0,0 +1,14 @@ +//==-- SPUMachineFunctionInfo.cpp - Private data used for CellSPU -*- C++ -*-=// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "SPUMachineFunction.h" + +using namespace llvm; + +void SPUFunctionInfo::anchor() { } diff --git a/lib/Target/CellSPU/SPUMachineFunction.h b/lib/Target/CellSPU/SPUMachineFunction.h index 3ef3ccbcaa..399684bb08 100644 --- a/lib/Target/CellSPU/SPUMachineFunction.h +++ b/lib/Target/CellSPU/SPUMachineFunction.h @@ -21,7 +21,8 @@ namespace llvm { /// SPUFunctionInfo - Cell SPU target-specific information for each /// MachineFunction class SPUFunctionInfo : public MachineFunctionInfo { -private: + virtual void anchor(); + /// UsesLR - Indicates whether LR is used in the current function. /// bool UsesLR; diff --git a/lib/Target/MBlaze/MBlazeMachineFunction.cpp b/lib/Target/MBlaze/MBlazeMachineFunction.cpp new file mode 100644 index 0000000000..c048879f4e --- /dev/null +++ b/lib/Target/MBlaze/MBlazeMachineFunction.cpp @@ -0,0 +1,14 @@ +//===-- MBlazeMachineFunctionInfo.cpp - Private data --------------*- C++ -*-=// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "MBlazeMachineFunction.h" + +using namespace llvm; + +void MBlazeFunctionInfo::anchor() { } diff --git a/lib/Target/MBlaze/MBlazeMachineFunction.h b/lib/Target/MBlaze/MBlazeMachineFunction.h index df39509428..7ea8d03adc 100644 --- a/lib/Target/MBlaze/MBlazeMachineFunction.h +++ b/lib/Target/MBlaze/MBlazeMachineFunction.h @@ -25,8 +25,8 @@ namespace llvm { /// MBlazeFunctionInfo - This class is derived from MachineFunction private /// MBlaze target-specific information for each MachineFunction. class MBlazeFunctionInfo : public MachineFunctionInfo { + virtual void anchor(); -private: /// Holds for each function where on the stack the Frame Pointer must be /// saved. This is used on Prologue and Epilogue to emit FP save/restore int FPStackOffset; diff --git a/lib/Target/MBlaze/MCTargetDesc/MBlazeMCAsmInfo.cpp b/lib/Target/MBlaze/MCTargetDesc/MBlazeMCAsmInfo.cpp index 0d88466bb3..8231f07dfa 100644 --- a/lib/Target/MBlaze/MCTargetDesc/MBlazeMCAsmInfo.cpp +++ b/lib/Target/MBlaze/MCTargetDesc/MBlazeMCAsmInfo.cpp @@ -14,6 +14,8 @@ #include "MBlazeMCAsmInfo.h" using namespace llvm; +void MBlazeMCAsmInfo::anchor() { } + MBlazeMCAsmInfo::MBlazeMCAsmInfo() { IsLittleEndian = false; StackGrowsUp = false; diff --git a/lib/Target/MBlaze/MCTargetDesc/MBlazeMCAsmInfo.h b/lib/Target/MBlaze/MCTargetDesc/MBlazeMCAsmInfo.h index e68dd58b01..284309dd6f 100644 --- a/lib/Target/MBlaze/MCTargetDesc/MBlazeMCAsmInfo.h +++ b/lib/Target/MBlaze/MCTargetDesc/MBlazeMCAsmInfo.h @@ -21,6 +21,7 @@ namespace llvm { class Target; class MBlazeMCAsmInfo : public MCAsmInfo { + virtual void anchor(); public: explicit MBlazeMCAsmInfo(); }; diff --git a/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp b/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp index ad7d380b56..5e5f3d8811 100644 --- a/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp +++ b/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp @@ -14,6 +14,8 @@ #include "MSP430MCAsmInfo.h" using namespace llvm; +void MSP430MCAsmInfo::anchor() { } + MSP430MCAsmInfo::MSP430MCAsmInfo(const Target &T, StringRef TT) { PointerSize = 2; diff --git a/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h b/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h index f3138a2202..17658f5719 100644 --- a/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h +++ b/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h @@ -20,7 +20,9 @@ namespace llvm { class Target; - struct MSP430MCAsmInfo : public MCAsmInfo { + class MSP430MCAsmInfo : public MCAsmInfo { + virtual void anchor(); + public: explicit MSP430MCAsmInfo(const Target &T, StringRef TT); }; diff --git a/lib/Target/MSP430/MSP430MachineFunctionInfo.cpp b/lib/Target/MSP430/MSP430MachineFunctionInfo.cpp new file mode 100644 index 0000000000..91058a4ee1 --- /dev/null +++ b/lib/Target/MSP430/MSP430MachineFunctionInfo.cpp @@ -0,0 +1,14 @@ +//==- MSP430MachineFuctionInfo.cpp - MSP430 machine function info -*- C++ -*-=// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "MSP430MachineFunctionInfo.h" + +using namespace llvm; + +void MSP430MachineFunctionInfo::anchor() { } diff --git a/lib/Target/MSP430/MSP430MachineFunctionInfo.h b/lib/Target/MSP430/MSP430MachineFunctionInfo.h index 383fd2e982..632d6dee27 100644 --- a/lib/Target/MSP430/MSP430MachineFunctionInfo.h +++ b/lib/Target/MSP430/MSP430MachineFunctionInfo.h @@ -21,6 +21,8 @@ namespace llvm { /// MSP430MachineFunctionInfo - This class is derived from MachineFunction and /// contains private MSP430 target-specific information for each MachineFunction. class MSP430MachineFunctionInfo : public MachineFunctionInfo { + virtual void anchor(); + /// CalleeSavedFrameSize - Size of the callee-saved register portion of the /// stack frame in bytes. unsigned CalleeSavedFrameSize; diff --git a/lib/Target/MSP430/MSP430Subtarget.cpp b/lib/Target/MSP430/MSP430Subtarget.cpp index 3ee14d9f7a..f47f4cb5a6 100644 --- a/lib/Target/MSP430/MSP430Subtarget.cpp +++ b/lib/Target/MSP430/MSP430Subtarget.cpp @@ -21,6 +21,8 @@ using namespace llvm; +void MSP430Subtarget::anchor() { } + MSP430Subtarget::MSP430Subtarget(const std::string &TT, const std::string &CPU, const std::string &FS) : diff --git a/lib/Target/MSP430/MSP430Subtarget.h b/lib/Target/MSP430/MSP430Subtarget.h index 1ce5f11fe1..3743346faf 100644 --- a/lib/Target/MSP430/MSP430Subtarget.h +++ b/lib/Target/MSP430/MSP430Subtarget.h @@ -25,6 +25,7 @@ namespace llvm { class StringRef; class MSP430Subtarget : public MSP430GenSubtargetInfo { + virtual void anchor(); bool ExtendedInsts; public: /// This constructor initializes the data members to match that diff --git a/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp b/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp index 71ae804989..c72af7d826 100644 --- a/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp +++ b/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp @@ -16,6 +16,8 @@ using namespace llvm; +void MipsMCAsmInfo::anchor() { } + MipsMCAsmInfo::MipsMCAsmInfo(const Target &T, StringRef TT) { Triple TheTriple(TT); if ((TheTriple.getArch() == Triple::mips) || diff --git a/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h b/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h index 41b719207b..859685dd43 100644 --- a/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h +++ b/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h @@ -21,6 +21,7 @@ namespace llvm { class Target; class MipsMCAsmInfo : public MCAsmInfo { + virtual void anchor(); public: explicit MipsMCAsmInfo(const Target &T, StringRef TT); }; diff --git a/lib/Target/Mips/MipsMachineFunction.cpp b/lib/Target/Mips/MipsMachineFunction.cpp new file mode 100644 index 0000000000..5f3c75f561 --- /dev/null +++ b/lib/Target/Mips/MipsMachineFunction.cpp @@ -0,0 +1,14 @@ +//===-- MipsMachineFunctionInfo.cpp - Private data used for Mips --*- C++ -*-=// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "MipsMachineFunction.h" + +using namespace llvm; + +void MipsFunctionInfo::anchor() { } diff --git a/lib/Target/Mips/MipsMachineFunction.h b/lib/Target/Mips/MipsMachineFunction.h index bc30b6b242..31448a8474 100644 --- a/lib/Target/Mips/MipsMachineFunction.h +++ b/lib/Target/Mips/MipsMachineFunction.h @@ -25,8 +25,8 @@ namespace llvm { /// MipsFunctionInfo - This class is derived from MachineFunction private /// Mips target-specific information for each MachineFunction. class MipsFunctionInfo : public MachineFunctionInfo { + virtual void anchor(); -private: MachineFunction& MF; /// SRetReturnReg - Some subtargets require that sret lowering includes /// returning the value of the returned struct in a register. This field diff --git a/lib/Target/Mips/MipsSubtarget.cpp b/lib/Target/Mips/MipsSubtarget.cpp index dc299f2783..2ecee80afc 100644 --- a/lib/Target/Mips/MipsSubtarget.cpp +++ b/lib/Target/Mips/MipsSubtarget.cpp @@ -21,6 +21,8 @@ using namespace llvm; +void MipsSubtarget::anchor() { } + MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS, bool little) : MipsGenSubtargetInfo(TT, CPU, FS), diff --git a/lib/Target/Mips/MipsSubtarget.h b/lib/Target/Mips/MipsSubtarget.h index d9dddad23a..0c6dc5264a 100644 --- a/lib/Target/Mips/MipsSubtarget.h +++ b/lib/Target/Mips/MipsSubtarget.h @@ -25,6 +25,7 @@ namespace llvm { class StringRef; class MipsSubtarget : public MipsGenSubtargetInfo { + virtual void anchor(); public: // NOTE: O64 will not be supported. diff --git a/lib/Target/Mips/MipsTargetMachine.cpp b/lib/Target/Mips/MipsTargetMachine.cpp index 02887fa9a4..6088ceedcc 100644 --- a/lib/Target/Mips/MipsTargetMachine.cpp +++ b/lib/Target/Mips/MipsTargetMachine.cpp @@ -52,6 +52,8 @@ MipsTargetMachine(const Target &T, StringRef TT, TLInfo(*this), TSInfo(*this), JITInfo() { } +void MipsebTargetMachine::anchor() { } + MipsebTargetMachine:: MipsebTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, @@ -59,6 +61,8 @@ MipsebTargetMachine(const Target &T, StringRef TT, CodeGenOpt::Level OL) : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {} +void MipselTargetMachine::anchor() { } + MipselTargetMachine:: MipselTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, @@ -66,6 +70,8 @@ MipselTargetMachine(const Target &T, StringRef TT, CodeGenOpt::Level OL) : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {} +void Mips64ebTargetMachine::anchor() { } + Mips64ebTargetMachine:: Mips64ebTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, @@ -73,6 +79,8 @@ Mips64ebTargetMachine(const Target &T, StringRef TT, CodeGenOpt::Level OL) : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {} +void Mips64elTargetMachine::anchor() { } + Mips64elTargetMachine:: Mips64elTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, diff --git a/lib/Target/Mips/MipsTargetMachine.h b/lib/Target/Mips/MipsTargetMachine.h index 6842373f15..6e88956f65 100644 --- a/lib/Target/Mips/MipsTargetMachine.h +++ b/lib/Target/Mips/MipsTargetMachine.h @@ -80,6 +80,7 @@ namespace llvm { /// MipsebTargetMachine - Mips32 big endian target machine. /// class MipsebTargetMachine : public MipsTargetMachine { + virtual void anchor(); public: MipsebTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, @@ -90,6 +91,7 @@ public: /// MipselTargetMachine - Mips32 little endian target machine. /// class MipselTargetMachine : public MipsTargetMachine { + virtual void anchor(); public: MipselTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, @@ -100,6 +102,7 @@ public: /// Mips64ebTargetMachine - Mips64 big endian target machine. /// class Mips64ebTargetMachine : public MipsTargetMachine { + virtual void anchor(); public: Mips64ebTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, @@ -111,6 +114,7 @@ public: /// Mips64elTargetMachine - Mips64 little endian target machine. /// class Mips64elTargetMachine : public MipsTargetMachine { + virtual void anchor(); public: Mips64elTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, diff --git a/lib/Target/PTX/MCTargetDesc/PTXMCAsmInfo.cpp b/lib/Target/PTX/MCTargetDesc/PTXMCAsmInfo.cpp index efefead534..cdfbc80462 100644 --- a/lib/Target/PTX/MCTargetDesc/PTXMCAsmInfo.cpp +++ b/lib/Target/PTX/MCTargetDesc/PTXMCAsmInfo.cpp @@ -16,6 +16,8 @@ using namespace llvm; +void PTXMCAsmInfo::anchor() { } + PTXMCAsmInfo::PTXMCAsmInfo(const Target &T, const StringRef &TT) { Triple TheTriple(TT); if (TheTriple.getArch() == Triple::ptx64) diff --git a/lib/Target/PTX/MCTargetDesc/PTXMCAsmInfo.h b/lib/Target/PTX/MCTargetDesc/PTXMCAsmInfo.h index 03f5d66b3d..c4c8890f65 100644 --- a/lib/Target/PTX/MCTargetDesc/PTXMCAsmInfo.h +++ b/lib/Target/PTX/MCTargetDesc/PTXMCAsmInfo.h @@ -20,7 +20,9 @@ namespace llvm { class Target; class StringRef; - struct PTXMCAsmInfo : public MCAsmInfo { + class PTXMCAsmInfo : public MCAsmInfo { + virtual void anchor(); + public: explicit PTXMCAsmInfo(const Target &T, const StringRef &TT); }; } // namespace llvm diff --git a/lib/Target/PTX/PTXMachineFunctionInfo.cpp b/lib/Target/PTX/PTXMachineFunctionInfo.cpp new file mode 100644 index 0000000000..d471d4ce24 --- /dev/null +++ b/lib/Target/PTX/PTXMachineFunctionInfo.cpp @@ -0,0 +1,14 @@ +//===- PTXMachineFuctionInfo.cpp - PTX machine function info -----*- C++ -*-==// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "PTXMachineFunctionInfo.h" + +using namespace llvm; + +void PTXMachineFunctionInfo::anchor() { } diff --git a/lib/Target/PTX/PTXMachineFunctionInfo.h b/lib/Target/PTX/PTXMachineFunctionInfo.h index 1a2878cbec..3229f5f035 100644 --- a/lib/Target/PTX/PTXMachineFunctionInfo.h +++ b/lib/Target/PTX/PTXMachineFunctionInfo.h @@ -30,7 +30,7 @@ namespace llvm { /// contains private PTX target-specific information for each MachineFunction. /// class PTXMachineFunctionInfo : public MachineFunctionInfo { -private: + virtual void anchor(); bool IsKernel; DenseSet<unsigned> RegArgs; DenseSet<unsigned> RegRets; diff --git a/lib/Target/PTX/PTXSubtarget.cpp b/lib/Target/PTX/PTXSubtarget.cpp index 1eb57d2f17..03cbb24e81 100644 --- a/lib/Target/PTX/PTXSubtarget.cpp +++ b/lib/Target/PTX/PTXSubtarget.cpp @@ -22,6 +22,8 @@ using namespace llvm; +void PTXSubtarget::anchor() { } + PTXSubtarget::PTXSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS, bool is64Bit) : PTXGenSubtargetInfo(TT, CPU, FS), diff --git a/lib/Target/PTX/PTXSubtarget.h b/lib/Target/PTX/PTXSubtarget.h index b946d7c11c..15b3d44a95 100644 --- a/lib/Target/PTX/PTXSubtarget.h +++ b/lib/Target/PTX/PTXSubtarget.h @@ -23,6 +23,7 @@ namespace llvm { class StringRef; class PTXSubtarget : public PTXGenSubtargetInfo { + virtual void anchor(); public: /** diff --git a/lib/Target/PTX/PTXTargetMachine.cpp b/lib/Target/PTX/PTXTargetMachine.cpp index 4efdc2784d..fb9dc606ae 100644 --- a/lib/Target/PTX/PTXTargetMachine.cpp +++ b/lib/Target/PTX/PTXTargetMachine.cpp @@ -85,6 +85,8 @@ PTXTargetMachine::PTXTargetMachine(const Target &T, TLInfo(*this) { } +void PTX32TargetMachine::anchor() { } + PTX32TargetMachine::PTX32TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, @@ -93,6 +95,8 @@ PTX32TargetMachine::PTX32TargetMachine(const Target &T, StringRef TT, : PTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) { } +void PTX64TargetMachine::anchor() { } + PTX64TargetMachine::PTX64TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, diff --git a/lib/Target/PTX/PTXTargetMachine.h b/lib/Target/PTX/PTXTargetMachine.h index 22911f76a1..b051348781 100644 --- a/lib/Target/PTX/PTXTargetMachine.h +++ b/lib/Target/PTX/PTXTargetMachine.h @@ -91,6 +91,7 @@ class PTXTargetMachine : public LLVMTargetMachine { class PTX32TargetMachine : public PTXTargetMachine { + virtual void anchor(); public: PTX32TargetMachine(const Target &T, StringRef TT, @@ -100,6 +101,7 @@ public: }; // class PTX32TargetMachine class PTX64TargetMachine : public PTXTargetMachine { + virtual void anchor(); public: PTX64TargetMachine(const Target &T, StringRef TT, diff --git a/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp b/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp index e9424d8415..94465d7205 100644 --- a/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp +++ b/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp @@ -14,6 +14,8 @@ #include "PPCMCAsmInfo.h" using namespace llvm; +void PPCMCAsmInfoDarwin::anchor() { } + PPCMCAsmInfoDarwin::PPCMCAsmInfoDarwin(bool is64Bit) { if (is64Bit) PointerSize = 8; @@ -30,6 +32,8 @@ PPCMCAsmInfoDarwin::PPCMCAsmInfoDarwin(bool is64Bit) { SupportsDebugInformation= true; // Debug information. } +void PPCLinuxMCAsmInfo::anchor() { } + PPCLinuxMCAsmInfo::PPCLinuxMCAsmInfo(bool is64Bit) { if (is64Bit) PointerSize = 8; diff --git a/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h b/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h index 96ae6fbba0..cf11cbc8bd 100644 --- a/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h +++ b/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h @@ -18,11 +18,15 @@ namespace llvm { - struct PPCMCAsmInfoDarwin : public MCAsmInfoDarwin { + class PPCMCAsmInfoDarwin : public MCAsmInfoDarwin { + virtual void anchor(); + public: explicit PPCMCAsmInfoDarwin(bool is64Bit); }; - struct PPCLinuxMCAsmInfo : public MCAsmInfo { + class PPCLinuxMCAsmInfo : public MCAsmInfo { + virtual void anchor(); + public: explicit PPCLinuxMCAsmInfo(bool is64Bit); }; diff --git a/lib/Target/PowerPC/PPCMachineFunctionInfo.cpp b/lib/Target/PowerPC/PPCMachineFunctionInfo.cpp new file mode 100644 index 0000000000..238e4d134a --- /dev/null +++ b/lib/Target/PowerPC/PPCMachineFunctionInfo.cpp @@ -0,0 +1,15 @@ +//=-- PPCMachineFunctionInfo.cpp - Private data used for PowerPC --*- C++ -*-=// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "PPCMachineFunctionInfo.h" + +using namespace llvm; + +void PPCFunctionInfo::anchor() { } + diff --git a/lib/Target/PowerPC/PPCMachineFunctionInfo.h b/lib/Target/PowerPC/PPCMachineFunctionInfo.h index e2649c8b38..24caffa3f0 100644 --- a/lib/Target/PowerPC/PPCMachineFunctionInfo.h +++ b/lib/Target/PowerPC/PPCMachineFunctionInfo.h @@ -21,7 +21,8 @@ namespace llvm { /// PPCFunctionInfo - This class is derived from MachineFunction private /// PowerPC target-specific information for each MachineFunction. class PPCFunctionInfo : public MachineFunctionInfo { -private: + virtual void anchor(); + /// FramePointerSaveIndex - Frame index of where the old frame pointer is /// stored. Also used as an anchor for instructions that need to be altered /// when using frame pointers (dyna_add, dyna_sub.) diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp index 8e71c46717..919ada7e95 100644 --- a/lib/Target/PowerPC/PPCTargetMachine.cpp +++ b/lib/Target/PowerPC/PPCTargetMachine.cpp @@ -44,6 +44,8 @@ PPCTargetMachine::PPCTargetMachine(const Target &T, StringRef TT, /// groups, which typically degrades performance. bool PPCTargetMachine::getEnableTailMergeDefault() const { return false; } +void PPC32TargetMachine::anchor() { } + PPC32TargetMachine::PPC32TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, @@ -52,6 +54,7 @@ PPC32TargetMachine::PPC32TargetMachine(const Target &T, StringRef TT, : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) { } +void PPC64TargetMachine::anchor() { } PPC64TargetMachine::PPC64TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, diff --git a/lib/Target/PowerPC/PPCTargetMachine.h b/lib/Target/PowerPC/PPCTargetMachine.h index 042787659d..560de522c8 100644 --- a/lib/Target/PowerPC/PPCTargetMachine.h +++ b/lib/Target/PowerPC/PPCTargetMachine.h @@ -77,6 +77,7 @@ public: /// PPC32TargetMachine - PowerPC 32-bit target machine. /// class PPC32TargetMachine : public PPCTargetMachine { + virtual void anchor(); public: PPC32TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, @@ -87,6 +88,7 @@ public: /// PPC64TargetMachine - PowerPC 64-bit target machine. /// class PPC64TargetMachine : public PPCTargetMachine { + virtual void anchor(); public: PPC64TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, diff --git a/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp b/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp index 6a7e090235..f5e10fc3a4 100644 --- a/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp +++ b/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp @@ -16,6 +16,8 @@ using namespace llvm; +void SparcELFMCAsmInfo::anchor() { } + SparcELFMCAsmInfo::SparcELFMCAsmInfo(const Target &T, StringRef TT) { IsLittleEndian = false; Triple TheTriple(TT); diff --git a/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.h b/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.h index 0cb6827d27..9335923c2c 100644 --- a/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.h +++ b/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.h @@ -20,7 +20,9 @@ namespace llvm { class Target; - struct SparcELFMCAsmInfo : public MCAsmInfo { + class SparcELFMCAsmInfo : public MCAsmInfo { + virtual void anchor(); + public: explicit SparcELFMCAsmInfo(const Target &T, StringRef TT); }; diff --git a/lib/Target/Sparc/SparcMachineFunctionInfo.cpp b/lib/Target/Sparc/SparcMachineFunctionInfo.cpp new file mode 100644 index 0000000000..efc37a3f2e --- /dev/null +++ b/lib/Target/Sparc/SparcMachineFunctionInfo.cpp @@ -0,0 +1,14 @@ +//==- SparcMachineFunctionInfo.cpp - Sparc Machine Function Info -*- C++ -*-==// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "SparcMachineFunctionInfo.h" + +using namespace llvm; + +void SparcMachineFunctionInfo::anchor() { } diff --git a/lib/Target/Sparc/SparcMachineFunctionInfo.h b/lib/Target/Sparc/SparcMachineFunctionInfo.h index 0b74308eb0..90c27a4459 100644 --- a/lib/Target/Sparc/SparcMachineFunctionInfo.h +++ b/lib/Target/Sparc/SparcMachineFunctionInfo.h @@ -18,6 +18,7 @@ namespace llvm { class SparcMachineFunctionInfo : public MachineFunctionInfo { + virtual void anchor(); private: unsigned GlobalBaseReg; diff --git a/lib/Target/Sparc/SparcSubtarget.cpp b/lib/Target/Sparc/SparcSubtarget.cpp index 6c501cff6a..7ffd4da318 100644 --- a/lib/Target/Sparc/SparcSubtarget.cpp +++ b/lib/Target/Sparc/SparcSubtarget.cpp @@ -21,6 +21,8 @@ using namespace llvm; +void SparcSubtarget::anchor() { } + SparcSubtarget::SparcSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS, bool is64Bit) : SparcGenSubtargetInfo(TT, CPU, FS), diff --git a/lib/Target/Sparc/SparcSubtarget.h b/lib/Target/Sparc/SparcSubtarget.h index 00a04c3bea..2846447723 100644 --- a/lib/Target/Sparc/SparcSubtarget.h +++ b/lib/Target/Sparc/SparcSubtarget.h @@ -24,6 +24,7 @@ namespace llvm { class StringRef; class SparcSubtarget : public SparcGenSubtargetInfo { + virtual void anchor(); bool IsV9; bool V8DeprecatedInsts; bool IsVIS; diff --git a/lib/Target/Sparc/SparcTargetMachine.cpp b/lib/Target/Sparc/SparcTargetMachine.cpp index 8e16fd7948..cfb23438bd 100644 --- a/lib/Target/Sparc/SparcTargetMachine.cpp +++ b/lib/Target/Sparc/SparcTargetMachine.cpp @@ -51,6 +51,8 @@ bool SparcTargetMachine::addPreEmitPass(PassManagerBase &PM){ return true; } +void SparcV8TargetMachine::anchor() { } + SparcV8TargetMachine::SparcV8TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, @@ -61,6 +63,8 @@ SparcV8TargetMachine::SparcV8TargetMachine(const Target &T, : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) { } +void SparcV9TargetMachine::anchor() { } + SparcV9TargetMachine::SparcV9TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, diff --git a/lib/Target/Sparc/SparcTargetMachine.h b/lib/Target/Sparc/SparcTargetMachine.h index cedc1e33de..62843459c4 100644 --- a/lib/Target/Sparc/SparcTargetMachine.h +++ b/lib/Target/Sparc/SparcTargetMachine.h @@ -62,6 +62,7 @@ public: /// SparcV8TargetMachine - Sparc 32-bit target machine /// class SparcV8TargetMachine : public SparcTargetMachine { + virtual void anchor(); public: SparcV8TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, @@ -73,6 +74,7 @@ public: /// SparcV9TargetMachine - Sparc 64-bit target machine /// class SparcV9TargetMachine : public SparcTargetMachine { + virtual void anchor(); public: SparcV9TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, diff --git a/lib/Target/TargetJITInfo.cpp b/lib/Target/TargetJITInfo.cpp new file mode 100644 index 0000000000..aafedf8749 --- /dev/null +++ b/lib/Target/TargetJITInfo.cpp @@ -0,0 +1,14 @@ +//===- Target/TargetJITInfo.h - Target Information for JIT ------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "llvm/Target/TargetJITInfo.h" + +using namespace llvm; + +void TargetJITInfo::anchor() { } diff --git a/lib/Target/TargetLibraryInfo.cpp b/lib/Target/TargetLibraryInfo.cpp index 768facb56a..2119c4ee3a 100644 --- a/lib/Target/TargetLibraryInfo.cpp +++ b/lib/Target/TargetLibraryInfo.cpp @@ -20,6 +20,8 @@ INITIALIZE_PASS(TargetLibraryInfo, "targetlibinfo", "Target Library Information", false, true) char TargetLibraryInfo::ID = 0; +void TargetLibraryInfo::anchor() { } + const char* TargetLibraryInfo::StandardNames[LibFunc::NumLibFuncs] = { "acos", diff --git a/lib/Target/TargetRegisterInfo.cpp b/lib/Target/TargetRegisterInfo.cpp index 2689837322..ad663199e5 100644 --- a/lib/Target/TargetRegisterInfo.cpp +++ b/lib/Target/TargetRegisterInfo.cpp @@ -18,6 +18,8 @@ using namespace llvm; +void TargetRegisterClass::anchor() { } + TargetRegisterInfo::TargetRegisterInfo(const TargetRegisterInfoDesc *ID, regclass_iterator RCB, regclass_iterator RCE, const char *const *subregindexnames) diff --git a/lib/Target/X86/Disassembler/X86Disassembler.cpp b/lib/Target/X86/Disassembler/X86Disassembler.cpp index 3aacb20e73..5b7316e73d 100644 --- a/lib/Target/X86/Disassembler/X86Disassembler.cpp +++ b/lib/Target/X86/Disassembler/X86Disassembler.cpp @@ -79,6 +79,12 @@ EDInstInfo *X86GenericDisassembler::getEDInfo() const { return instInfoX86; } +void X86_16Disassembler::anchor() { } + +void X86_32Disassembler::anchor() { } + +void X86_64Disassembler::anchor() { } + /// regionReader - a callback function that wraps the readByte method from /// MemoryObject. /// diff --git a/lib/Target/X86/Disassembler/X86Disassembler.h b/lib/Target/X86/Disassembler/X86Disassembler.h index 6ac9a0ff10..d99236b16b 100644 --- a/lib/Target/X86/Disassembler/X86Disassembler.h +++ b/lib/Target/X86/Disassembler/X86Disassembler.h @@ -128,6 +128,7 @@ private: /// X86_16Disassembler - 16-bit X86 disassembler. class X86_16Disassembler : public X86GenericDisassembler { + virtual void anchor(); public: X86_16Disassembler(const MCSubtargetInfo &STI) : X86GenericDisassembler(STI, MODE_16BIT) { @@ -136,6 +137,7 @@ public: /// X86_16Disassembler - 32-bit X86 disassembler. class X86_32Disassembler : public X86GenericDisassembler { + virtual void anchor(); public: X86_32Disassembler(const MCSubtargetInfo &STI) : X86GenericDisassembler(STI, MODE_32BIT) { @@ -144,6 +146,7 @@ public: /// X86_16Disassembler - 64-bit X86 disassembler. class X86_64Disassembler : public X86GenericDisassembler { + virtual void anchor(); public: X86_64Disassembler(const MCSubtargetInfo &STI) : X86GenericDisassembler(STI, MODE_64BIT) { diff --git a/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp b/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp index eb64ad112b..003a14ab21 100644 --- a/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp +++ b/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp @@ -48,6 +48,8 @@ static const char *const x86_asm_table[] = { "{cc}", "cc", 0,0}; +void X86MCAsmInfoDarwin::anchor() { } + X86MCAsmInfoDarwin::X86MCAsmInfoDarwin(const Triple &T) { bool is64Bit = T.getArch() == Triple::x86_64; if (is64Bit) @@ -80,6 +82,8 @@ X86_64MCAsmInfoDarwin::X86_64MCAsmInfoDarwin(const Triple &Triple) : X86MCAsmInfoDarwin(Triple) { } +void X86ELFMCAsmInfo::anchor() { } + X86ELFMCAsmInfo::X86ELFMCAsmInfo(const Triple &T) { if (T.getArch() == Triple::x86_64) PointerSize = 8; @@ -125,6 +129,8 @@ getNonexecutableStackSection(MCContext &Ctx) const { 0, SectionKind::getMetadata()); } +void X86MCAsmInfoMicrosoft::anchor() { } + X86MCAsmInfoMicrosoft::X86MCAsmInfoMicrosoft(const Triple &Triple) { if (Triple.getArch() == Triple::x86_64) { GlobalPrefix = ""; @@ -137,6 +143,8 @@ X86MCAsmInfoMicrosoft::X86MCAsmInfoMicrosoft(const Triple &Triple) { TextAlignFillValue = 0x90; } +void X86MCAsmInfoGNUCOFF::anchor() { } + X86MCAsmInfoGNUCOFF::X86MCAsmInfoGNUCOFF(const Triple &Triple) { if (Triple.getArch() == Triple::x86_64) { GlobalPrefix = ""; diff --git a/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.h b/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.h index 5d619e8b17..57019c7e7c 100644 --- a/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.h +++ b/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.h @@ -21,7 +21,9 @@ namespace llvm { class Triple; - struct X86MCAsmInfoDarwin : public MCAsmInfoDarwin { + class X86MCAsmInfoDarwin : public MCAsmInfoDarwin { + virtual void anchor(); + public: explicit X86MCAsmInfoDarwin(const Triple &Triple); }; @@ -33,16 +35,22 @@ namespace llvm { MCStreamer &Streamer) const; }; - struct X86ELFMCAsmInfo : public MCAsmInfo { + class X86ELFMCAsmInfo : public MCAsmInfo { + virtual void anchor(); + public: explicit X86ELFMCAsmInfo(const Triple &Triple); virtual const MCSection *getNonexecutableStackSection(MCContext &Ctx) const; }; - struct X86MCAsmInfoMicrosoft : public MCAsmInfoMicrosoft { + class X86MCAsmInfoMicrosoft : public MCAsmInfoMicrosoft { + virtual void anchor(); + public: explicit X86MCAsmInfoMicrosoft(const Triple &Triple); }; - struct X86MCAsmInfoGNUCOFF : public MCAsmInfoGNUCOFF { + class X86MCAsmInfoGNUCOFF : public MCAsmInfoGNUCOFF { + virtual void anchor(); + public: explicit X86MCAsmInfoGNUCOFF(const Triple &Triple); }; } // namespace llvm diff --git a/lib/Target/X86/X86MachineFunctionInfo.cpp b/lib/Target/X86/X86MachineFunctionInfo.cpp new file mode 100644 index 0000000000..de8848931e --- /dev/null +++ b/lib/Target/X86/X86MachineFunctionInfo.cpp @@ -0,0 +1,14 @@ +//====- X86MachineFuctionInfo.cpp - X86 machine function info ---*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "X86MachineFunctionInfo.h" + +using namespace llvm; + +void X86MachineFunctionInfo::anchor() { } diff --git a/lib/Target/X86/X86MachineFunctionInfo.h b/lib/Target/X86/X86MachineFunctionInfo.h index b0bb313ec6..b73f67d14b 100644 --- a/lib/Target/X86/X86MachineFunctionInfo.h +++ b/lib/Target/X86/X86MachineFunctionInfo.h @@ -21,6 +21,8 @@ namespace llvm { /// X86MachineFunctionInfo - This class is derived from MachineFunction and /// contains private X86 target-specific information for each MachineFunction. class X86MachineFunctionInfo : public MachineFunctionInfo { + virtual void anchor(); + /// ForceFramePointer - True if the function is required to use of frame /// pointer for reasons other than it containing dynamic allocation or /// that FP eliminatation is turned off. For example, Cygwin main function diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp index 126042eeae..399d8e9efe 100644 --- a/lib/Target/X86/X86TargetMachine.cpp +++ b/lib/Target/X86/X86TargetMachine.cpp @@ -28,6 +28,7 @@ extern "C" void LLVMInitializeX86Target() { RegisterTargetMachine<X86_64TargetMachine> Y(TheX86_64Target); } +void X86_32TargetMachine::anchor() { } X86_32TargetMachine::X86_32TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, @@ -50,6 +51,7 @@ X86_32TargetMachine::X86_32TargetMachine(const Target &T, StringRef TT, JITInfo(*this) { } +void X86_64TargetMachine::anchor() { } X86_64TargetMachine::X86_64TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, diff --git a/lib/Target/X86/X86TargetMachine.h b/lib/Target/X86/X86TargetMachine.h index 3ac176937a..16092b8e5a 100644 --- a/lib/Target/X86/X86TargetMachine.h +++ b/lib/Target/X86/X86TargetMachine.h @@ -78,6 +78,7 @@ public: /// X86_32TargetMachine - X86 32-bit target machine. /// class X86_32TargetMachine : public X86TargetMachine { + virtual void anchor(); const TargetData DataLayout; // Calculates type size & alignment X86InstrInfo InstrInfo; X86SelectionDAGInfo TSInfo; @@ -106,6 +107,7 @@ public: /// X86_64TargetMachine - X86 64-bit target machine. /// class X86_64TargetMachine : public X86TargetMachine { + virtual void anchor(); const TargetData DataLayout; // Calculates type size & alignment X86InstrInfo InstrInfo; X86SelectionDAGInfo TSInfo; diff --git a/lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.cpp b/lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.cpp index 42ab1b31d5..64f1a8e19b 100644 --- a/lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.cpp +++ b/lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.cpp @@ -10,6 +10,8 @@ #include "XCoreMCAsmInfo.h" using namespace llvm; +void XCoreMCAsmInfo::anchor() { } + XCoreMCAsmInfo::XCoreMCAsmInfo(const Target &T, StringRef TT) { SupportsDebugInformation = true; Data16bitsDirective = "\t.short\t"; diff --git a/lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.h b/lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.h index 8403922638..f9e0290bbd 100644 --- a/lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.h +++ b/lib/Target/XCore/MCTargetDesc/XCoreMCAsmInfo.h @@ -21,6 +21,7 @@ namespace llvm { class Target; class XCoreMCAsmInfo : public MCAsmInfo { + virtual void anchor(); public: explicit XCoreMCAsmInfo(const Target &T, StringRef TT); }; diff --git a/lib/Target/XCore/XCoreMachineFunctionInfo.cpp b/lib/Target/XCore/XCoreMachineFunctionInfo.cpp new file mode 100644 index 0000000000..e782bbef39 --- /dev/null +++ b/lib/Target/XCore/XCoreMachineFunctionInfo.cpp @@ -0,0 +1,14 @@ +//===- XCoreMachineFuctionInfo.cpp - XCore machine function info -*- C++ -*-==// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "XCoreMachineFunctionInfo.h" + +using namespace llvm; + +void XCoreFunctionInfo::anchor() { } diff --git a/lib/Target/XCore/XCoreMachineFunctionInfo.h b/lib/Target/XCore/XCoreMachineFunctionInfo.h index a575a0f695..d2ef9b7286 100644 --- a/lib/Target/XCore/XCoreMachineFunctionInfo.h +++ b/lib/Target/XCore/XCoreMachineFunctionInfo.h @@ -26,7 +26,7 @@ class Function; /// XCoreFunctionInfo - This class is derived from MachineFunction private /// XCore target-specific information for each MachineFunction. class XCoreFunctionInfo : public MachineFunctionInfo { -private: + virtual void anchor(); bool UsesLR; int LRSpillSlot; int FPSpillSlot; diff --git a/lib/Target/XCore/XCoreSubtarget.cpp b/lib/Target/XCore/XCoreSubtarget.cpp index b4e9927104..78a1469898 100644 --- a/lib/Target/XCore/XCoreSubtarget.cpp +++ b/lib/Target/XCore/XCoreSubtarget.cpp @@ -21,6 +21,8 @@ using namespace llvm; +void XCoreSubtarget::anchor() { } + XCoreSubtarget::XCoreSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS) : XCoreGenSubtargetInfo(TT, CPU, FS) diff --git a/lib/Target/XCore/XCoreSubtarget.h b/lib/Target/XCore/XCoreSubtarget.h index 7b29fa2367..2175e5a7ce 100644 --- a/lib/Target/XCore/XCoreSubtarget.h +++ b/lib/Target/XCore/XCoreSubtarget.h @@ -25,6 +25,7 @@ namespace llvm { class StringRef; class XCoreSubtarget : public XCoreGenSubtargetInfo { + virtual void anchor(); public: /// This constructor initializes the data members to match that diff --git a/lib/Transforms/Utils/SimplifyIndVar.cpp b/lib/Transforms/Utils/SimplifyIndVar.cpp index 6732a789d5..20eef3c0dc 100644 --- a/lib/Transforms/Utils/SimplifyIndVar.cpp +++ b/lib/Transforms/Utils/SimplifyIndVar.cpp @@ -375,6 +375,8 @@ void SimplifyIndvar::simplifyUsers(PHINode *CurrIV, IVVisitor *V) { namespace llvm { +void IVVisitor::anchor() { } + /// simplifyUsersOfIV - Simplify instructions that use this induction variable /// by using ScalarEvolution to analyze the IV's recurrence. bool simplifyUsersOfIV(PHINode *CurrIV, ScalarEvolution *SE, LPPassManager *LPM, diff --git a/lib/VMCore/Constants.cpp b/lib/VMCore/Constants.cpp index f17f9a26ca..ba8c31b44a 100644 --- a/lib/VMCore/Constants.cpp +++ b/lib/VMCore/Constants.cpp @@ -40,6 +40,8 @@ using namespace llvm; // Constant Class //===----------------------------------------------------------------------===// +void Constant::anchor() { } + bool Constant::isNegativeZeroValue() const { // Floating point values have an explicit -0.0 value. if (const ConstantFP *CFP = dyn_cast<ConstantFP>(this)) @@ -363,6 +365,8 @@ void Constant::removeDeadConstantUsers() const { // ConstantInt //===----------------------------------------------------------------------===// +void ConstantInt::anchor() { } + ConstantInt::ConstantInt(IntegerType *Ty, const APInt& V) : Constant(Ty, ConstantIntVal, 0, 0), Val(V) { assert(V.getBitWidth() == Ty->getBitWidth() && "Invalid constant for type"); @@ -486,6 +490,8 @@ static const fltSemantics *TypeToFloatSemantics(Type *Ty) { return &APFloat::PPCDoubleDouble; } +void ConstantFP::anchor() { } + /// get() - This returns a constant fp for the specified value in the /// specified type. This should only be used for simple constant values like /// 2.0/1.0 etc, that are known-valid both as double and as the target format. diff --git a/lib/VMCore/ConstantsContext.h b/lib/VMCore/ConstantsContext.h index 1077004d7c..cfcdf134ab 100644 --- a/lib/VMCore/ConstantsContext.h +++ b/lib/VMCore/ConstantsContext.h @@ -30,6 +30,7 @@ struct ConstantTraits; /// UnaryConstantExpr - This class is private to Constants.cpp, and is used /// behind the scenes to implement unary constant exprs. class UnaryConstantExpr : public ConstantExpr { + virtual void anchor(); void *operator new(size_t, unsigned); // DO NOT IMPLEMENT public: // allocate space for exactly one operand @@ -46,6 +47,7 @@ public: /// BinaryConstantExpr - This class is private to Constants.cpp, and is used /// behind the scenes to implement binary constant exprs. class BinaryConstantExpr : public ConstantExpr { + virtual void anchor(); void *operator new(size_t, unsigned); // DO NOT IMPLEMENT public: // allocate space for exactly two operands @@ -66,6 +68,7 @@ public: /// SelectConstantExpr - This class is private to Constants.cpp, and is used /// behind the scenes to implement select constant exprs. class SelectConstantExpr : public ConstantExpr { + virtual void anchor(); void *operator new(size_t, unsigned); // DO NOT IMPLEMENT public: // allocate space for exactly three operands @@ -86,6 +89,7 @@ public: /// Constants.cpp, and is used behind the scenes to implement /// extractelement constant exprs. class ExtractElementConstantExpr : public ConstantExpr { + virtual void anchor(); void *operator new(size_t, unsigned); // DO NOT IMPLEMENT public: // allocate space for exactly two operands @@ -106,6 +110,7 @@ public: /// Constants.cpp, and is used behind the scenes to implement /// insertelement constant exprs. class InsertElementConstantExpr : public ConstantExpr { + virtual void anchor(); void *operator new(size_t, unsigned); // DO NOT IMPLEMENT public: // allocate space for exactly three operands @@ -127,6 +132,7 @@ public: /// Constants.cpp, and is used behind the scenes to implement /// shufflevector constant exprs. class ShuffleVectorConstantExpr : public ConstantExpr { + virtual void anchor(); void *operator new(size_t, unsigned); // DO NOT IMPLEMENT public: // allocate space for exactly three operands @@ -151,6 +157,7 @@ public: /// Constants.cpp, and is used behind the scenes to implement /// extractvalue constant exprs. class ExtractValueConstantExpr : public ConstantExpr { + virtual void anchor(); void *operator new(size_t, unsigned); // DO NOT IMPLEMENT public: // allocate space for exactly one operand @@ -176,6 +183,7 @@ public: /// Constants.cpp, and is used behind the scenes to implement /// insertvalue constant exprs. class InsertValueConstantExpr : public ConstantExpr { + virtual void anchor(); void *operator new(size_t, unsigned); // DO NOT IMPLEMENT public: // allocate space for exactly one operand @@ -202,6 +210,7 @@ public: /// GetElementPtrConstantExpr - This class is private to Constants.cpp, and is /// used behind the scenes to implement getelementpr constant exprs. class GetElementPtrConstantExpr : public ConstantExpr { + virtual void anchor(); GetElementPtrConstantExpr(Constant *C, const std::vector<Constant*> &IdxList, Type *DestTy); public: @@ -221,8 +230,10 @@ public: // CompareConstantExpr - This class is private to Constants.cpp, and is used // behind the scenes to implement ICmp and FCmp constant expressions. This is // needed in order to store the predicate value for these instructions. -struct CompareConstantExpr : public ConstantExpr { +class CompareConstantExpr : public ConstantExpr { + virtual void anchor(); void *operator new(size_t, unsigned); // DO NOT IMPLEMENT +public: // allocate space for exactly two operands void *operator new(size_t s) { return User::operator new(s, 2); diff --git a/lib/VMCore/Function.cpp b/lib/VMCore/Function.cpp index bb8f62ac29..8238f63215 100644 --- a/lib/VMCore/Function.cpp +++ b/lib/VMCore/Function.cpp @@ -39,6 +39,8 @@ template class llvm::SymbolTableListTraits<BasicBlock, Function>; // Argument Implementation //===----------------------------------------------------------------------===// +void Argument::anchor() { } + Argument::Argument(Type *Ty, const Twine &Name, Function *Par) : Value(Ty, Value::ArgumentVal) { Parent = 0; diff --git a/lib/VMCore/LLVMContextImpl.cpp b/lib/VMCore/LLVMContextImpl.cpp index 252b34033b..b0dd680926 100644 --- a/lib/VMCore/LLVMContextImpl.cpp +++ b/lib/VMCore/LLVMContextImpl.cpp @@ -93,3 +93,24 @@ LLVMContextImpl::~LLVMContextImpl() { // Destroy MDStrings. DeleteContainerSeconds(MDStringCache); } + +// ConstantsContext anchors +void UnaryConstantExpr::anchor() { } + +void BinaryConstantExpr::anchor() { } + +void SelectConstantExpr::anchor() { } + +void ExtractElementConstantExpr::anchor() { } + +void InsertElementConstantExpr::anchor() { } + +void ShuffleVectorConstantExpr::anchor() { } + +void ExtractValueConstantExpr::anchor() { } + +void InsertValueConstantExpr::anchor() { } + +void GetElementPtrConstantExpr::anchor() { } + +void CompareConstantExpr::anchor() { } diff --git a/lib/VMCore/Metadata.cpp b/lib/VMCore/Metadata.cpp index 8debd7cdb7..9966433496 100644 --- a/lib/VMCore/Metadata.cpp +++ b/lib/VMCore/Metadata.cpp @@ -29,6 +29,8 @@ using namespace llvm; // MDString implementation. // +void MDString::anchor() { } + MDString::MDString(LLVMContext &C, StringRef S) : Value(Type::getMetadataTy(C), Value::MDStringVal), Str(S) {} diff --git a/lib/VMCore/PassManager.cpp b/lib/VMCore/PassManager.cpp index 1aaf765ca4..88c4186e36 100644 --- a/lib/VMCore/PassManager.cpp +++ b/lib/VMCore/PassManager.cpp @@ -223,6 +223,7 @@ namespace llvm { class FunctionPassManagerImpl : public Pass, public PMDataManager, public PMTopLevelManager { + virtual void anchor(); private: bool wasRun; public: @@ -291,6 +292,8 @@ public: } }; +void FunctionPassManagerImpl::anchor() {} + char FunctionPassManagerImpl::ID = 0; //===----------------------------------------------------------------------===// @@ -384,6 +387,7 @@ char MPPassManager::ID = 0; class PassManagerImpl : public Pass, public PMDataManager, public PMTopLevelManager { + virtual void anchor(); public: static char ID; @@ -437,6 +441,8 @@ public: } }; +void PassManagerImpl::anchor() {} + char PassManagerImpl::ID = 0; } // End of llvm namespace |