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Diffstat (limited to 'test/CodeGen/AArch64/arm64-dead-register-def-bug.ll')
-rw-r--r-- | test/CodeGen/AArch64/arm64-dead-register-def-bug.ll | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/test/CodeGen/AArch64/arm64-dead-register-def-bug.ll b/test/CodeGen/AArch64/arm64-dead-register-def-bug.ll new file mode 100644 index 0000000000..1bbcf50ba7 --- /dev/null +++ b/test/CodeGen/AArch64/arm64-dead-register-def-bug.ll @@ -0,0 +1,32 @@ +; RUN: llc -mtriple="arm64-apple-ios" < %s | FileCheck %s +; +; Check that the dead register definition pass is considering implicit defs. +; When rematerializing through truncates, the coalescer may produce instructions +; with dead defs, but live implicit-defs of subregs: +; E.g. %X1<def, dead> = MOVi64imm 2, %W1<imp-def>; %X1:GPR64, %W1:GPR32 +; These instructions are live, and their definitions should not be rewritten. +; +; <rdar://problem/16492408> + +define void @testcase() { +; CHECK: testcase: +; CHECK-NOT: orr xzr, xzr, #0x2 + +bb1: + %tmp1 = tail call float @ceilf(float 2.000000e+00) + %tmp2 = fptoui float %tmp1 to i64 + br i1 undef, label %bb2, label %bb3 + +bb2: + tail call void @foo() + br label %bb3 + +bb3: + %tmp3 = trunc i64 %tmp2 to i32 + tail call void @bar(i32 %tmp3) + ret void +} + +declare void @foo() +declare void @bar(i32) +declare float @ceilf(float) nounwind readnone |