diff options
Diffstat (limited to 'test/CodeGen/ARM')
-rw-r--r-- | test/CodeGen/ARM/2011-10-26-memset-inline.ll | 4 | ||||
-rw-r--r-- | test/CodeGen/ARM/2011-10-26-memset-with-neon.ll | 4 | ||||
-rw-r--r-- | test/CodeGen/ARM/vstlane.ll | 2 |
3 files changed, 5 insertions, 5 deletions
diff --git a/test/CodeGen/ARM/2011-10-26-memset-inline.ll b/test/CodeGen/ARM/2011-10-26-memset-inline.ll index ff049c8986..03614eddbf 100644 --- a/test/CodeGen/ARM/2011-10-26-memset-inline.ll +++ b/test/CodeGen/ARM/2011-10-26-memset-inline.ll @@ -10,8 +10,8 @@ target triple = "thumbv7-apple-ios5.0.0" ; CHECK-GENERIT-NEXT: strb ; CHECK-GENERIT-NEXT: strb ; CHECK-GENERIT-NEXT: strb -; CHECK-UNALIGNED: strb -; CHECK-UNALIGNED-NEXT: str +; CHECK-UNALIGNED: strb +; CHECK-UNALIGNED: str define void @foo(i8* nocapture %c) nounwind optsize { entry: call void @llvm.memset.p0i8.i64(i8* %c, i8 -1, i64 5, i32 1, i1 false) diff --git a/test/CodeGen/ARM/2011-10-26-memset-with-neon.ll b/test/CodeGen/ARM/2011-10-26-memset-with-neon.ll index f563eeef01..850c51133f 100644 --- a/test/CodeGen/ARM/2011-10-26-memset-with-neon.ll +++ b/test/CodeGen/ARM/2011-10-26-memset-with-neon.ll @@ -1,8 +1,8 @@ ; RUN: llc -march=arm -mcpu=cortex-a8 < %s | FileCheck %s ; Trigger multiple NEON stores. -; CHECK: vst1.64 -; CHECK-NEXT: vst1.64 +; CHECK: vst1.64 +; CHECK: vst1.64 define void @f_0_40(i8* nocapture %c) nounwind optsize { entry: call void @llvm.memset.p0i8.i64(i8* %c, i8 0, i64 40, i32 16, i1 false) diff --git a/test/CodeGen/ARM/vstlane.ll b/test/CodeGen/ARM/vstlane.ll index 651b6d5c47..34c5c70fff 100644 --- a/test/CodeGen/ARM/vstlane.ll +++ b/test/CodeGen/ARM/vstlane.ll @@ -13,7 +13,7 @@ define void @vst1lanei8(i8* %A, <8 x i8>* %B) nounwind { ;Check for a post-increment updating store. define void @vst1lanei8_update(i8** %ptr, <8 x i8>* %B) nounwind { ;CHECK-LABEL: vst1lanei8_update: -;CHECK: vst1.8 {d16[3]}, [r2]! +;CHECK: vst1.8 {d16[3]}, [{{r[0-9]}}]! %A = load i8** %ptr %tmp1 = load <8 x i8>* %B %tmp2 = extractelement <8 x i8> %tmp1, i32 3 |