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-rw-r--r--test/CodeGen/MBlaze/DbgValueOtherTargets.test1
-rw-r--r--test/CodeGen/MBlaze/brind.ll72
-rw-r--r--test/CodeGen/MBlaze/callind.ll80
-rw-r--r--test/CodeGen/MBlaze/cc.ll266
-rw-r--r--test/CodeGen/MBlaze/div.ll75
-rw-r--r--test/CodeGen/MBlaze/fpu.ll66
-rw-r--r--test/CodeGen/MBlaze/fsl.ll319
-rw-r--r--test/CodeGen/MBlaze/imm.ll70
-rw-r--r--test/CodeGen/MBlaze/intr.ll48
-rw-r--r--test/CodeGen/MBlaze/jumptable.ll79
-rw-r--r--test/CodeGen/MBlaze/lit.local.cfg6
-rw-r--r--test/CodeGen/MBlaze/loop.ll44
-rw-r--r--test/CodeGen/MBlaze/mul.ll51
-rw-r--r--test/CodeGen/MBlaze/mul64.ll23
-rw-r--r--test/CodeGen/MBlaze/select.ll15
-rw-r--r--test/CodeGen/MBlaze/shift.ll115
-rw-r--r--test/CodeGen/MBlaze/svol.ll80
17 files changed, 0 insertions, 1410 deletions
diff --git a/test/CodeGen/MBlaze/DbgValueOtherTargets.test b/test/CodeGen/MBlaze/DbgValueOtherTargets.test
deleted file mode 100644
index 8b850f5110..0000000000
--- a/test/CodeGen/MBlaze/DbgValueOtherTargets.test
+++ /dev/null
@@ -1 +0,0 @@
-RUN: llc -O0 -march=mblaze -asm-verbose < %S/../Inputs/DbgValueOtherTargets.ll | FileCheck %S/../Inputs/DbgValueOtherTargets.ll
diff --git a/test/CodeGen/MBlaze/brind.ll b/test/CodeGen/MBlaze/brind.ll
deleted file mode 100644
index 8aa1ae99bf..0000000000
--- a/test/CodeGen/MBlaze/brind.ll
+++ /dev/null
@@ -1,72 +0,0 @@
-; Ensure that the select instruction is supported and is lowered to
-; some sort of branch instruction.
-;
-; RUN: llc < %s -march=mblaze -mattr=+mul,+fpu,+barrel | FileCheck %s
-
-declare i32 @printf(i8*, ...)
-@MSG = internal constant [13 x i8] c"Message: %d\0A\00"
-
-@BLKS = private constant [5 x i8*]
- [ i8* blockaddress(@brind, %L1),
- i8* blockaddress(@brind, %L2),
- i8* blockaddress(@brind, %L3),
- i8* blockaddress(@brind, %L4),
- i8* blockaddress(@brind, %L5) ]
-
-define i32 @brind(i32 %a, i32 %b)
-{
- ; CHECK-LABEL: brind:
-entry:
- br label %loop
-
-loop:
- %tmp.0 = phi i32 [ 0, %entry ], [ %tmp.8, %finish ]
- %dst.0 = getelementptr [5 x i8*]* @BLKS, i32 0, i32 %tmp.0
- %dst.1 = load i8** %dst.0
- indirectbr i8* %dst.1, [ label %L1,
- label %L2,
- label %L3,
- label %L4,
- label %L5 ]
- ; CHECK: brad {{r[0-9]*}}
-
-L1:
- %tmp.1 = add i32 %a, %b
- br label %finish
- ; CHECK: brid
-
-L2:
- %tmp.2 = sub i32 %a, %b
- br label %finish
- ; CHECK: brid
-
-L3:
- %tmp.3 = mul i32 %a, %b
- br label %finish
- ; CHECK: brid
-
-L4:
- %tmp.4 = sdiv i32 %a, %b
- br label %finish
- ; CHECK: brid
-
-L5:
- %tmp.5 = srem i32 %a, %b
- br label %finish
-
-finish:
- %tmp.6 = phi i32 [ %tmp.1, %L1 ],
- [ %tmp.2, %L2 ],
- [ %tmp.3, %L3 ],
- [ %tmp.4, %L4 ],
- [ %tmp.5, %L5 ]
-
- call i32 (i8*,...)* @printf( i8* getelementptr([13 x i8]* @MSG,i32 0,i32 0),
- i32 %tmp.6)
-
- %tmp.7 = add i32 %tmp.0, 1
- %tmp.8 = urem i32 %tmp.7, 5
-
- br label %loop
- ; CHECK: brad {{r[0-9]*}}
-}
diff --git a/test/CodeGen/MBlaze/callind.ll b/test/CodeGen/MBlaze/callind.ll
deleted file mode 100644
index 8265a6ed3a..0000000000
--- a/test/CodeGen/MBlaze/callind.ll
+++ /dev/null
@@ -1,80 +0,0 @@
-; Ensure that indirect calls work and that they are lowered to some
-; sort of branch and link instruction.
-;
-; RUN: llc < %s -march=mblaze -mattr=+mul,+fpu,+barrel | FileCheck %s
-
-declare i32 @printf(i8*, ...)
-@MSG = internal constant [13 x i8] c"Message: %d\0A\00"
-
-@FUNS = private constant [5 x i32 (i32,i32)*]
- [ i32 (i32,i32)* @doadd,
- i32 (i32,i32)* @dosub,
- i32 (i32,i32)* @domul,
- i32 (i32,i32)* @dodiv,
- i32 (i32,i32)* @dorem ]
-
-define i32 @doadd(i32 %a, i32 %b)
-{
- ; CHECK-LABEL: doadd:
- %tmp.0 = add i32 %a, %b
- ret i32 %tmp.0
- ; CHECK: rtsd
-}
-
-define i32 @dosub(i32 %a, i32 %b)
-{
- ; CHECK-LABEL: dosub:
- %tmp.0 = sub i32 %a, %b
- ret i32 %tmp.0
- ; CHECK: rtsd
-}
-
-define i32 @domul(i32 %a, i32 %b)
-{
- ; CHECK-LABEL: domul:
- %tmp.0 = mul i32 %a, %b
- ret i32 %tmp.0
- ; CHECK: rtsd
-}
-
-define i32 @dodiv(i32 %a, i32 %b)
-{
- ; CHECK-LABEL: dodiv:
- %tmp.0 = sdiv i32 %a, %b
- ret i32 %tmp.0
- ; CHECK: rtsd
-}
-
-define i32 @dorem(i32 %a, i32 %b)
-{
- ; CHECK-LABEL: dorem:
- %tmp.0 = srem i32 %a, %b
- ret i32 %tmp.0
- ; CHECK: rtsd
-}
-
-define i32 @callind(i32 %a, i32 %b)
-{
- ; CHECK-LABEL: callind:
-entry:
- br label %loop
-
-loop:
- %tmp.0 = phi i32 [ 0, %entry ], [ %tmp.3, %loop ]
- %dst.0 = getelementptr [5 x i32 (i32,i32)*]* @FUNS, i32 0, i32 %tmp.0
- %dst.1 = load i32 (i32,i32)** %dst.0
- %tmp.1 = call i32 %dst.1(i32 %a, i32 %b)
- ; CHECK-NOT: brli
- ; CHECK-NOT: brlai
- ; CHECK: brl
-
- call i32 (i8*,...)* @printf( i8* getelementptr([13 x i8]* @MSG,i32 0,i32 0),
- i32 %tmp.1)
- ; CHECK: brl
-
- %tmp.2 = add i32 %tmp.0, 1
- %tmp.3 = urem i32 %tmp.2, 5
-
- br label %loop
- ; CHECK: br
-}
diff --git a/test/CodeGen/MBlaze/cc.ll b/test/CodeGen/MBlaze/cc.ll
deleted file mode 100644
index e12f3b42d4..0000000000
--- a/test/CodeGen/MBlaze/cc.ll
+++ /dev/null
@@ -1,266 +0,0 @@
-; Test some of the calling convention lowering done by the MBlaze backend.
-; We test that integer values are passed in the correct registers and
-; returned in the correct registers. Additionally, we test that the stack
-; is used as appropriate for passing arguments that cannot be placed into
-; registers.
-;
-; RUN: llc < %s -march=mblaze | FileCheck %s
-
-declare i32 @printf(i8*, ...)
-@MSG = internal constant [13 x i8] c"Message: %d\0A\00"
-
-define void @params0_noret() {
- ; CHECK-LABEL: params0_noret:
- ret void
- ; CHECK-NOT: {{.* r3, .*, .*}}
- ; CHECK-NOT: {{.* r4, .*, .*}}
- ; CHECK: rtsd
-}
-
-define i8 @params0_8bitret() {
- ; CHECK-LABEL: params0_8bitret:
- ret i8 1
- ; CHECK-NOT: {{.* r3, .*, .*}}
- ; CHECK-NOT: {{.* r4, .*, .*}}
- ; CHECK: rtsd
- ; CHECK: {{.* r3, r0, 1}}
-}
-
-define i16 @params0_16bitret() {
- ; CHECK-LABEL: params0_16bitret:
- ret i16 1
- ; CHECK: rtsd
- ; CHECK: {{.* r3, r0, 1}}
- ; CHECK-NOT: {{.* r4, .*, .*}}
-}
-
-define i32 @params0_32bitret() {
- ; CHECK-LABEL: params0_32bitret:
- ret i32 1
- ; CHECK-NOT: {{.* r4, .*, .*}}
- ; CHECK: rtsd
- ; CHECK: {{.* r3, r0, 1}}
-}
-
-define i64 @params0_64bitret() {
- ; CHECK-LABEL: params0_64bitret:
- ret i64 1
- ; CHECK: {{.* r3, r0, .*}}
- ; CHECK: rtsd
- ; CHECK: {{.* r4, r0, 1}}
-}
-
-define i32 @params1_32bitret(i32 %a) {
- ; CHECK-LABEL: params1_32bitret:
- ret i32 %a
- ; CHECK-NOT: {{.* r3, .*, .*}}
- ; CHECK-NOT: {{.* r4, .*, .*}}
- ; CHECK: rtsd
- ; CHECK: {{.* r3, r5, r0}}
-}
-
-define i32 @params2_32bitret(i32 %a, i32 %b) {
- ; CHECK-LABEL: params2_32bitret:
- ret i32 %b
- ; CHECK-NOT: {{.* r3, .*, .*}}
- ; CHECK-NOT: {{.* r4, .*, .*}}
- ; CHECK: rtsd
- ; CHECK: {{.* r3, r6, r0}}
-}
-
-define i32 @params3_32bitret(i32 %a, i32 %b, i32 %c) {
- ; CHECK-LABEL: params3_32bitret:
- ret i32 %c
- ; CHECK-NOT: {{.* r3, .*, .*}}
- ; CHECK-NOT: {{.* r4, .*, .*}}
- ; CHECK: rtsd
- ; CHECK: {{.* r3, r7, r0}}
-}
-
-define i32 @params4_32bitret(i32 %a, i32 %b, i32 %c, i32 %d) {
- ; CHECK-LABEL: params4_32bitret:
- ret i32 %d
- ; CHECK-NOT: {{.* r3, .*, .*}}
- ; CHECK-NOT: {{.* r4, .*, .*}}
- ; CHECK: rtsd
- ; CHECK: {{.* r3, r8, r0}}
-}
-
-define i32 @params5_32bitret(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e) {
- ; CHECK-LABEL: params5_32bitret:
- ret i32 %e
- ; CHECK-NOT: {{.* r3, .*, .*}}
- ; CHECK-NOT: {{.* r4, .*, .*}}
- ; CHECK: rtsd
- ; CHECK: {{.* r3, r9, r0}}
-}
-
-define i32 @params6_32bitret(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f) {
- ; CHECK-LABEL: params6_32bitret:
- ret i32 %f
- ; CHECK-NOT: {{.* r3, .*, .*}}
- ; CHECK-NOT: {{.* r4, .*, .*}}
- ; CHECK: rtsd
- ; CHECK: {{.* r3, r10, r0}}
-}
-
-define i32 @params7_32bitret(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f,
- i32 %g) {
- ; CHECK-LABEL: params7_32bitret:
- ret i32 %g
- ; CHECK: {{lwi? r3, r1, 32}}
- ; CHECK-NOT: {{.* r4, .*, .*}}
- ; CHECK: rtsd
-}
-
-define i32 @params8_32bitret(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f,
- i32 %g, i32 %h) {
- ; CHECK-LABEL: params8_32bitret:
- ret i32 %h
- ; CHECK: {{lwi? r3, r1, 36}}
- ; CHECK-NOT: {{.* r4, .*, .*}}
- ; CHECK: rtsd
-}
-
-define i32 @params9_32bitret(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f,
- i32 %g, i32 %h, i32 %i) {
- ; CHECK-LABEL: params9_32bitret:
- ret i32 %i
- ; CHECK: {{lwi? r3, r1, 40}}
- ; CHECK-NOT: {{.* r4, .*, .*}}
- ; CHECK: rtsd
-}
-
-define i32 @params10_32bitret(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f,
- i32 %g, i32 %h, i32 %i, i32 %j) {
- ; CHECK-LABEL: params10_32bitret:
- ret i32 %j
- ; CHECK: {{lwi? r3, r1, 44}}
- ; CHECK-NOT: {{.* r4, .*, .*}}
- ; CHECK: rtsd
-}
-
-define void @testing() {
- %MSG.1 = getelementptr [13 x i8]* @MSG, i32 0, i32 0
-
- call void @params0_noret()
- ; CHECK: brlid
-
- %tmp.1 = call i8 @params0_8bitret()
- ; CHECK: brlid
- call i32 (i8*,...)* @printf(i8* %MSG.1, i8 %tmp.1)
-
- %tmp.2 = call i16 @params0_16bitret()
- ; CHECK: brlid
- call i32 (i8*,...)* @printf(i8* %MSG.1, i16 %tmp.2)
-
- %tmp.3 = call i32 @params0_32bitret()
- ; CHECK: brlid
- call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.3)
-
- %tmp.4 = call i64 @params0_64bitret()
- ; CHECK: brlid
- call i32 (i8*,...)* @printf(i8* %MSG.1, i64 %tmp.4)
-
- %tmp.5 = call i32 @params1_32bitret(i32 1)
- ; CHECK: {{.* r5, .*, .*}}
- ; CHECK: brlid
- call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.5)
-
- %tmp.6 = call i32 @params2_32bitret(i32 1, i32 2)
- ; CHECK: {{.* r5, .*, .*}}
- ; CHECK: {{.* r6, .*, .*}}
- ; CHECK: brlid
- call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.6)
-
- %tmp.7 = call i32 @params3_32bitret(i32 1, i32 2, i32 3)
- ; CHECK: {{.* r5, .*, .*}}
- ; CHECK: {{.* r6, .*, .*}}
- ; CHECK: {{.* r7, .*, .*}}
- ; CHECK: brlid
- call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.7)
-
- %tmp.8 = call i32 @params4_32bitret(i32 1, i32 2, i32 3, i32 4)
- ; CHECK: {{.* r5, .*, .*}}
- ; CHECK: {{.* r6, .*, .*}}
- ; CHECK: {{.* r7, .*, .*}}
- ; CHECK: {{.* r8, .*, .*}}
- ; CHECK: brlid
- call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.8)
-
- %tmp.9 = call i32 @params5_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5)
- ; CHECK: {{.* r5, .*, .*}}
- ; CHECK: {{.* r6, .*, .*}}
- ; CHECK: {{.* r7, .*, .*}}
- ; CHECK: {{.* r8, .*, .*}}
- ; CHECK: {{.* r9, .*, .*}}
- ; CHECK: brlid
- call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.9)
-
- %tmp.10 = call i32 @params6_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5,
- i32 6)
- ; CHECK: {{.* r5, .*, .*}}
- ; CHECK: {{.* r6, .*, .*}}
- ; CHECK: {{.* r7, .*, .*}}
- ; CHECK: {{.* r8, .*, .*}}
- ; CHECK: {{.* r9, .*, .*}}
- ; CHECK: {{.* r10, .*, .*}}
- ; CHECK: brlid
- call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.10)
-
- %tmp.11 = call i32 @params7_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5,
- i32 6, i32 7)
- ; CHECK: {{swi? .*, r1, 28}}
- ; CHECK: {{.* r5, .*, .*}}
- ; CHECK: {{.* r6, .*, .*}}
- ; CHECK: {{.* r7, .*, .*}}
- ; CHECK: {{.* r8, .*, .*}}
- ; CHECK: {{.* r9, .*, .*}}
- ; CHECK: {{.* r10, .*, .*}}
- ; CHECK: brlid
- call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.11)
-
- %tmp.12 = call i32 @params8_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5,
- i32 6, i32 7, i32 8)
- ; CHECK: {{swi? .*, r1, 32}}
- ; CHECK: {{swi? .*, r1, 28}}
- ; CHECK: {{.* r5, .*, .*}}
- ; CHECK: {{.* r6, .*, .*}}
- ; CHECK: {{.* r7, .*, .*}}
- ; CHECK: {{.* r8, .*, .*}}
- ; CHECK: {{.* r9, .*, .*}}
- ; CHECK: {{.* r10, .*, .*}}
- ; CHECK: brlid
- call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.12)
-
- %tmp.13 = call i32 @params9_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5,
- i32 6, i32 7, i32 8, i32 9)
- ; CHECK: {{swi? .*, r1, 36}}
- ; CHECK: {{swi? .*, r1, 32}}
- ; CHECK: {{swi? .*, r1, 28}}
- ; CHECK: {{.* r5, .*, .*}}
- ; CHECK: {{.* r6, .*, .*}}
- ; CHECK: {{.* r7, .*, .*}}
- ; CHECK: {{.* r8, .*, .*}}
- ; CHECK: {{.* r9, .*, .*}}
- ; CHECK: {{.* r10, .*, .*}}
- ; CHECK: brlid
- call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.13)
-
- %tmp.14 = call i32 @params10_32bitret(i32 1, i32 2, i32 3, i32 4, i32 5,
- i32 6, i32 7, i32 8, i32 9, i32 10)
- ; CHECK: {{swi? .*, r1, 40}}
- ; CHECK: {{swi? .*, r1, 36}}
- ; CHECK: {{swi? .*, r1, 32}}
- ; CHECK: {{swi? .*, r1, 28}}
- ; CHECK: {{.* r5, .*, .*}}
- ; CHECK: {{.* r6, .*, .*}}
- ; CHECK: {{.* r7, .*, .*}}
- ; CHECK: {{.* r8, .*, .*}}
- ; CHECK: {{.* r9, .*, .*}}
- ; CHECK: {{.* r10, .*, .*}}
- ; CHECK: brlid
- call i32 (i8*,...)* @printf(i8* %MSG.1, i32 %tmp.14)
-
- ret void
-}
diff --git a/test/CodeGen/MBlaze/div.ll b/test/CodeGen/MBlaze/div.ll
deleted file mode 100644
index 60753aa805..0000000000
--- a/test/CodeGen/MBlaze/div.ll
+++ /dev/null
@@ -1,75 +0,0 @@
-; Ensure that multiplication is lowered to function calls when the multiplier
-; unit is not available in the hardware and that function calls are not used
-; when the multiplier unit is available in the hardware.
-;
-; RUN: llc < %s -march=mblaze | FileCheck -check-prefix=FUN %s
-; RUN: llc < %s -march=mblaze -mattr=+div | FileCheck -check-prefix=DIV %s
-
-define i8 @test_i8(i8 %a, i8 %b) {
- ; FUN-LABEL: test_i8:
- ; DIV-LABEL: test_i8:
-
- %tmp.1 = udiv i8 %a, %b
- ; FUN-NOT: idiv
- ; FUN: brlid
- ; DIV-NOT: brlid
- ; DIV: idiv
-
- %tmp.2 = sdiv i8 %a, %b
- ; FUN-NOT: idiv
- ; FUN: brlid
- ; DIV-NOT: brlid
- ; DIV-NOT: idiv
- ; DIV: idivu
-
- %tmp.3 = add i8 %tmp.1, %tmp.2
- ret i8 %tmp.3
- ; FUN: rtsd
- ; DIV: rtsd
-}
-
-define i16 @test_i16(i16 %a, i16 %b) {
- ; FUN-LABEL: test_i16:
- ; DIV-LABEL: test_i16:
-
- %tmp.1 = udiv i16 %a, %b
- ; FUN-NOT: idiv
- ; FUN: brlid
- ; DIV-NOT: brlid
- ; DIV: idiv
-
- %tmp.2 = sdiv i16 %a, %b
- ; FUN-NOT: idiv
- ; FUN: brlid
- ; DIV-NOT: brlid
- ; DIV-NOT: idiv
- ; DIV: idivu
-
- %tmp.3 = add i16 %tmp.1, %tmp.2
- ret i16 %tmp.3
- ; FUN: rtsd
- ; DIV: rtsd
-}
-
-define i32 @test_i32(i32 %a, i32 %b) {
- ; FUN-LABEL: test_i32:
- ; DIV-LABEL: test_i32:
-
- %tmp.1 = udiv i32 %a, %b
- ; FUN-NOT: idiv
- ; FUN: brlid
- ; DIV-NOT: brlid
- ; DIV: idiv
-
- %tmp.2 = sdiv i32 %a, %b
- ; FUN-NOT: idiv
- ; FUN: brlid
- ; DIV-NOT: brlid
- ; DIV-NOT: idiv
- ; DIV: idivu
-
- %tmp.3 = add i32 %tmp.1, %tmp.2
- ret i32 %tmp.3
- ; FUN: rtsd
- ; DIV: rtsd
-}
diff --git a/test/CodeGen/MBlaze/fpu.ll b/test/CodeGen/MBlaze/fpu.ll
deleted file mode 100644
index 5078d7d051..0000000000
--- a/test/CodeGen/MBlaze/fpu.ll
+++ /dev/null
@@ -1,66 +0,0 @@
-; Ensure that floating point operations are lowered to function calls when the
-; FPU is not available in the hardware and that function calls are not used
-; when the FPU is available in the hardware.
-;
-; RUN: llc < %s -march=mblaze | FileCheck -check-prefix=FUN %s
-; RUN: llc < %s -march=mblaze -mattr=+fpu | FileCheck -check-prefix=FPU %s
-
-define float @test_add(float %a, float %b) {
- ; FUN-LABEL: test_add:
- ; FPU-LABEL: test_add:
-
- %tmp.1 = fadd float %a, %b
- ; FUN: brlid
- ; FPU-NOT: brlid
-
- ret float %tmp.1
- ; FUN: rtsd
- ; FPU: rtsd
- ; FUN-NOT: fadd
- ; FPU-NEXT: fadd
-}
-
-define float @test_sub(float %a, float %b) {
- ; FUN-LABEL: test_sub:
- ; FPU-LABEL: test_sub:
-
- %tmp.1 = fsub float %a, %b
- ; FUN: brlid
- ; FPU-NOT: brlid
-
- ret float %tmp.1
- ; FUN: rtsd
- ; FPU: rtsd
- ; FUN-NOT: frsub
- ; FPU-NEXT: frsub
-}
-
-define float @test_mul(float %a, float %b) {
- ; FUN-LABEL: test_mul:
- ; FPU-LABEL: test_mul:
-
- %tmp.1 = fmul float %a, %b
- ; FUN: brlid
- ; FPU-NOT: brlid
-
- ret float %tmp.1
- ; FUN: rtsd
- ; FPU: rtsd
- ; FUN-NOT: fmul
- ; FPU-NEXT: fmul
-}
-
-define float @test_div(float %a, float %b) {
- ; FUN-LABEL: test_div:
- ; FPU-LABEL: test_div:
-
- %tmp.1 = fdiv float %a, %b
- ; FUN: brlid
- ; FPU-NOT: brlid
-
- ret float %tmp.1
- ; FUN: rtsd
- ; FPU: rtsd
- ; FUN-NOT: fdiv
- ; FPU-NEXT: fdiv
-}
diff --git a/test/CodeGen/MBlaze/fsl.ll b/test/CodeGen/MBlaze/fsl.ll
deleted file mode 100644
index 936e6cfed6..0000000000
--- a/test/CodeGen/MBlaze/fsl.ll
+++ /dev/null
@@ -1,319 +0,0 @@
-; Ensure that the FSL instrinsic instruction generate single FSL instructions
-; at the machine level. Additionally, ensure that dynamic values use the
-; dynamic version of the instructions and that constant values use the
-; constant version of the instructions.
-;
-; RUN: llc -O3 < %s -march=mblaze | FileCheck %s
-
-declare i32 @llvm.mblaze.fsl.get(i32 %port)
-declare i32 @llvm.mblaze.fsl.aget(i32 %port)
-declare i32 @llvm.mblaze.fsl.cget(i32 %port)
-declare i32 @llvm.mblaze.fsl.caget(i32 %port)
-declare i32 @llvm.mblaze.fsl.eget(i32 %port)
-declare i32 @llvm.mblaze.fsl.eaget(i32 %port)
-declare i32 @llvm.mblaze.fsl.ecget(i32 %port)
-declare i32 @llvm.mblaze.fsl.ecaget(i32 %port)
-declare i32 @llvm.mblaze.fsl.nget(i32 %port)
-declare i32 @llvm.mblaze.fsl.naget(i32 %port)
-declare i32 @llvm.mblaze.fsl.ncget(i32 %port)
-declare i32 @llvm.mblaze.fsl.ncaget(i32 %port)
-declare i32 @llvm.mblaze.fsl.neget(i32 %port)
-declare i32 @llvm.mblaze.fsl.neaget(i32 %port)
-declare i32 @llvm.mblaze.fsl.necget(i32 %port)
-declare i32 @llvm.mblaze.fsl.necaget(i32 %port)
-declare i32 @llvm.mblaze.fsl.tget(i32 %port)
-declare i32 @llvm.mblaze.fsl.taget(i32 %port)
-declare i32 @llvm.mblaze.fsl.tcget(i32 %port)
-declare i32 @llvm.mblaze.fsl.tcaget(i32 %port)
-declare i32 @llvm.mblaze.fsl.teget(i32 %port)
-declare i32 @llvm.mblaze.fsl.teaget(i32 %port)
-declare i32 @llvm.mblaze.fsl.tecget(i32 %port)
-declare i32 @llvm.mblaze.fsl.tecaget(i32 %port)
-declare i32 @llvm.mblaze.fsl.tnget(i32 %port)
-declare i32 @llvm.mblaze.fsl.tnaget(i32 %port)
-declare i32 @llvm.mblaze.fsl.tncget(i32 %port)
-declare i32 @llvm.mblaze.fsl.tncaget(i32 %port)
-declare i32 @llvm.mblaze.fsl.tneget(i32 %port)
-declare i32 @llvm.mblaze.fsl.tneaget(i32 %port)
-declare i32 @llvm.mblaze.fsl.tnecget(i32 %port)
-declare i32 @llvm.mblaze.fsl.tnecaget(i32 %port)
-
-declare void @llvm.mblaze.fsl.put(i32 %value, i32 %port)
-declare void @llvm.mblaze.fsl.aput(i32 %value, i32 %port)
-declare void @llvm.mblaze.fsl.cput(i32 %value, i32 %port)
-declare void @llvm.mblaze.fsl.caput(i32 %value, i32 %port)
-declare void @llvm.mblaze.fsl.nput(i32 %value, i32 %port)
-declare void @llvm.mblaze.fsl.naput(i32 %value, i32 %port)
-declare void @llvm.mblaze.fsl.ncput(i32 %value, i32 %port)
-declare void @llvm.mblaze.fsl.ncaput(i32 %value, i32 %port)
-declare void @llvm.mblaze.fsl.tput(i32 %port)
-declare void @llvm.mblaze.fsl.taput(i32 %port)
-declare void @llvm.mblaze.fsl.tcput(i32 %port)
-declare void @llvm.mblaze.fsl.tcaput(i32 %port)
-declare void @llvm.mblaze.fsl.tnput(i32 %port)
-declare void @llvm.mblaze.fsl.tnaput(i32 %port)
-declare void @llvm.mblaze.fsl.tncput(i32 %port)
-declare void @llvm.mblaze.fsl.tncaput(i32 %port)
-
-define void @fsl_get(i32 %port) {
- ; CHECK-LABEL: fsl_get:
- %v0 = call i32 @llvm.mblaze.fsl.get(i32 %port)
- ; CHECK: getd
- %v1 = call i32 @llvm.mblaze.fsl.aget(i32 %port)
- ; CHECK-NEXT: agetd
- %v2 = call i32 @llvm.mblaze.fsl.cget(i32 %port)
- ; CHECK-NEXT: cgetd
- %v3 = call i32 @llvm.mblaze.fsl.caget(i32 %port)
- ; CHECK-NEXT: cagetd
- %v4 = call i32 @llvm.mblaze.fsl.eget(i32 %port)
- ; CHECK-NEXT: egetd
- %v5 = call i32 @llvm.mblaze.fsl.eaget(i32 %port)
- ; CHECK-NEXT: eagetd
- %v6 = call i32 @llvm.mblaze.fsl.ecget(i32 %port)
- ; CHECK-NEXT: ecgetd
- %v7 = call i32 @llvm.mblaze.fsl.ecaget(i32 %port)
- ; CHECK-NEXT: ecagetd
- %v8 = call i32 @llvm.mblaze.fsl.nget(i32 %port)
- ; CHECK-NEXT: ngetd
- %v9 = call i32 @llvm.mblaze.fsl.naget(i32 %port)
- ; CHECK-NEXT: nagetd
- %v10 = call i32 @llvm.mblaze.fsl.ncget(i32 %port)
- ; CHECK-NEXT: ncgetd
- %v11 = call i32 @llvm.mblaze.fsl.ncaget(i32 %port)
- ; CHECK-NEXT: ncagetd
- %v12 = call i32 @llvm.mblaze.fsl.neget(i32 %port)
- ; CHECK-NEXT: negetd
- %v13 = call i32 @llvm.mblaze.fsl.neaget(i32 %port)
- ; CHECK-NEXT: neagetd
- %v14 = call i32 @llvm.mblaze.fsl.necget(i32 %port)
- ; CHECK-NEXT: necgetd
- %v15 = call i32 @llvm.mblaze.fsl.necaget(i32 %port)
- ; CHECK-NEXT: necagetd
- %v16 = call i32 @llvm.mblaze.fsl.tget(i32 %port)
- ; CHECK-NEXT: tgetd
- %v17 = call i32 @llvm.mblaze.fsl.taget(i32 %port)
- ; CHECK-NEXT: tagetd
- %v18 = call i32 @llvm.mblaze.fsl.tcget(i32 %port)
- ; CHECK-NEXT: tcgetd
- %v19 = call i32 @llvm.mblaze.fsl.tcaget(i32 %port)
- ; CHECK-NEXT: tcagetd
- %v20 = call i32 @llvm.mblaze.fsl.teget(i32 %port)
- ; CHECK-NEXT: tegetd
- %v21 = call i32 @llvm.mblaze.fsl.teaget(i32 %port)
- ; CHECK-NEXT: teagetd
- %v22 = call i32 @llvm.mblaze.fsl.tecget(i32 %port)
- ; CHECK-NEXT: tecgetd
- %v23 = call i32 @llvm.mblaze.fsl.tecaget(i32 %port)
- ; CHECK-NEXT: tecagetd
- %v24 = call i32 @llvm.mblaze.fsl.tnget(i32 %port)
- ; CHECK-NEXT: tngetd
- %v25 = call i32 @llvm.mblaze.fsl.tnaget(i32 %port)
- ; CHECK-NEXT: tnagetd
- %v26 = call i32 @llvm.mblaze.fsl.tncget(i32 %port)
- ; CHECK-NEXT: tncgetd
- %v27 = call i32 @llvm.mblaze.fsl.tncaget(i32 %port)
- ; CHECK-NEXT: tncagetd
- %v28 = call i32 @llvm.mblaze.fsl.tneget(i32 %port)
- ; CHECK-NEXT: tnegetd
- %v29 = call i32 @llvm.mblaze.fsl.tneaget(i32 %port)
- ; CHECK-NEXT: tneagetd
- %v30 = call i32 @llvm.mblaze.fsl.tnecget(i32 %port)
- ; CHECK-NEXT: tnecgetd
- %v31 = call i32 @llvm.mblaze.fsl.tnecaget(i32 %port)
- ; CHECK-NEXT: tnecagetd
- ret void
- ; CHECK: rtsd
-}
-
-define void @fslc_get() {
- ; CHECK-LABEL: fslc_get:
- %v0 = call i32 @llvm.mblaze.fsl.get(i32 1)
- ; CHECK: get
- %v1 = call i32 @llvm.mblaze.fsl.aget(i32 1)
- ; CHECK-NOT: agetd
- ; CHECK: aget
- %v2 = call i32 @llvm.mblaze.fsl.cget(i32 1)
- ; CHECK-NOT: cgetd
- ; CHECK: cget
- %v3 = call i32 @llvm.mblaze.fsl.caget(i32 1)
- ; CHECK-NOT: cagetd
- ; CHECK: caget
- %v4 = call i32 @llvm.mblaze.fsl.eget(i32 1)
- ; CHECK-NOT: egetd
- ; CHECK: eget
- %v5 = call i32 @llvm.mblaze.fsl.eaget(i32 1)
- ; CHECK-NOT: eagetd
- ; CHECK: eaget
- %v6 = call i32 @llvm.mblaze.fsl.ecget(i32 1)
- ; CHECK-NOT: ecgetd
- ; CHECK: ecget
- %v7 = call i32 @llvm.mblaze.fsl.ecaget(i32 1)
- ; CHECK-NOT: ecagetd
- ; CHECK: ecaget
- %v8 = call i32 @llvm.mblaze.fsl.nget(i32 1)
- ; CHECK-NOT: ngetd
- ; CHECK: nget
- %v9 = call i32 @llvm.mblaze.fsl.naget(i32 1)
- ; CHECK-NOT: nagetd
- ; CHECK: naget
- %v10 = call i32 @llvm.mblaze.fsl.ncget(i32 1)
- ; CHECK-NOT: ncgetd
- ; CHECK: ncget
- %v11 = call i32 @llvm.mblaze.fsl.ncaget(i32 1)
- ; CHECK-NOT: ncagetd
- ; CHECK: ncaget
- %v12 = call i32 @llvm.mblaze.fsl.neget(i32 1)
- ; CHECK-NOT: negetd
- ; CHECK: neget
- %v13 = call i32 @llvm.mblaze.fsl.neaget(i32 1)
- ; CHECK-NOT: neagetd
- ; CHECK: neaget
- %v14 = call i32 @llvm.mblaze.fsl.necget(i32 1)
- ; CHECK-NOT: necgetd
- ; CHECK: necget
- %v15 = call i32 @llvm.mblaze.fsl.necaget(i32 1)
- ; CHECK-NOT: necagetd
- ; CHECK: necaget
- %v16 = call i32 @llvm.mblaze.fsl.tget(i32 1)
- ; CHECK-NOT: tgetd
- ; CHECK: tget
- %v17 = call i32 @llvm.mblaze.fsl.taget(i32 1)
- ; CHECK-NOT: tagetd
- ; CHECK: taget
- %v18 = call i32 @llvm.mblaze.fsl.tcget(i32 1)
- ; CHECK-NOT: tcgetd
- ; CHECK: tcget
- %v19 = call i32 @llvm.mblaze.fsl.tcaget(i32 1)
- ; CHECK-NOT: tcagetd
- ; CHECK: tcaget
- %v20 = call i32 @llvm.mblaze.fsl.teget(i32 1)
- ; CHECK-NOT: tegetd
- ; CHECK: teget
- %v21 = call i32 @llvm.mblaze.fsl.teaget(i32 1)
- ; CHECK-NOT: teagetd
- ; CHECK: teaget
- %v22 = call i32 @llvm.mblaze.fsl.tecget(i32 1)
- ; CHECK-NOT: tecgetd
- ; CHECK: tecget
- %v23 = call i32 @llvm.mblaze.fsl.tecaget(i32 1)
- ; CHECK-NOT: tecagetd
- ; CHECK: tecaget
- %v24 = call i32 @llvm.mblaze.fsl.tnget(i32 1)
- ; CHECK-NOT: tngetd
- ; CHECK: tnget
- %v25 = call i32 @llvm.mblaze.fsl.tnaget(i32 1)
- ; CHECK-NOT: tnagetd
- ; CHECK: tnaget
- %v26 = call i32 @llvm.mblaze.fsl.tncget(i32 1)
- ; CHECK-NOT: tncgetd
- ; CHECK: tncget
- %v27 = call i32 @llvm.mblaze.fsl.tncaget(i32 1)
- ; CHECK-NOT: tncagetd
- ; CHECK: tncaget
- %v28 = call i32 @llvm.mblaze.fsl.tneget(i32 1)
- ; CHECK-NOT: tnegetd
- ; CHECK: tneget
- %v29 = call i32 @llvm.mblaze.fsl.tneaget(i32 1)
- ; CHECK-NOT: tneagetd
- ; CHECK: tneaget
- %v30 = call i32 @llvm.mblaze.fsl.tnecget(i32 1)
- ; CHECK-NOT: tnecgetd
- ; CHECK: tnecget
- %v31 = call i32 @llvm.mblaze.fsl.tnecaget(i32 1)
- ; CHECK-NOT: tnecagetd
- ; CHECK: tnecaget
- ret void
- ; CHECK: rtsd
-}
-
-define void @putfsl(i32 %value, i32 %port) {
- ; CHECK-LABEL: putfsl:
- call void @llvm.mblaze.fsl.put(i32 %value, i32 %port)
- ; CHECK: putd
- call void @llvm.mblaze.fsl.aput(i32 %value, i32 %port)
- ; CHECK-NEXT: aputd
- call void @llvm.mblaze.fsl.cput(i32 %value, i32 %port)
- ; CHECK-NEXT: cputd
- call void @llvm.mblaze.fsl.caput(i32 %value, i32 %port)
- ; CHECK-NEXT: caputd
- call void @llvm.mblaze.fsl.nput(i32 %value, i32 %port)
- ; CHECK-NEXT: nputd
- call void @llvm.mblaze.fsl.naput(i32 %value, i32 %port)
- ; CHECK-NEXT: naputd
- call void @llvm.mblaze.fsl.ncput(i32 %value, i32 %port)
- ; CHECK-NEXT: ncputd
- call void @llvm.mblaze.fsl.ncaput(i32 %value, i32 %port)
- ; CHECK-NEXT: ncaputd
- call void @llvm.mblaze.fsl.tput(i32 %port)
- ; CHECK-NEXT: tputd
- call void @llvm.mblaze.fsl.taput(i32 %port)
- ; CHECK-NEXT: taputd
- call void @llvm.mblaze.fsl.tcput(i32 %port)
- ; CHECK-NEXT: tcputd
- call void @llvm.mblaze.fsl.tcaput(i32 %port)
- ; CHECK-NEXT: tcaputd
- call void @llvm.mblaze.fsl.tnput(i32 %port)
- ; CHECK-NEXT: tnputd
- call void @llvm.mblaze.fsl.tnaput(i32 %port)
- ; CHECK-NEXT: tnaputd
- call void @llvm.mblaze.fsl.tncput(i32 %port)
- ; CHECK-NEXT: tncputd
- call void @llvm.mblaze.fsl.tncaput(i32 %port)
- ; CHECK-NEXT: tncaputd
- ret void
- ; CHECK: rtsd
-}
-
-define void @putfsl_const(i32 %value) {
- ; CHECK-LABEL: putfsl_const:
- call void @llvm.mblaze.fsl.put(i32 %value, i32 1)
- ; CHECK-NOT: putd
- ; CHECK: put
- call void @llvm.mblaze.fsl.aput(i32 %value, i32 1)
- ; CHECK-NOT: aputd
- ; CHECK: aput
- call void @llvm.mblaze.fsl.cput(i32 %value, i32 1)
- ; CHECK-NOT: cputd
- ; CHECK: cput
- call void @llvm.mblaze.fsl.caput(i32 %value, i32 1)
- ; CHECK-NOT: caputd
- ; CHECK: caput
- call void @llvm.mblaze.fsl.nput(i32 %value, i32 1)
- ; CHECK-NOT: nputd
- ; CHECK: nput
- call void @llvm.mblaze.fsl.naput(i32 %value, i32 1)
- ; CHECK-NOT: naputd
- ; CHECK: naput
- call void @llvm.mblaze.fsl.ncput(i32 %value, i32 1)
- ; CHECK-NOT: ncputd
- ; CHECK: ncput
- call void @llvm.mblaze.fsl.ncaput(i32 %value, i32 1)
- ; CHECK-NOT: ncaputd
- ; CHECK: ncaput
- call void @llvm.mblaze.fsl.tput(i32 1)
- ; CHECK-NOT: tputd
- ; CHECK: tput
- call void @llvm.mblaze.fsl.taput(i32 1)
- ; CHECK-NOT: taputd
- ; CHECK: taput
- call void @llvm.mblaze.fsl.tcput(i32 1)
- ; CHECK-NOT: tcputd
- ; CHECK: tcput
- call void @llvm.mblaze.fsl.tcaput(i32 1)
- ; CHECK-NOT: tcaputd
- ; CHECK: tcaput
- call void @llvm.mblaze.fsl.tnput(i32 1)
- ; CHECK-NOT: tnputd
- ; CHECK: tnput
- call void @llvm.mblaze.fsl.tnaput(i32 1)
- ; CHECK-NOT: tnaputd
- ; CHECK: tnaput
- call void @llvm.mblaze.fsl.tncput(i32 1)
- ; CHECK-NOT: tncputd
- ; CHECK: tncput
- call void @llvm.mblaze.fsl.tncaput(i32 1)
- ; CHECK-NOT: tncaputd
- ; CHECK: tncaput
- ret void
- ; CHECK: rtsd
-}
diff --git a/test/CodeGen/MBlaze/imm.ll b/test/CodeGen/MBlaze/imm.ll
deleted file mode 100644
index 406b6593fd..0000000000
--- a/test/CodeGen/MBlaze/imm.ll
+++ /dev/null
@@ -1,70 +0,0 @@
-; Ensure that all immediate values that are 32-bits or less can be loaded
-; using a single instruction and that immediate values 64-bits or less can
-; be loaded using two instructions.
-;
-; RUN: llc < %s -march=mblaze | FileCheck %s
-; RUN: llc < %s -march=mblaze -mattr=+fpu | FileCheck -check-prefix=FPU %s
-
-define i8 @retimm_i8() {
- ; CHECK-LABEL: retimm_i8:
- ; CHECK: rtsd
- ; CHECK-NEXT: add
- ; FPU-LABEL: retimm_i8:
- ; FPU: rtsd
- ; FPU-NEXT: add
- ret i8 123
-}
-
-define i16 @retimm_i16() {
- ; CHECK-LABEL: retimm_i16:
- ; CHECK: rtsd
- ; CHECK-NEXT: add
- ; FPU-LABEL: retimm_i16:
- ; FPU: rtsd
- ; FPU-NEXT: add
- ret i16 31212
-}
-
-define i32 @retimm_i32() {
- ; CHECK-LABEL: retimm_i32:
- ; CHECK: add
- ; CHECK-NEXT: rtsd
- ; FPU-LABEL: retimm_i32:
- ; FPU: add
- ; FPU-NEXT: rtsd
- ret i32 2938128
-}
-
-define i64 @retimm_i64() {
- ; CHECK-LABEL: retimm_i64:
- ; CHECK: add
- ; CHECK-NEXT: rtsd
- ; CHECK-NEXT: add
- ; FPU-LABEL: retimm_i64:
- ; FPU: add
- ; FPU-NEXT: rtsd
- ; FPU-NEXT: add
- ret i64 94581823
-}
-
-define float @retimm_float() {
- ; CHECK-LABEL: retimm_float:
- ; CHECK: add
- ; CHECK-NEXT: rtsd
- ; FPU-LABEL: retimm_float:
- ; FPU: or
- ; FPU-NEXT: rtsd
- ret float 12.0
-}
-
-define double @retimm_double() {
- ; CHECK-LABEL: retimm_double:
- ; CHECK: add
- ; CHECK-NEXT: add
- ; CHECK-NEXT: rtsd
- ; FPU-LABEL: retimm_double:
- ; FPU: add
- ; FPU-NEXT: add
- ; FPU-NEXT: rtsd
- ret double 598382.39283873
-}
diff --git a/test/CodeGen/MBlaze/intr.ll b/test/CodeGen/MBlaze/intr.ll
deleted file mode 100644
index fb2c66e045..0000000000
--- a/test/CodeGen/MBlaze/intr.ll
+++ /dev/null
@@ -1,48 +0,0 @@
-; Ensure that the MBlaze interrupt_handler calling convention (cc73) is handled
-; correctly correctly by the MBlaze backend.
-;
-; RUN: llc < %s -march=mblaze | FileCheck %s
-
-@.str = private constant [28 x i8] c"The interrupt has gone off\0A\00"
-@_interrupt_handler = alias void ()* @myintr
-
-define cc73 void @myintr() nounwind noinline {
- ; CHECK-LABEL: myintr:
- ; CHECK: swi r3, r1
- ; CHECK: swi r4, r1
- ; CHECK: swi r5, r1
- ; CHECK: swi r6, r1
- ; CHECK: swi r7, r1
- ; CHECK: swi r8, r1
- ; CHECK: swi r9, r1
- ; CHECK: swi r10, r1
- ; CHECK: swi r11, r1
- ; CHECK: swi r12, r1
- ; CHECK: swi r17, r1
- ; CHECK: swi r18, r1
- ; CHECK: mfs r11, rmsr
- ; CHECK: swi r11, r1
- entry:
- %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([28 x i8]* @.str, i32 0, i32 0))
- ret void
-
- ; CHECK: lwi r11, r1
- ; CHECK: mts rmsr, r11
- ; CHECK: lwi r18, r1
- ; CHECK: lwi r17, r1
- ; CHECK: lwi r12, r1
- ; CHECK: lwi r11, r1
- ; CHECK: lwi r10, r1
- ; CHECK: lwi r9, r1
- ; CHECK: lwi r8, r1
- ; CHECK: lwi r7, r1
- ; CHECK: lwi r6, r1
- ; CHECK: lwi r5, r1
- ; CHECK: lwi r4, r1
- ; CHECK: lwi r3, r1
- ; CHECK: rtid r14, 0
-}
-
- ; CHECK: .globl _interrupt_handler
- ; CHECK: _interrupt_handler = myintr
-declare i32 @printf(i8*, ...)
diff --git a/test/CodeGen/MBlaze/jumptable.ll b/test/CodeGen/MBlaze/jumptable.ll
deleted file mode 100644
index 81b85c98b2..0000000000
--- a/test/CodeGen/MBlaze/jumptable.ll
+++ /dev/null
@@ -1,79 +0,0 @@
-; Ensure that jump tables can be handled by the mblaze backend. The
-; jump table should be lowered to a "br" instruction using one of the
-; available registers.
-;
-; RUN: llc < %s -march=mblaze | FileCheck %s
-
-define i32 @jmptable(i32 %arg)
-{
- ; CHECK-LABEL: jmptable:
- switch i32 %arg, label %DEFAULT [ i32 0, label %L0
- i32 1, label %L1
- i32 2, label %L2
- i32 3, label %L3
- i32 4, label %L4
- i32 5, label %L5
- i32 6, label %L6
- i32 7, label %L7
- i32 8, label %L8
- i32 9, label %L9 ]
-
- ; CHECK: lw [[REG:r[0-9]*]]
- ; CHECK: brad [[REG]]
-L0:
- %var0 = add i32 %arg, 0
- br label %DONE
-
-L1:
- %var1 = add i32 %arg, 1
- br label %DONE
-
-L2:
- %var2 = add i32 %arg, 2
- br label %DONE
-
-L3:
- %var3 = add i32 %arg, 3
- br label %DONE
-
-L4:
- %var4 = add i32 %arg, 4
- br label %DONE
-
-L5:
- %var5 = add i32 %arg, 5
- br label %DONE
-
-L6:
- %var6 = add i32 %arg, 6
- br label %DONE
-
-L7:
- %var7 = add i32 %arg, 7
- br label %DONE
-
-L8:
- %var8 = add i32 %arg, 8
- br label %DONE
-
-L9:
- %var9 = add i32 %arg, 9
- br label %DONE
-
-DEFAULT:
- unreachable
-
-DONE:
- %rval = phi i32 [ %var0, %L0 ],
- [ %var1, %L1 ],
- [ %var2, %L2 ],
- [ %var3, %L3 ],
- [ %var4, %L4 ],
- [ %var5, %L5 ],
- [ %var6, %L6 ],
- [ %var7, %L7 ],
- [ %var8, %L8 ],
- [ %var9, %L9 ]
- ret i32 %rval
- ; CHECK: rtsd
-}
diff --git a/test/CodeGen/MBlaze/lit.local.cfg b/test/CodeGen/MBlaze/lit.local.cfg
deleted file mode 100644
index ff4928de4b..0000000000
--- a/test/CodeGen/MBlaze/lit.local.cfg
+++ /dev/null
@@ -1,6 +0,0 @@
-config.suffixes = ['.ll', '.c', '.cpp', '.test']
-
-targets = set(config.root.targets_to_build.split())
-if not 'MBlaze' in targets:
- config.unsupported = True
-
diff --git a/test/CodeGen/MBlaze/loop.ll b/test/CodeGen/MBlaze/loop.ll
deleted file mode 100644
index 966a0fc2ee..0000000000
--- a/test/CodeGen/MBlaze/loop.ll
+++ /dev/null
@@ -1,44 +0,0 @@
-; Test some complicated looping constructs to ensure that they
-; compile successfully and that some sort of branching is used
-; in the resulting code.
-;
-; RUN: llc < %s -march=mblaze -mattr=+mul,+fpu,+barrel | FileCheck %s
-
-declare i32 @printf(i8*, ...)
-@MSG = internal constant [19 x i8] c"Message: %d %d %d\0A\00"
-
-define i32 @loop(i32 %a, i32 %b)
-{
- ; CHECK-LABEL: loop:
-entry:
- br label %loop_outer
-
-loop_outer:
- %outer.0 = phi i32 [ 0, %entry ], [ %outer.2, %loop_outer_finish ]
- br label %loop_inner
-
-loop_inner:
- %inner.0 = phi i32 [ %a, %loop_outer ], [ %inner.3, %loop_inner_finish ]
- %inner.1 = phi i32 [ %b, %loop_outer ], [ %inner.4, %loop_inner_finish ]
- %inner.2 = phi i32 [ 0, %loop_outer ], [ %inner.5, %loop_inner_finish ]
- %inner.3 = add i32 %inner.0, %inner.1
- %inner.4 = mul i32 %inner.2, 11
- br label %loop_inner_finish
-
-loop_inner_finish:
- %inner.5 = add i32 %inner.2, 1
- call i32 (i8*,...)* @printf( i8* getelementptr([19 x i8]* @MSG,i32 0,i32 0),
- i32 %inner.0, i32 %inner.1, i32 %inner.2 )
-
- %inner.6 = icmp eq i32 %inner.5, 100
- ; CHECK: cmp [[REG:r[0-9]*]]
-
- br i1 %inner.6, label %loop_inner, label %loop_outer_finish
- ; CHECK: {{beqid|bneid}} [[REG]]
-
-loop_outer_finish:
- %outer.1 = add i32 %outer.0, 1
- %outer.2 = urem i32 %outer.1, 1500
- br label %loop_outer
- ; CHECK: br
-}
diff --git a/test/CodeGen/MBlaze/mul.ll b/test/CodeGen/MBlaze/mul.ll
deleted file mode 100644
index c09d430a17..0000000000
--- a/test/CodeGen/MBlaze/mul.ll
+++ /dev/null
@@ -1,51 +0,0 @@
-; Ensure that multiplication is lowered to function calls when the multiplier
-; unit is not available in the hardware and that function calls are not used
-; when the multiplier unit is available in the hardware.
-;
-; RUN: llc < %s -march=mblaze | FileCheck -check-prefix=FUN %s
-; RUN: llc < %s -march=mblaze -mattr=+mul | FileCheck -check-prefix=MUL %s
-
-define i8 @test_i8(i8 %a, i8 %b) {
- ; FUN-LABEL: test_i8:
- ; MUL-LABEL: test_i8:
-
- %tmp.1 = mul i8 %a, %b
- ; FUN-NOT: mul
- ; FUN: brlid
- ; MUL-NOT: brlid
-
- ret i8 %tmp.1
- ; FUN: rtsd
- ; MUL: rtsd
- ; MUL: mul
-}
-
-define i16 @test_i16(i16 %a, i16 %b) {
- ; FUN-LABEL: test_i16:
- ; MUL-LABEL: test_i16:
-
- %tmp.1 = mul i16 %a, %b
- ; FUN-NOT: mul
- ; FUN: brlid
- ; MUL-NOT: brlid
-
- ret i16 %tmp.1
- ; FUN: rtsd
- ; MUL: rtsd
- ; MUL: mul
-}
-
-define i32 @test_i32(i32 %a, i32 %b) {
- ; FUN-LABEL: test_i32:
- ; MUL-LABEL: test_i32:
-
- %tmp.1 = mul i32 %a, %b
- ; FUN-NOT: mul
- ; FUN: brlid
- ; MUL-NOT: brlid
-
- ret i32 %tmp.1
- ; FUN: rtsd
- ; MUL: rtsd
- ; MUL: mul
-}
diff --git a/test/CodeGen/MBlaze/mul64.ll b/test/CodeGen/MBlaze/mul64.ll
deleted file mode 100644
index 60ccf04abc..0000000000
--- a/test/CodeGen/MBlaze/mul64.ll
+++ /dev/null
@@ -1,23 +0,0 @@
-; Ensure that multiplication is lowered to function calls when the 64-bit
-; multiplier unit is not available in the hardware and that function calls
-; are not used when the 64-bit multiplier unit is available in the hardware.
-;
-; RUN: llc < %s -march=mblaze | FileCheck -check-prefix=FUN %s
-; RUN: llc < %s -march=mblaze -mattr=+mul,+mul64 | \
-; RUN: FileCheck -check-prefix=MUL %s
-
-define i64 @test_i64(i64 %a, i64 %b) {
- ; FUN-LABEL: test_i64:
- ; MUL-LABEL: test_i64:
-
- %tmp.1 = mul i64 %a, %b
- ; FUN-NOT: mul
- ; FUN: brlid
- ; MUL-NOT: brlid
- ; MUL: mulh
- ; MUL: mul
-
- ret i64 %tmp.1
- ; FUN: rtsd
- ; MUL: rtsd
-}
diff --git a/test/CodeGen/MBlaze/select.ll b/test/CodeGen/MBlaze/select.ll
deleted file mode 100644
index c4bdbc4014..0000000000
--- a/test/CodeGen/MBlaze/select.ll
+++ /dev/null
@@ -1,15 +0,0 @@
-; Ensure that the select instruction is supported and is lowered to
-; some sort of branch instruction.
-;
-; RUN: llc < %s -march=mblaze | FileCheck %s
-
-define i32 @testsel(i32 %a, i32 %b)
-{
- ; CHECK-LABEL: testsel:
- %tmp.1 = icmp eq i32 %a, %b
- ; CHECK: cmp
- %tmp.2 = select i1 %tmp.1, i32 %a, i32 %b
- ; CHECK: {{bne|beq}}
- ret i32 %tmp.2
- ; CHECK: rtsd
-}
diff --git a/test/CodeGen/MBlaze/shift.ll b/test/CodeGen/MBlaze/shift.ll
deleted file mode 100644
index c1c890d919..0000000000
--- a/test/CodeGen/MBlaze/shift.ll
+++ /dev/null
@@ -1,115 +0,0 @@
-; Ensure that shifts are lowered to loops when the barrel shifter unit is
-; not available in the hardware and that loops are not used when the
-; barrel shifter unit is available in the hardware.
-;
-; RUN: llc < %s -march=mblaze | FileCheck -check-prefix=FUN %s
-; RUN: llc < %s -march=mblaze -mattr=+barrel | FileCheck -check-prefix=SHT %s
-
-define i8 @test_i8(i8 %a, i8 %b) {
- ; FUN-LABEL: test_i8:
- ; SHT-LABEL: test_i8:
-
- %tmp.1 = shl i8 %a, %b
- ; FUN: andi
- ; FUN: add
- ; FUN: bnei
- ; SHT-NOT: bnei
-
- ret i8 %tmp.1
- ; FUN: rtsd
- ; SHT: rtsd
- ; FUN-NOT: bsll
- ; SHT-NEXT: bsll
-}
-
-define i8 @testc_i8(i8 %a, i8 %b) {
- ; FUN-LABEL: testc_i8:
- ; SHT-LABEL: testc_i8:
-
- %tmp.1 = shl i8 %a, 5
- ; FUN: andi
- ; FUN: add
- ; FUN: bnei
- ; SHT-NOT: andi
- ; SHT-NOT: add
- ; SHT-NOT: bnei
-
- ret i8 %tmp.1
- ; FUN: rtsd
- ; SHT: rtsd
- ; FUN-NOT: bsll
- ; SHT-NEXT: bslli
-}
-
-define i16 @test_i16(i16 %a, i16 %b) {
- ; FUN-LABEL: test_i16:
- ; SHT-LABEL: test_i16:
-
- %tmp.1 = shl i16 %a, %b
- ; FUN: andi
- ; FUN: add
- ; FUN: bnei
- ; SHT-NOT: bnei
-
- ret i16 %tmp.1
- ; FUN: rtsd
- ; SHT: rtsd
- ; FUN-NOT: bsll
- ; SHT-NEXT: bsll
-}
-
-define i16 @testc_i16(i16 %a, i16 %b) {
- ; FUN-LABEL: testc_i16:
- ; SHT-LABEL: testc_i16:
-
- %tmp.1 = shl i16 %a, 5
- ; FUN: andi
- ; FUN: add
- ; FUN: bnei
- ; SHT-NOT: andi
- ; SHT-NOT: add
- ; SHT-NOT: bnei
-
- ret i16 %tmp.1
- ; FUN: rtsd
- ; SHT: rtsd
- ; FUN-NOT: bsll
- ; SHT-NEXT: bslli
-}
-
-define i32 @test_i32(i32 %a, i32 %b) {
- ; FUN-LABEL: test_i32:
- ; SHT-LABEL: test_i32:
-
- %tmp.1 = shl i32 %a, %b
- ; FUN: andi
- ; FUN: add
- ; FUN: bnei
- ; SHT-NOT: andi
- ; SHT-NOT: bnei
-
- ret i32 %tmp.1
- ; FUN: rtsd
- ; SHT: rtsd
- ; FUN-NOT: bsll
- ; SHT-NEXT: bsll
-}
-
-define i32 @testc_i32(i32 %a, i32 %b) {
- ; FUN-LABEL: testc_i32:
- ; SHT-LABEL: testc_i32:
-
- %tmp.1 = shl i32 %a, 5
- ; FUN: andi
- ; FUN: add
- ; FUN: bnei
- ; SHT-NOT: andi
- ; SHT-NOT: add
- ; SHT-NOT: bnei
-
- ret i32 %tmp.1
- ; FUN: rtsd
- ; SHT: rtsd
- ; FUN-NOT: bsll
- ; SHT-NEXT: bslli
-}
diff --git a/test/CodeGen/MBlaze/svol.ll b/test/CodeGen/MBlaze/svol.ll
deleted file mode 100644
index f5d5464ace..0000000000
--- a/test/CodeGen/MBlaze/svol.ll
+++ /dev/null
@@ -1,80 +0,0 @@
-; Ensure that the MBlaze save_volatiles calling convention (cc74) is handled
-; correctly correctly by the MBlaze backend.
-;
-; RUN: llc < %s -march=mblaze | FileCheck %s
-
-@.str = private constant [28 x i8] c"The interrupt has gone off\0A\00"
-
-define cc74 void @mysvol() nounwind noinline {
- ; CHECK-LABEL: mysvol:
- ; CHECK: swi r3, r1
- ; CHECK: swi r4, r1
- ; CHECK: swi r5, r1
- ; CHECK: swi r6, r1
- ; CHECK: swi r7, r1
- ; CHECK: swi r8, r1
- ; CHECK: swi r9, r1
- ; CHECK: swi r10, r1
- ; CHECK: swi r11, r1
- ; CHECK: swi r12, r1
- ; CHECK: swi r17, r1
- ; CHECK: swi r18, r1
- ; CHECK-NOT: mfs r11, rmsr
- entry:
- %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([28 x i8]* @.str, i32 0, i32 0))
- ret void
-
- ; CHECK-NOT: mts rmsr, r11
- ; CHECK: lwi r18, r1
- ; CHECK: lwi r17, r1
- ; CHECK: lwi r12, r1
- ; CHECK: lwi r11, r1
- ; CHECK: lwi r10, r1
- ; CHECK: lwi r9, r1
- ; CHECK: lwi r8, r1
- ; CHECK: lwi r7, r1
- ; CHECK: lwi r6, r1
- ; CHECK: lwi r5, r1
- ; CHECK: lwi r4, r1
- ; CHECK: lwi r3, r1
- ; CHECK: rtsd r15, 8
-}
-
-define cc74 void @mysvol2() nounwind noinline {
- ; CHECK-LABEL: mysvol2:
- ; CHECK-NOT: swi r3, r1
- ; CHECK-NOT: swi r4, r1
- ; CHECK-NOT: swi r5, r1
- ; CHECK-NOT: swi r6, r1
- ; CHECK-NOT: swi r7, r1
- ; CHECK-NOT: swi r8, r1
- ; CHECK-NOT: swi r9, r1
- ; CHECK-NOT: swi r10, r1
- ; CHECK-NOT: swi r11, r1
- ; CHECK-NOT: swi r12, r1
- ; CHECK: swi r17, r1
- ; CHECK: swi r18, r1
- ; CHECK-NOT: mfs r11, rmsr
-entry:
-
- ; CHECK-NOT: mts rmsr, r11
- ; CHECK: lwi r18, r1
- ; CHECK: lwi r17, r1
- ; CHECK-NOT: lwi r12, r1
- ; CHECK-NOT: lwi r11, r1
- ; CHECK-NOT: lwi r10, r1
- ; CHECK-NOT: lwi r9, r1
- ; CHECK-NOT: lwi r8, r1
- ; CHECK-NOT: lwi r7, r1
- ; CHECK-NOT: lwi r6, r1
- ; CHECK-NOT: lwi r5, r1
- ; CHECK-NOT: lwi r4, r1
- ; CHECK-NOT: lwi r3, r1
- ; CHECK: rtsd r15, 8
- ret void
-}
-
- ; CHECK-NOT: .globl _interrupt_handler
- ; CHECK-NOT: _interrupt_handler = mysvol
- ; CHECK-NOT: _interrupt_handler = mysvol2
-declare i32 @printf(i8*, ...)
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-07 06:39:15 +0000