2 files changed, 35 insertions, 4 deletions
diff --git a/test/CodeGen/PowerPC/addrfuncstr.ll b/test/CodeGen/PowerPC/addrfuncstr.ll
new file mode 100644
index 0000000000..60c02d498f
--- /dev/null
+++ b/test/CodeGen/PowerPC/addrfuncstr.ll
@@ -0,0 +1,27 @@
+; RUN: llc -O0 < %s | FileCheck %s
+
+; Verify that a constant with an initializer that may turn into a dynamic
+; relocation is not placed in .rodata, but rather in .data.rel.ro.
+
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
+target triple = "powerpc64-unknown-linux-gnu"
+
+%struct.x = type { i64 (i8*, i64, i64, %struct._IO_FILE*)* }
+%struct._IO_FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct._IO_FILE*, i32, i32, i64, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i64, i32, [20 x i8] }
+%struct._IO_marker = type { %struct._IO_marker*, %struct._IO_FILE*, i32 }
+
+@_ZL1y = internal constant %struct.x { i64 (i8*, i64, i64, %struct._IO_FILE*)* @fread }, align 8
+
+; Function Attrs: nounwind
+define %struct.x* @_Z3foov() #0 {
+entry:
+  ret %struct.x* @_ZL1y
+}
+
+declare i64 @fread(i8*, i64, i64, %struct._IO_FILE*) #1
+
+; CHECK: .section .data.rel.ro
+; CHECK: .quad fread
+
+attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
diff --git a/test/CodeGen/PowerPC/crsave.ll b/test/CodeGen/PowerPC/crsave.ll
index d698ab031d..f1cbc5afa8 100644
--- a/test/CodeGen/PowerPC/crsave.ll
+++ b/test/CodeGen/PowerPC/crsave.ll
@@ -13,9 +13,11 @@ entry:
   ret i32 %1
 }
 
+; PPC32: stw 31, -4(1)
+; PPC32: stwu 1, -32(1)
 ; PPC32: mfcr 12
-; PPC32-NEXT: stw 12, {{[0-9]+}}(31)
-; PPC32: lwz 12, {{[0-9]+}}(31)
+; PPC32-NEXT: stw 12, 24(31)
+; PPC32: lwz 12, 24(31)
 ; PPC32-NEXT: mtcrf 32, 12
 
 ; PPC64: mfcr 12
@@ -35,9 +37,11 @@ entry:
   ret i32 %1
 }
 
+; PPC32: stw 31, -4(1)
+; PPC32: stwu 1, -32(1)
 ; PPC32: mfcr 12
-; PPC32-NEXT: stw 12, {{[0-9]+}}(31)
-; PPC32: lwz 12, {{[0-9]+}}(31)
+; PPC32-NEXT: stw 12, 24(31)
+; PPC32: lwz 12, 24(31)
 ; PPC32-NEXT: mtcrf 32, 12
 ; PPC32-NEXT: mtcrf 16, 12
 ; PPC32-NEXT: mtcrf 8, 12