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Diffstat (limited to 'test/CodeGen/SystemZ/cond-store-08.ll')
-rw-r--r-- | test/CodeGen/SystemZ/cond-store-08.ll | 124 |
1 files changed, 124 insertions, 0 deletions
diff --git a/test/CodeGen/SystemZ/cond-store-08.ll b/test/CodeGen/SystemZ/cond-store-08.ll new file mode 100644 index 0000000000..d67281c5af --- /dev/null +++ b/test/CodeGen/SystemZ/cond-store-08.ll @@ -0,0 +1,124 @@ +; Test STOCGs that are presented as selects. +; +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s + +declare void @foo(i64 *) + +; Test with the loaded value first. +define void @f1(i64 *%ptr, i64 %alt, i32 %limit) { +; CHECK-LABEL: f1: +; CHECK: clfi %r4, 42 +; CHECK: stocgnl %r3, 0(%r2) +; CHECK: br %r14 + %cond = icmp ult i32 %limit, 42 + %orig = load i64 *%ptr + %res = select i1 %cond, i64 %orig, i64 %alt + store i64 %res, i64 *%ptr + ret void +} + +; ...and with the loaded value second +define void @f2(i64 *%ptr, i64 %alt, i32 %limit) { +; CHECK-LABEL: f2: +; CHECK: clfi %r4, 42 +; CHECK: stocgl %r3, 0(%r2) +; CHECK: br %r14 + %cond = icmp ult i32 %limit, 42 + %orig = load i64 *%ptr + %res = select i1 %cond, i64 %alt, i64 %orig + store i64 %res, i64 *%ptr + ret void +} + +; Check the high end of the aligned STOCG range. +define void @f3(i64 *%base, i64 %alt, i32 %limit) { +; CHECK-LABEL: f3: +; CHECK: clfi %r4, 42 +; CHECK: stocgnl %r3, 524280(%r2) +; CHECK: br %r14 + %ptr = getelementptr i64 *%base, i64 65535 + %cond = icmp ult i32 %limit, 42 + %orig = load i64 *%ptr + %res = select i1 %cond, i64 %orig, i64 %alt + store i64 %res, i64 *%ptr + ret void +} + +; Check the next doubleword up. Other sequences besides this one would be OK. +define void @f4(i64 *%base, i64 %alt, i32 %limit) { +; CHECK-LABEL: f4: +; CHECK: agfi %r2, 524288 +; CHECK: clfi %r4, 42 +; CHECK: stocgnl %r3, 0(%r2) +; CHECK: br %r14 + %ptr = getelementptr i64 *%base, i64 65536 + %cond = icmp ult i32 %limit, 42 + %orig = load i64 *%ptr + %res = select i1 %cond, i64 %orig, i64 %alt + store i64 %res, i64 *%ptr + ret void +} + +; Check the low end of the STOCG range. +define void @f5(i64 *%base, i64 %alt, i32 %limit) { +; CHECK-LABEL: f5: +; CHECK: clfi %r4, 42 +; CHECK: stocgnl %r3, -524288(%r2) +; CHECK: br %r14 + %ptr = getelementptr i64 *%base, i64 -65536 + %cond = icmp ult i32 %limit, 42 + %orig = load i64 *%ptr + %res = select i1 %cond, i64 %orig, i64 %alt + store i64 %res, i64 *%ptr + ret void +} + +; Check the next doubleword down, with the same comments as f4. +define void @f6(i64 *%base, i64 %alt, i32 %limit) { +; CHECK-LABEL: f6: +; CHECK: agfi %r2, -524296 +; CHECK: clfi %r4, 42 +; CHECK: stocgnl %r3, 0(%r2) +; CHECK: br %r14 + %ptr = getelementptr i64 *%base, i64 -65537 + %cond = icmp ult i32 %limit, 42 + %orig = load i64 *%ptr + %res = select i1 %cond, i64 %orig, i64 %alt + store i64 %res, i64 *%ptr + ret void +} + +; Try a frame index base. +define void @f7(i64 %alt, i32 %limit) { +; CHECK-LABEL: f7: +; CHECK: brasl %r14, foo@PLT +; CHECK: stocgnl {{%r[0-9]+}}, {{[0-9]+}}(%r15) +; CHECK: brasl %r14, foo@PLT +; CHECK: br %r14 + %ptr = alloca i64 + call void @foo(i64 *%ptr) + %cond = icmp ult i32 %limit, 42 + %orig = load i64 *%ptr + %res = select i1 %cond, i64 %orig, i64 %alt + store i64 %res, i64 *%ptr + call void @foo(i64 *%ptr) + ret void +} + +; Test that conditionally-executed stores do not use STOC, since STOC +; is allowed to trap even when the condition is false. +define void @f8(i64 %a, i64 %b, i64 *%dest) { +; CHECK-LABEL: f8: +; CHECK-NOT: stocg %r3, 0(%r4) +; CHECK: br %r14 +entry: + %cmp = icmp ule i64 %a, %b + br i1 %cmp, label %store, label %exit + +store: + store i64 %b, i64 *%dest + br label %exit + +exit: + ret void +} |