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Diffstat (limited to 'test/CodeGen/X86/blend-msb.ll')
-rw-r--r--test/CodeGen/X86/blend-msb.ll12
1 files changed, 6 insertions, 6 deletions
diff --git a/test/CodeGen/X86/blend-msb.ll b/test/CodeGen/X86/blend-msb.ll
index 4f2060f701..0485a42eb7 100644
--- a/test/CodeGen/X86/blend-msb.ll
+++ b/test/CodeGen/X86/blend-msb.ll
@@ -5,7 +5,7 @@
; shifting the needed bit to the MSB, and not using shl+sra.
;CHECK-LABEL: vsel_float:
-;CHECK: movl $-2147483648
+;CHECK: movl $-1
;CHECK-NEXT: movd
;CHECK-NEXT: blendvps
;CHECK: ret
@@ -15,7 +15,7 @@ define <4 x float> @vsel_float(<4 x float> %v1, <4 x float> %v2) {
}
;CHECK-LABEL: vsel_4xi8:
-;CHECK: movl $-2147483648
+;CHECK: movl $-1
;CHECK-NEXT: movd
;CHECK-NEXT: blendvps
;CHECK: ret
@@ -26,12 +26,12 @@ define <4 x i8> @vsel_4xi8(<4 x i8> %v1, <4 x i8> %v2) {
; We do not have native support for v8i16 blends and we have to use the
-; blendvb instruction or a sequence of NAND/OR/AND. Make sure that we do not r
+; blendvb instruction or a sequence of NAND/OR/AND. Make sure that we do not
; reduce the mask in this case.
;CHECK-LABEL: vsel_8xi16:
-;CHECK: psllw
-;CHECK: psraw
-;CHECK: pblendvb
+;CHECK: andps
+;CHECK: andps
+;CHECK: orps
;CHECK: ret
define <8 x i16> @vsel_8xi16(<8 x i16> %v1, <8 x i16> %v2) {
%vsel = select <8 x i1> <i1 true, i1 false, i1 false, i1 false, i1 true, i1 false, i1 false, i1 false>, <8 x i16> %v1, <8 x i16> %v2